CN1515035A - 氮化物半导体元件 - Google Patents
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Abstract
为了提供漏电流低、而且静电耐压高的氮化物半导体元件,本发明的氮化物半导体元件是,在分别由多个氮化物半导体层构成的p侧层和n侧层之间具有由氮化物半导体构成的活性层的氮化物半导体元件,作为形成p欧姆电极的层,p侧层包含p型接触层,并且p型接触层由p型氮化物半导体层和n型氮化物半导体层交互叠层而成。
Description
技术领域
本发明涉及使用在发光二极管(LED)、激光二极管(LD)、太阳电池、光传感器等发光元件、受光元件、或者晶体管、功率器件等电子器件中的使用了氮化物半导体(例如:InaAlbGal-a-bN、0≤a、0≤b、a+b≤1)的氮化物半导体元件。
背景技术
作为能够构成蓝色发光元件(LED、LD)、纯绿色发光元件的半导体材料,氮化物半导体引人注目,它的研究开发正在活跃地进行。现在,作为使用了该氮化物半导体的元件,高亮度蓝色LED、纯绿色LED等用作全彩色LED显示器、交通信号灯、图像扫描器光源等的光源正在实用化,今后,期待它使用在越来越宽阔的用途上。这些LED元件基本上具有:在蓝宝石衬底上,由GaN构成的缓冲层、由Si掺杂GaN构成的n侧接触层、单量子阱结构(SQW:Single-Quantum-Well)的InGaN或者具有InGaN的多量子阱结构(MQW:Multi-Quantum-Well)活性层(activelayer)、由Mg掺杂AlGaN构成的p侧包层、由Mg掺杂GaN构成的p侧接触层依次叠层而成的结构,这种结构的氮化物半导体元件显示出非常优秀的特性,例如,在20mA下,发光波长450nm的蓝色LED的输出功率5mW、外部量子效率9.1%,520nm的绿色LED的输出功率3mW、外部量子效率6.3%。
但是,今后随着氮化物半导体元件用途的扩展,除发光强度、发光效率之外,进一步希望降低漏电流、提高静电耐压。
发明内容
本发明的目的在于:提供漏电流低而且静电耐压高的氮化物半导体元件。
为了达到上述目的,本发明的氮化物半导体元件是,在分别由多个氮化物半导体层构成的p侧层与n侧层之间,具有由氮化物半导体构成的活性层的氮化物半导体元件,其特征在于作为形成p欧姆电极的层上述p侧层包含p型接触层,该p型接触层由p型氮化物半导体层和n型氮化物半导体层交互叠层而成。
在这样构成的本发明的氮化物半导体发光元件中,由于上述p型接触层由p型氮化物半导体层和n型氮化物半导体层交互叠层形成,所以在p侧施加负n侧施加正的反向电压的情况下,能够增加静电击穿电压(静电耐压),而且减小漏电流。这主要是由于在上述p型接触层内的pn结上施加了反向偏压的缘故。
在本发明的氮化物半导体元件中,p型氮化物半导体层对上述n型氮化物半导体层的膜厚比(p型氮化物半导体层的膜厚/n型氮化物半导体层的膜厚)最好设定在1以上9以下。
此外,在本发明的氮化物半导体元件中,上述n型氮化物半导体层的膜厚最好是60以下,以使正向电压不上升。
进而,在本发明的氮化物半导体元件中,为了得到良好的n型导电性,最好在上述n型氮化物半导体层上掺杂Si,为了得到良好的p型导电性,最好在上述p型氮化物半导体层上掺杂Mg。
此外,在本发明的氮化物半导体元件中,上述n型氮化物半导体层最好由Si掺杂GaN构成,上述p型氮化物半导体层最好由Mg掺杂GaN构成,由此,能够更进一步降低p型接触层的电阻率。
此外,在本发明的氮化物半导体元件中,也可以是上述n型氮化物半导体层是未掺杂层,在上述p型氮化物半导体层上掺杂Mg。这种情况下,最好是上述n型氮化物半导体层由未掺杂GaN构成,上述p型氮化物半导体层由Mg掺杂GaN构成。
附图说明
图1是本发明实施方式的氮化物半导体元件的模式剖面图。
图2是示出本发明实施例1的各样品的静电击穿电压的曲线图。
图3是示出本发明实施例2的各样品的正向电压的曲线图。
图4是示出实施例2的各样品的发光输出的曲线图。
图5是示出本发明实施例3的各样品的静电击穿电压的曲线图。
图6是示出本发明实施例4的各样品的正向电压的曲线图。
图7是示出实施例4的各样品的发光输出的曲线图。
图8是示出实施例4的各样品的静电击穿电压的曲线图。
图9是示出本发明实施例5的各样品的正向电压的曲线图。
图10是示出实施例5的各样品的发光输出的曲线图。
图11是示出本发明实施例6的各样品的热处理前后的电阻率的曲线图。
具体实施方式
以下,参照附图,说明本发明各实施方式的氮化物半导体元件。
图1是示出本发明一实施方式的氮化物半导体元件(LED元件)的结构的模式剖面图,本实施方式的氮化物半导体元件具有在蓝宝石衬底上依次叠层下述各层的结构,
(1)由AlGaN构成的缓冲层2、
(2)未掺杂GaN层3、
(3)由Si掺杂GaN构成的n型接触层4、
(4)未掺杂GaN层5、
(5)Si掺杂GaN层6、
(6)未掺杂GaN层7、
(7)GaN/InGaN超晶格n型层8、
(8)以InGaN层作为阱层、GaN层作为势垒层的多量子阱结构的活性层9、
(9)p-AlGaN/p-InGaN超晶格p型层10、
(10)Mg掺杂GaN/Si掺杂GaN调制掺杂p侧接触层11、并且按下述方法形成p侧及n侧的电极,由此构成氮化物半导体元件。
例如,在元件的角部中用刻蚀法将从p侧接触层11到未掺杂GaN层5的部分除去,使n型接触层4的一部分露出,n欧姆电极21形成在露出的n型接触层4上。
此外,作为p侧的电极,在p侧接触层11的几乎整个面上形成p欧姆电极22、在该p欧姆电极22上的一部分上形成p焊接区(pad)电极23。
这里,本实施方式的氮化物半导体元件的特征是由Mg掺杂GaN层11a和Si掺杂GaN层11b交互叠层的调制掺杂层构成p侧接触层11,由此,能够降低漏电流而且提高静电耐压。
在本实施方式中,p侧接触层11(Si掺杂GaN层11b)中优选的Si掺杂量是1×1017/cm3~1×1021/cm3,进一步优选在1×1018/cm3~5×1019/cm3的范围内调整。这是由于使掺杂量为1×1017/cm3以上时,就显著地呈现减小漏电流的效果,而当掺杂量大于1×1021/cm3时,结晶性变差,存在发光效率降低的倾向的缘故。
此外,作为p侧接触层11(Mg掺杂GaN层11a)中优选的Mg掺杂量是1×1018/cm3~1×1021/cm3,进一步优选是在1×1019/cm3~3×1020/cm3。这是由于使掺杂量为1×1018以上时,能够得到与p欧姆电极更良好的欧姆接触,此外,当掺杂量大于1×1021/cm3时,与多量掺杂Si的情况同样,结晶性变差的缘故。
此外,在本发明中,p-AlGaN/p-InGaN超晶格p型层10起到包层的功能,成为限制光及向活性层注入空穴的层。
为了使该p-AlGaN/p-InGaN超晶格p型层10成为p型,掺杂p型杂质例如Mg,对p-AlGaN层的Mg掺杂量和对p-InGaN层的Mg的掺杂量可以相同也可以不同,最好将掺杂量设定在比各自p侧接触层的Mg掺杂GaN层11a的Mg的掺杂量更少的掺杂量,由此,能够更进一步降低Vf(正向电压)。
此外,也能够用Mg掺杂GaN层构成p-AlGaN/p-InGaN超晶格p型层10的p-InGaN层。
此外,在p-AlGaN/p-InGaN(p-GaN)超晶格p型层10中,p-AlGaN层和p-InGaN(p-GaN)层的各膜厚设定在100以下,更优选是设定在70以下,进一步优选是设定在10~40的范围内。这种情况下,p-AlGaN层的膜厚和p-InGaN(p-GaN)层的膜厚可以相同也可以不同。超晶格p型层10由p-AlGaN层和p-InGaN(P-GaN)层交互生长形成,例如,可以从p-AlGaN层开始叠层在p-AlGaN层结束,也可以从p-InGaN(P-GaN)层开始在p-InGaN(p-GaN)层结束。但是,由于InGaN层容易热分解,最好在p-AlGaN层结束,使得InGaN层的表面不会长时间暴露在高温气氛中。
进而,为了提高发光输出并且降低Vf,p-AlGaN/p-InGaN(p-GaN)超晶格p型层10的总膜厚,优选设定在2000以下,更优选设定在1000以下,进一步优选设定在500以下。
此外,最好使p-AlGaN/p-InGaN(P-GaN)超晶格p型层10的各膜厚比p型接触层的各膜厚更薄。即,将与多层膜的p型接触层邻接的层作为超晶格层,使各膜厚比p型接触层的n型层及p型层的各自的膜厚更薄,由此,能够构成静电耐压更高的氮化物半导体元件。
此外,在本实施方式中就使用了p-AlGaN/p-InGaN超晶格p型层10的情况进行了说明,但是,本发明不是仅限于这种情况,至少,只要具有AlGaN即可,AlGaN是单层也可以。通过采用p-AlGaN/p-InGaN超晶格,与AlGaN单层相比结晶性变好,存在电阻率进一步降低、Vf降低的倾向。
在以上的实施方式中,为了降低Vf,作为优选的方式,p型接触层分别由GaN构成的n型氮化物半导体层(Si掺杂GaN层)和p型氮化物半导体层(Mg掺杂GaN)构成,但是,本发明不是仅限于这种情况。此外,如果是包含微量In的InGaN或者包含微量Al的AlGaN,就能够得到实质上与GaN同样的效果。此外,即使在GaN中包含其它的微量的元素(In、Al以外的元素),同样,也能够得到与GaN同等的效果。
此外,在上述的实施方式中,作为构成p型接触层的n型氮化物半导体层,使用了Si掺杂的GaN层,但是本发明不是仅限于这种情况,n型氮化物半导体层也可以由未掺杂的n型层构成。即在本发明中,利用未掺杂的氮化物半导体层显示的n型导电性,也可以使用未掺杂的氮化物半导体层作为n型氮化物半导体层。还有,使用未掺杂的氮化物半导体层作为n型氮化物半导体层的情况下,最好使用未掺杂的GaN层。更理想的方案是使未掺杂GaN层和Mg掺杂GaN层组合构成p型接触层。
<实施例>
以下,使用实施例更具体地说明本发明。
(实施例1)
首先,作为实施例1,改变p侧接触层11中的Mg掺杂GaN层11a和Si掺杂GaN层11b的膜厚比,制作3种样品,分别评价其反向的静电耐压特性。
在本实施例1中,按表1所示那样设定各半导体层的膜厚,各样品的p侧接触层11中的Mg掺杂GaN层11a和Si掺杂11b的膜厚的比,如表2所示。
表1
层 | 厚度()及结构 |
缓冲层2 | 200 |
未掺杂GaN层3 | 15000 |
n型接触层4 | 21650 |
未掺杂GaN层5 | 3000 |
Si掺杂GaN层6 | 300 |
未掺杂GaN层7 | 50 |
超晶格n型层8 | GaN(40)/InGaN(20)×10周期(最后是GaN层) |
多量子阱结构的活性层9 | GaN(250)+InGaN(28)/GaN(15.6)×5周期 |
超晶格p型层10 | p-AlGaN(40)/p-InGaN(25)×5周期+p-AlGaN层 |
P侧接触层11 | 1200 |
表2
样品编号 | 膜厚比 | Mg:GaN层11a | Si:GaN层11b |
样品1 | 9∶1 | 108 | 12 |
样品2 | 7∶3 | 84 | 36 |
样品3 | 5∶5 | 60 | 60 |
还有,在本实施例1中,GaN层11a的Mg掺杂量是1×1020cm-3,GaN层11b的Si掺杂量是5×1018cm-3。
此外,各样品都是将一个GaN层11a和一个GaN层11b作为一个周期,作成10个周期。
在按上述参数制作的样品1~3中,对各自的静电击穿电压进行了评价,其结果示于图2的曲线图。
还有,图2曲线图的纵轴是用基准样品(比较例)的静电击穿电压归一化后的值表示。该基准样品p侧接触层采用由Mg掺杂1×1020cm-3的GaN构成的单层,除此以外与实施例1的结构相同。
如图2的曲线图所示,可以确认本实施例1的样品1~3中的任何一个样品的静电击穿电压都比比较例有所提高。
此外,由上图可以确认在膜厚比是7∶3时,可以使静电击穿电压最高。
(实施例1的变形例)
在实施例1中,能够在超晶格p型层和p型接触层11之间上,形成杂质浓度低的AlGaN或者GaN层,由此,能够更加提高静电耐压。该低浓度AlGaN或者GaN层优选形成为0.5μm以下,例如,以0.2μm的膜厚形成。该层可以以未掺杂层形成,也可以一边掺杂p型杂质一边形成,例如一边掺杂Mg一边形成,在一边掺杂Mg一边形成的情况下,应使它的浓度低于邻接层的Mg浓度。这样做时,与实施例1的元件比较,能够更进一步提高静电耐压。
(实施例2)
在实施例1的样品1~3上,再加上Mg掺杂GaN层11a的膜厚为36、Si掺杂GaN层11b的膜厚为84的样品4,对各样品分别使Si掺杂GaN层11b中的Si掺杂量在0~1.5×1019cm-3变化,评价了各样品的正向电压和发光输出。
图3、图4示出了它的评价结果。
如该图3所示,在样品1~3中,能够确认没有使正向电压上升,如图4所示,能够确认样品1~4中的任何一个发光输出都是与基准样品同等或者大于基准样品。
还有,图4的E+18及E+19分别是(×1018)及(×1019)的意思,单位是cm-3。
(实施例3)
在实施例3中,在将Mg掺杂GaN层11a和Si掺杂GaN层11b的叠层周期固定在10周期,将Mg掺杂GaN层11a的膜厚设定为84,Si掺杂GaN层11b的膜厚设定为36的样品中,制作Si掺杂GaN层11b的Si掺杂量为1.0×1018/cm3、2.5×1018/cm3、5×1018/cm3的3种样品,测量了它的静电击穿电压。
图5示出它的测量结果。
如图5所示,能够确认Si掺杂GaN层11b中的Si掺杂量越增加,静电击穿电压越增高。
(实施例4)
在实施例4中,将Mg掺杂GaN层11a和Si掺杂GaN层11b的膜厚比固定在7∶3,改变它的周期,制作表3所示的5种样品,测量各自的正向电压、发光输出及静电击穿电压。
表3
样品编号 | 周期 | Mg:GaN层11a | Si:GaN层11b |
样品4-1 | 1 | 494 | 212 |
样品4-2 | 5 | 147 | 63 |
样品4-3 | 10 | 84 | 36 |
样品4-4 | 15 | 56 | 24 |
样品4-5 | 30 | 28 | 12 |
这里,Si掺杂GaN层11b的Si掺杂量是5×1018/cm3。
图6、图7及图8示出它的测量结果。
如图6及图7所示,能够确认正向电压及发光输出与叠层周期数几乎没有依存关系。
此外,如图8所示,静电击穿电压在10周期的情况下最高,其次是15周期的情况。
(实施例5)
在实施例5中,设Mg掺杂GaN层11a的膜厚(84)和Si掺杂GaN层11b的膜厚(36)的比为7∶3,以此作为一个周期,反复操作10个周期,在这样构成的接触层中,使Si掺杂GaN层11b的Si掺杂量在0~1.5×1019/cm3的范围内发生变化,评价它的正向电压和发光输出。
图9、图10示出它的测量结果。
如图9所示,能够确认发光输出及正向电压与Si掺杂GaN层11b的Si掺杂量几乎没有依存关系。
(实施例6)
在实施例6中,设Mg掺杂GaN层11a的膜厚(84)和Si掺杂GaN层11b的膜厚(36)的比为7∶3,以此作为一个周期,反复操作10个周期,在这样构成的接触层中,对使Si掺杂GaN层11b的Si掺杂量在0~1.5×1019/cm3的范围内发生变化的各样品,在热退火的前后进行霍尔测量。
还有,热处理是在650℃下、进行0.5小时。
图11示出它的测量结果。
从测量结果能够确认,在Si掺杂GaN层11b中,5×1018/cm3、1×1019/cm3等Si掺杂量比较多的样品中,因热退火电阻率的减少显著。
此外,这些电阻率是比用p-GaN的单层膜构成p-接触层的情况的电阻率10Ω·cm更低的电阻率值,能够确认本专利申请的由Mg掺杂GaN层11a和Si掺杂GaN层11b交互叠层而成的接触层,对低阻抗化也是有效的。
产业上应用的可能性
如以上详细说明的那样,本发明的氮化物半导体元件由于在上述p型接触层内形成pn结,能够提高在正的反方向上施加电压的情况中的静电击穿电压(静电耐压),而且能够减小漏电流。
由此,本发明能够应用于要求更高静电耐压的用途中。
Claims (7)
1、一种氮化物半导体元件,其在分别由多个氮化物半导体层构成的p侧层和n侧层之间,具有由氮化物半导体构成的活性层,其特征在于:作为形成p欧姆电极的层,上述p侧层包含p型接触层;该p型接触层由p型氮化物半导体层和n型氮化物半导体层交互层叠而成。
2、根据权利要求1所述的氮化物半导体元件,其特征在于:
p型氮化物半导体层对上述n型氮化物半导体层的膜厚比(p型氮化物半导体层的膜厚/n型氮化物半导体层的膜厚)被设定在1以上9以下。
3、根据权利要求1或者2所述的氮化物半导体元件,其特征在于:上述n型氮化物半导体层的膜厚是60以下。
4、根据权利要求1~3中的任何一项所述的氮化物半导体元件,其特征在于:
在上述n型氮化物半导体层中掺杂有Si,在上述p型氮化物半导体层中掺杂有Mg。
5、根据权利要求1~3中的任何一项所述的氮化物半导体元件,其特征在于:
上述n型氮化物半导体层由掺杂了Si的GaN构成,上述p型氮化物半导体层由掺杂了Mg的GaN构成。
6、根据权利要求1~3中的任何一项所述的氮化物半导体元件,其特征在于:
上述n型氮化物半导体层是未掺杂层,在上述p型氮化物半导体层中掺杂有Mg。
7、根据权利要求1~3中的任何一项所述的氮化物半导体元件,其特征在于:
上述n型氮化物半导体层由未掺杂GaN构成,上述p型氮化物半导体层由掺杂了Mg的GaN构成。
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CN103489972A (zh) * | 2013-09-24 | 2014-01-01 | 西安神光皓瑞光电科技有限公司 | 一种抗静电击穿的led结构 |
CN106098878A (zh) * | 2016-06-28 | 2016-11-09 | 华灿光电(苏州)有限公司 | 一种发光二极管外延片及其制作方法 |
CN109346573A (zh) * | 2018-09-21 | 2019-02-15 | 华灿光电(苏州)有限公司 | 一种氮化镓基发光二极管外延片及其制备方法 |
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US6872986B2 (en) | 2005-03-29 |
KR100803102B1 (ko) | 2008-02-13 |
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EP1403932A1 (en) | 2004-03-31 |
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