CN1466781A - 光接收元件和具有光接收元件的光子半导体器件 - Google Patents

光接收元件和具有光接收元件的光子半导体器件 Download PDF

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CN1466781A
CN1466781A CNA018165303A CN01816530A CN1466781A CN 1466781 A CN1466781 A CN 1466781A CN A018165303 A CNA018165303 A CN A018165303A CN 01816530 A CN01816530 A CN 01816530A CN 1466781 A CN1466781 A CN 1466781A
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light
emitting component
semiconductor substrate
electrode
receiving region
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CN1217422C (zh
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西村晋
本多正治
上山孝二
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Sanyo Electric Co Ltd
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Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
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Abstract

一种光接收元件,具有形成于半导体衬底顶面一部分以便起到光接收区域作用的光电二极管,并且具有在半导体衬底顶部不形成光接收区域的地方形成的发光元件装配电极。高浓度杂质层沿着发光元件装配电极的围缘在半导体衬底顶面下形成。这有助于防止施加到发光元件装配电极的电压影响光接收元件的输出。可选地,一种光子半导体器件,具有发光元件和光接收元件,并且具有平行于发光元件发光方向而形成的光接收元件的光接收区域。发光元件的布置,使得当以平面图观看时,其发光点与光接收区域的至少一部分重叠。这允许容易地安装即使具有低发光点的发光元件,因此有助于减小光接收灵敏度的变化。

Description

光接收元件和具有光接收元件的光子半导体器件
技术领域
本发明涉及一种光接收元件,其适合于监测器件的光输出,例如用于光通信的发光二极管或半导体激光器,其输出单一波长的光,并且涉及一种具有这种光接收元件的光子半导体器件。
背景技术
传统光子半导体器件,以半导体激光器为代表,具有用于监测发光元件光输出的光接收元件,并且施加到发光元件的电压基于由光接收元件检测的光能级来控制,以便保持发光元件的光输出恒定。图19是显示传统光子半导体器件一个实例的截面图。在图19中所示的光子半导体器件中,n型低浓度杂质层(n-层)6位于n型高浓度杂质层(n+层)5的顶部以形成硅衬底2,并且就在该硅衬底2的一部分的顶面下,扩散有p型杂质例如硼的扩散层(p+层)6形成,以形成PIN型光电二极管,它起到光接收元件1的作用。在硅衬底2的顶面上,氧化硅等的绝缘层8形成。而且,在绝缘层8的顶部,在硅衬底2的顶面上没有形成扩散层8的地方,发光元件装配电极10形成,发光元件18用导电粘合剂B例如Ag胶固定于发光元件装配电极10上(参看,例如,日本专利申请公开号H6-53603的公开)。
如上所述构造的传统光子半导体器件受到电荷,例如由施加到发光元件装配电极10的电压产生的电荷,对光接收元件1输出的有害影响。
而且,它也受到光接收元件1的输出Im根据从绝缘层8的顶面到发光元件18的发光点(激活层)18b的高度H的改变而改变。图20显示高度H和光接收元件18的输出电流Im之间的关系。该图显示,对于H=10μm和130μm时,从发光元件的发光点18b到光接收区域4的距离L和输出电流Im之间的关系。当高度H等于130μm(实线)时,光接收元件的输出电流Im恒定,而不管从发光点到光接收区域的距离L;相反,当高度H等于低至10μm(虚线)时,光接收元件的输出电流Im随距离L增加而急剧地减小。另一方面,为了允许在发光点产生的热量通过半导体衬底有效地排出,发光元件需要具有尽可能小的高度H。因此,以尽可能接近于零的距离L来安装发光元件通常需要高精度。
而且,非常不方便地,基于氮化镓等的发光元件易于在包括它们的器件的制造过程中被在工人身上积累的静电损坏。
发明内容
本发明的一个目的在于提供一种光接收元件,它的输出不受,例如,施加到发光元件装配于其上的电极电压的影响,并且提供一种具有这种光接收元件的光子半导体器件。
本发明的另一个目的在于提供一种光子半导体器件,其允许容易地安装即使具有低发光点的发光元件,并且光接收灵敏度几乎没有变化。
本发明的再一个目的在于提供一种光子半导体器件,其防止发光元件在它制造过程中的被静电所损坏。
为了实现上述目的,根据本发明的一个方面,光接收元件具有光电二极管,其在半导体衬底顶面的一部分形成,以便起到光接收区域的作用,并且具有发光元件装配电极,其在半导体衬底顶部没有形成光接收区域的地方形成。另外,高浓度杂质层在半导体衬底的顶面下沿着发光元件装配电极的围缘形成。
这里,也可能在半导体衬底顶面上形成光接收区域和不形成光接收区域的地方形成绝缘层,并且在绝缘层的顶部形成发光元件装配电极。为了更好地散热,也可能在绝缘层中形成的通孔上形成发光元件装配电极,使得电极与半导体衬底通过通孔直接接触。
为了更高的生产率和更低的成本,也可能仅沿着面向光接收区域的边缘形成高浓度杂质层。
根据本发明的另一个方面,光子半导体器件具有光电二极管,其在半导体衬底顶面的一部分形成,以便起到光接收区域的作用,具有发光元件装配电极,其在半导体衬底顶部没有形成光接收区域的地方形成,并且具有发光元件,其装配于发光元件装配电极上。另外,高浓度杂质层在半导体衬底的顶面下沿着发光元件装配电极的围缘形成。
这里,为了更好地散热,也可能在半导体衬底顶面上形成光接收区域和不形成光接收区域的地方形成绝缘层,并且在绝缘层中形成的通孔上形成发光元件装配电极,使得电极与半导体衬底通过通孔直接接触。为了防止发光元件电涌,也可能使半导体衬底的电阻高于发光元件的操作状态电阻,并且保持在发光元件上形成的两个表面电极中,不与发光元件装配电极接触的一个处于与半导体衬底底面电极相同的电势。在这种情况下,半导体衬底的电阻优选地为50~15,000Ω。
根据本发明的再一个方面,光子半导体器件具有发光元件和光接收元件,并且具有平行于发光元件发光的方向而形成的光接收元件的光接收区域。另外,布置发光元件,使得当以平面图观看时,其发光点与光接收区域至少一部分重叠。
这里,发光元件优选地是半导体激光器。从光接收元件的顶面到发光元件的发光点的高度优选地是120μm或更小。
为了防止发光元件电涌,优选地,光接收元件是形成于半导体衬底顶面一部分的光电二极管,发光元件装配电极在半导体衬底顶部上形成,发光元件装配在发光元件装配电极上,半导体衬底的电阻高于发光元件的操作状态电阻,保持在发光元件上形成的两个表面电极中,不与发光元件装配电极接触的一个处于与半导体衬底底面电极相同的电势。在这种情况下,半导体衬底的电阻优选地为50~15,000Ω。
附图说明
图1是显示本发明第一实施方案的光接收元件和光子半导体器件一个实例的纵截面图。
图2是图1中所示光子半导体器件的平面图。
图3是显示第一实施方案的光接收元件另一实例的平面图。
图4是显示第一实施方案的光接收元件和光子半导体器件另一实例的纵截面图。
图5是显示第一实施方案的光接收元件和光子半导体器件一个实例的平面图,其中包括具有两个表面电极在同一面上的发光元件。
图6是沿着图5中所示光子半导体器件的线II-II的截面图。
图7是显示第一实施方案的光接收元件和光子半导体器件另一实例的平面图,其中包括具有两个表面电极在同一面上的发光元件。
图8是装配在半导体激光器上的第一实施方案光子半导体器件的平面图。
图9是显示第一实施方案的光接收元件和光子半导体器件另一实例的纵截面图。
图10是图9中所示光子半导体器件的平面图。
图11是装配在半导体激光器上的第一实施方案光子半导体器件的另一平面图。
图12是显示半导体衬底电阻R和发光元件静电耐压之间关系的图表。
图13装配在半导体激光器上的第一实施方案光子半导体器件的平面图,其中包括具有两个表面电极在同一面上的发光元件。
图14是显示本发明第二实施方案的光子半导体器件一个实例的纵截面图。
图15是图14中所示光子半导体器件的平面图。
图16是显示第二实施方案的光子半导体器件另一实例的平面图。
图17是沿着图16中所示光子半导体器件的线V-V的截面图。
图18是显示第二实施方案的光子半导体器件的平面图,其中包括具有两个表面电极在同一面上的发光元件。
图19是显示传统光子半导体器件一个实例的纵截面图。
图20是显示在发光元件发光点的不同高度,从发光元件的距离和光接收元件的输出电流之间关系的图表。
具体实施方式
首先,本发明第一实施方案的光接收元件和光子半导体器件将参考附图来描述。图1是第一实施方案的光接收元件和光子半导体器件一个实例的纵截面图(沿着图2中所示的线I-I),而图2是其平面图。
在图1中所示的光接收元件1中,n型低浓度杂质层(n-层)6位于扩散有n型杂质例如磷的n型高浓度杂质层(n+层)5的顶部,以形成硅衬底(半导体衬底)2,并且,就在硅衬底2的一部分的顶面下,掺杂p型杂质例如硼的高浓度杂质层(p+层)3形成,以形成PIN型光电二极管。这里,p型杂质层3形成的部分起到光接收区域4(图2中所示)的作用。
另外,沿着划分给在硅衬底1顶部没有形成光接收区域4的地方形成的发光元件装配电极(也称作“装配电极”)10的围缘,n型高浓度杂质层11通过选择性地扩散n型杂质例如磷而在硅衬底2的顶面下形成(参看图2)。该杂质层的杂质浓度优选地与杂质层3的杂质浓度一样或高于杂志层3的杂质浓度。沿着装配电极10的围缘而形成的高浓度杂质层11的导电型可以是p型或者n型。
如图3中所示,高浓度杂质层11可以沿着装配电极10的仅部分围缘,特别地仅沿着面向光接收区域4的边缘而形成。在图1中,当以平面图观看时,高浓度杂质层11被装配电极10部分地覆盖,并且部分未覆盖。但是,只要它基本上位于装配电极10和光接收区域4之间,当以平面图观看时,高浓度杂质层11可以被装配电极10完全覆盖,或者可以完全暴露。
在图1中,在硅衬底2的顶面上,氧化硅等的绝缘膜8形成,用于保护表面和防止反射。为了从光接收区域4(图2中所示)提取信号,通孔8a在绝缘膜8中光接收区域4上形成,然后金属例如铝蒸汽沉积于顶部,然后金属不必要的部分通过光刻蚀法移除,以形成与p型杂质层3接触的信号电极9。当金属沉积于绝缘膜8上并且金属多余的部分被移除时,装配衬底10同时地在绝缘膜8上没有形成光接收区域4的地方形成。在硅衬底2的底面上,形成金等的底面电极12。
然后,在这样形成于光接收元件1上的装配电极10上,用导电粘合剂B例如Ag胶固定发光元件18。
在该光子半导体器件中,高浓度杂质层11在装配电极10和光接收区域4之间形成,因此在硅衬底2中由施加到装配电极10的电压产生的有害电荷被高浓度杂质层11有效地吸收。这有助于减少有害电荷对出现在信号电极9的输出的影响,因此使它对光接收元件1的照明度-输出电流特性的有害影响减到最小。而且,可以使光接收区域4和装配电极10之间的距离比传统所需的距离短。这有助于使器件的外形小型化。
图1中所示的光接收元件1是PIN型光接收元件。但是,无需说明,光接收元件1可以是PN型光接收元件。使用p型和n型电导性完全相反的组合也在本发明的范围内。
图4是显示第一实施方案的光接收元件和光子半导体器件另一实例的纵截面图。图4中所示的器件其特征在于装配电极10在绝缘膜8中形成的通孔8b上形成,使得装配电极10与硅衬底2直接接触。这使得能够通过硅衬底2有效地排散由发光元件18产生的热量。在其它方面,该器件具有与图1中所示相同的结构。因此,当所使用的发光元件18需要有效散热时或者当绝缘膜8具有低导热性时,该实例的结构是有用的。
在此之前,仅涉及具有表面电极它们顶面和底面的发光元件。现在,将给出使用具有两个表面电极在同一面上的发光元件的情况的描述。这种发光元件的实例包括基于氮化镓的发光元件。
图5是包括具有两个表面电极在同一面上的发光元件18’的光子半导体器件的平面图,而图6是沿着图5中所示的线II-II的截面图。该光子半导体器件不同于图4中所示在于两个装配电极形成于绝缘层的顶部,而在其它方面,这两种器件具有基本上相同的结构。
在图6中,在绝缘膜8顶部形成的两个装配电极10a和10b中,一个(第一装配电极)10a在绝缘膜8中形成的通孔8b上形成,并且通过通孔8b与硅衬底2直接接触;另一个(第二装配电极)10b在绝缘膜8的顶部形成,并且不与硅衬底2接触。发光元件18’用导电粘合剂B固定,使得它的两个表面电极181和182分别连接到第一和第二表面电极10a和10b。
在图5中所示的光子半导体器件中,高浓度杂质层11沿着第一装配电极10a的围缘在硅衬底2的顶面下形成。但是,如图7中所示,高浓度杂质层11可以仅沿着第一装配电极10a面向光接收区域4的边缘而形成。
图8是装配于半导体激光器器件上的第一实施方案光子半导体器件的平面图。这里用作发光元件的是具有表面电极在其顶面和底面的半导体激光器元件18。
在该半导体激光器器件13a中,在通过耦合并固定三个引线14,15和16到树脂框架17而形成的组件上,图4中所示的光子半导体器件M被放置,然后通过丝焊法接线到引线14,15和16。引线14,15和16在引线框架外面形成,并且由主引线15,和副引线14和16组成,主引线15的末端形成到放置光子半导体器件M的区域中。
主引线15具有整体形成用于散热的散热片19a和19b,其从树脂框架17向右和向左伸出。光接收元件1,在它的底面电极12(图4中所示),用导电粘合剂(没有显示)例如Ag胶,固定于在主引线15末端的元件放置区域上。
在光接收元件1顶面上的装配电极10上,半导体激光器元件18用导电粘合剂B(图4中所示)固定。这样,半导体激光器元件18的底面电极(没有显示)电连接到装配电极10。没有被半导体激光器元件18覆盖的装配电极10的暴露部分用焊线W1连接到主引线15。
而且,半导体激光器元件18的顶面电极181用焊线W2连接到副引线16,并且光接收元件1的信号电极9用焊线W3连接到副引线14。
在如上所描构造的这种半导体激光器器件13a中,当预先确定的激光器驱动电压施加到主引线15和副引线16之间时,驱动电压施加到半导体激光器元件18的顶面和底面电极之间,结果半导体激光器元件18振荡并沿着轴X发射激光。在图中向下发射的部分激光入射到光接收元件1的光接收区域4上,导致预先确定的监测信号出现在信号电极9。
该信号从副引线14和主引线15之间提取,然后以预先确定的方式处理,使得施加到半导体激光器元件18的电压受控制,以保持半导体激光器元件18的光输出恒定。
虽然半导体激光器元件在上述实例中用作发光元件,应该明白的是,本发明适用于使用半导体激光器元件之外任意其它类型的发光元件,例如LED元件的光子半导体器件。
在使用易于被反向电压损坏的发光元件,例如基于氮化镓的发光元件的情况下,为了保护发光元件在制造过程中不受静电(以下也称作“电涌”)等的损坏,优选地以下述方式构造光子半导体器件并将其装配到发光器件上。特别地,使光接收元件的半导体衬底的电阻高于发光元件的操作状态电阻。另外,保持在发光元件上形成的两个表面电极中,不连接到与半导体衬底接触的装配电极的一个处于与半导体衬底的底面电极相同的电势,进一步优选地都处于地电势。
首先,将描述这种光子半导体器件的结构。图9和10分别是光子半导体器件的侧截面图和平面图。在这些图中,与图4中所示器件的明显不同在于高浓度杂质层11部分地形成,也就是,仅沿着装配电极10面向光接收区域4的边缘。另一方面,本质不同在于使从装配电极10底面到n型低浓度杂质层(n-层)6底面的电阻R高于发光元件18的操作状态电阻(高浓度杂质层5的电阻6太低以致在这里可以忽略)。
n型低浓度杂质层6的电阻R由下面所示的等式给出。因此,电阻R可以通过改变装配电极10与杂质层6直接接触的面积S,杂质层6的厚度d,和杂质层6的电阻率k而调节,使得高于发光元件的操作状态电阻。
R=k×(d/S)                                   (1)
接下来,将描述该光子半导体器件如何装配到发光器件上。图11是装配到半导体激光器器件上的上述光子半导体器件M的平面图。该半导体激光器器件13b具有与图8中所示器件基本上相同的结构,因此对这两个器件公共的说明将省略。现在将描述与图8中所示器件的不同,也就是电极之间的接线。
没有被发光元件18覆盖的装配电极10的暴露部分用焊线W1连接到副引线16。发光元件18的顶面电极181用焊线W3连接到主引线15。光接收元件1的信号电极9用焊线W3连接到副引线14。
在如上所述构造的这种半导体激光器器件13b中,形成两个电流通路电路。一个从副引线16到焊线W1,然后到装配电极10,然后到发光元件18,然后到顶面电极181,然后到焊线W2,然后到主引线15,形成第一电流通路电路。另一个从副引线16到焊线W1,然后到装配电极10,然后到光接收元件1的低浓度杂质层6(图9中所示),然后到光接收元件1的高浓度杂质层5(图9中所示),然后到底面电极12(图9中所示),然后到主引线15,形成第二电流通路电路。
当预先确定的电流或预先确定的激光器驱动电压在主引线15和副引线16之间的正向供给时,因为n型低浓度杂质层6的电阻R高于发光元件18的操作状态电阻,电流通过第一电流通路电路流动。因此,发光元件18振荡并沿着轴X发射激光。
相反,当静电等导致电压在主引线15和副引线16之间的反向施加时,电流主要通过第二电流通路电路流动。这防止发光元件18的损坏。
图12显示n型低浓度杂质层6的电阻R和半导体激光器器件中半导体激光器元件的静电耐压之间的关系。当电阻R大约为16,000Ω时,静电耐压大约为100V(图中的组A);当电阻R大约为5,000Ω时,静电耐压大约为170V(图中的组B)。因此,该图显示,电阻R越低,静电耐压越高。一般地,希望发光元件经得住120V或更高的静电电压,虽然这依赖于类型,因此电阻R的优选上限是15,000Ω。另一方面,如果电阻R低于发光元件的操作状态电阻,更多的电流通过第二电流电路流动,从而使得发光元件不能发光。因此,电阻R的优选下限是50Ω。
在光子半导体器件中使用具有两个表面电极在同一面上的发光元件的情况中,以下述方式接线电极是适当的,以保护发光元件不受电涌损坏。应该注意的是,这里所使用的光子半导体器件是图6中所示的器件,并且使从第一装配电极10a的底面到n型低浓度杂质层6的底面的电阻R高于发光元件18’的操作状态电阻(高浓度杂质层5的电阻太低以致在这里可以忽略)。
图13是装配于半导体激光器器件上的这种光子半导体器件的平面图。没有被半导体激光器元件18’覆盖的第一装配电极10a的暴露部分用焊线W1连接到副引线16。第二装配电极10b用焊线W2连接到主引线15。信号电极9用焊线W3连接到副引线14。
如在前面的实例中一样,在半导体激光器器件13c中,作为电极这样接线的结果,形成两个电流通路电路。一个从副引线16到焊线W1,然后到第一装配电极10a,然后到半导体激光器元件18’,然后到第二装配电极10b,然后到焊线W2,然后到主引线15,形成第一电流通路电路。另一个从副引线16到焊线W1,然后到第一装配电极10a,然后到光接收元件1的低浓度杂质层6(图6中所示),然后到光接收元件1的高浓度杂质层5(图6中所示),然后到底面电极12(图6中所示),然后到主引线15,形成第二电流通路电路。
作为这种接线的结果,如在前面的实例中一样,当预先确定的电流或预先确定的激光器驱动电压在主引线15和副引线16之间的正向供给时,电流通过第一电流通路电路流动。因此,半导体激光器元件18’振荡并沿着轴X发射激光。相反,当静电等导致电压在主引线15和副引线16之间的反向施加时,电流主要通过第二电流通路电路流动。这防止半导体激光器元件18’的损坏。
接下来,本发明第二实施方案的光子半导体器件将参考附图来描述。图14是显示第二实施方案的光子半导体器件一个实例的纵截面图(沿着图15中所示的线IV-IV),而图15是其平面图。
在图14中所示的光接收元件1中,n型低浓度杂质层(n-层)6位于扩散有n型杂质例如磷的n型高浓度杂质层(n+层)5顶部,以形成硅衬底(半导体衬底)2,并且,就在硅衬底2的一部分的顶面下,掺杂p型杂质例如硼的高浓度杂质层(p+层)3形成,以形成PIN型光接收元件。无需说明,可以改为形成PN型光接收元件,或者可以使用p型和n型导电性的完全相反的组合。这里,p型杂质层3形成的部分起到光接收区域4(图15中所示)的作用。如将从图15中清楚的,在图14中所示的光子半导体器件中,光接收区域4侧边的一部分被伸出以形成突出部分4a。
另一方面,在硅衬底2的顶面上,形成氧化硅等的绝缘膜8,用于保护表面和防止反射。为了从光接收区域4提取信号,通孔8a在绝缘层8中光接收区域4上形成,然后金属例如铝蒸汽沉积于顶部,然后金属不必要的部分通过光刻蚀法移除,以形成与p型杂质层3接触的信号电极9。以类似的方式,装配电极10在绝缘膜8上形成。在硅衬底2的底面上,形成金等的底面电极12。
然后,在这样形成于光接收元件1上的装配电极10上,用导电粘合剂B例如Ag胶固定发光元件18。发光元件18是旁放射型半导体激光器元件,其具有位于图14中它的右和左侧面上的发光点18a和18b,并且具有接近它的底部的激活层用于最大散热。在本实例中,发光元件18具有布置于它的顶面和底面上的正和负表面电极。
这里重要的是,当光子半导体器件以平面图观看时,发光元件18的发光点18b与光接收区域4的突出部分4a重叠。具有这种结构,即使发光元件18固定的位置轻微地改变,也能够保持图20中L=0,也就是,能够高灵敏度地从发光点接收光。
图16和17显示第二实施方案的光子半导体器件的另一实例。图16是第二实施方案的光子半导体器件的平面图,而图17是其沿着图16中所示的线V-V的截面图。现在,将描述该器件与图14中所示器件的主要不同,对这两个器件公共的说明省略。
第一个不同在于,具有与p型高浓度杂质层3一样高或更高的杂质密度的高浓度杂质层11,沿着装配电极10的围缘在硅衬底2的顶面下形成。该高浓度杂质层11通过选择性地扩散n型杂质例如磷来形成。该高浓度杂质层11的导电型可以是p型或者n型。
该高浓度杂质层11位于光接收区域4和装配电极10之间,并且有效地吸收硅衬底2中由施加到装配电极10的电压产生的有害电荷。这有助于使对光接收元件1的照明-输出电流特性的有害影响减到最小。因此,可以使光接收区域4和装配电极10之间的距离比不形成高浓度杂质层11的地方短。这有助于使器件小型化。
第二个不同在于,既然高浓度杂质层11在硅衬底2的顶面下形成,以保证光接收区域4的突出部分4a和发光元件18的发光点18b之间足够的重叠,凹入部分10a在装配电极10面向光接收区域4的突出部分4a的一侧形成。结果,当以平面图观看时,装配电极10的凹入部分10a吻合光接收区域4的突出部分4a,因此位于发光元件18背面中心的发光点18b位于突出部分4a上。这使得能够高灵敏度地从发光点18b接收光。
第三个不同在于,装配电极10在绝缘膜8中形成的通孔8b上形成,使得装配电极10的较大部分与硅衬底2直接接触。如前面所描述的,该结构,与装配电极简单地在绝缘膜8顶部形成的结构相比较,增强发光元件18的散热特性。
而且,通过最优化硅衬底2的电阻,即使有害的高压例如电涌施加到发光元件18时,也能够使装配电极10和硅衬底2起到这种电压的放电路径的作用。这增加发光元件18的静电耐压。
接下来,将给出使用具有两个表面电极在同一面上的发光元件的情况的描述。图18是包括具有两个表面电极在同一面上的发光元件的光子半导体器件的平面图。该光子半导体器件不同于图17中所示器件在于,两个装配电极形成于绝缘层的顶部,而在其它方面,这两个器件具有基本上相同的结构。
在图18中,光接收区域4具有矩形形状,突出部分4a形成使得从它的左侧中部向左伸出。另一方面,在绝缘膜8的顶部形成的两个装配电极10a和10b中,一个(第一装配电极)10a在绝缘膜8中形成的通孔8b上形成,并且具有矩形形状,其中面向光接收区域4的突出部分4a的部分(右下角)被截去;另一个(第二装配电极)10b也具有矩形形状,其中面向光接收区域4的突出部分4a的部分(右上角)被截去。另外,如前所述的高浓度杂质层11沿着第一装配电极10a的围缘在硅衬底2的顶面下形成,并且该高浓度杂质层11也具有矩形形状,其中面向光接收区域4的突出部分4a的部分(右下角)被截去。发光元件18’用导电粘合剂(没有显示)来固定,使得它的两个表面电极181和182分别与第一和第二装配电极10a和10b接触。
具有这种结构,即使使用具有两个表面电极181和182在同一面上的发光元件18’,也能够保证光接收区域4的突出部分4a和发光元件18’的发光点18b之间足够的重叠,因此能够高灵敏度地从发光点18b接收光。
当上述第二实施方案的光子半导体器件装配到半导体激光器器件等上时,也可以采用图8,11和13中所示的结构。为了防止发光元件被电涌损坏,采用图11或13中所示的接线是适当的。
工业适用性
在第一实施方案的光接收元件中,以及在使用它的光子半导体器件中,光接收元件的输出不受施加到发光元件装配于其上的电极电压或者类似因素的影响。而且,保护发光元件在制造过程中不被静电损坏。
在第二实施方案的光子半导体器件中,发光元件可以容易地安装,即使它具有低发光点。这有助于减少光接收灵敏度的变化。

Claims (13)

1.一种光接收元件,具有形成于半导体衬底顶面的一部分以便起到光接收区域作用的光电二极管,并且具有在半导体衬底顶部不形成光接收区域的地方形成的发光元件装配电极,
其中高浓度杂质层沿着发光元件装配电极的围缘在半导体衬底的顶面下形成。
2.如权利要求1中的光接收元件,
其中绝缘层在半导体衬底顶面上形成光接收区域和不形成光接收区域的地方形成,并且发光元件装配电极在绝缘层的顶部形成。
3.如权利要求2中的光接收元件,
其中发光元件装配电极在绝缘层中形成的通孔之上形成,并且电极通过通孔与半导体衬底直接接触。
4.如权利要求1~3之一中的光接收元件,
其中高浓度杂质层仅沿着面向光接收区域的边缘而形成。
5.一种光子半导体器件,具有形成于半导体衬底顶面的一部分以便起到光接收区域作用的光电二极管,具有在半导体衬底顶部不形成光接收区域的地方形成的发光元件装配电极,并且具有装配在发光元件装配电极上的发光元件,
其中高浓度杂质层沿着发光元件装配电极的围缘在半导体衬底顶面下形成。
6.如权利要求5中的光子半导体器件,
其中绝缘层在半导体衬底顶面上形成光接收区域和不形成光接收区域的地方形成,发光元件装配电极在绝缘层中形成的通孔之上形成,并且电极通过通孔与半导体衬底直接接触。
7.如权利要求6中的光子半导体器件,
其中半导体衬底的电阻高于发光元件的操作状态电阻,并且,在发光元件上形成的两个表面电极中,不与发光元件装配电极接触的表面电极处于与半导体衬底底面电极相同的电势。
8.如权利要求7中的光子半导体器件,
其中半导体衬底的电阻为50~15,000Ω。
9.一种光子半导体器件,具有发光元件和光接收元件,并且具有平行于发光元件发光方向而形成的光接收元件的光接收区域,
其中发光元件的布置,使得当以平面图观看时,其发光点与光接收区域的至少一部分重叠。
10.如权利要求9中的光子半导体器件,
其中发光元件是半导体激光器。
11.如权利要求9或10中的光子半导体器件,
其中从光接收元件的顶面到发光元件的发光点的高度是120μm或更小。
12.如权利要求9~11之一中权利要求的光子半导体器件,
其中光接收元件是形成于半导体衬底顶面一部分的光电二极管,发光元件装配电极在半导体衬底的顶部形成,并且发光元件装配在发光元件装配电极上,
其中半导体衬底的电阻高于发光元件的操作状态电阻,并且,在发光元件上形成的两个表面电极中,不与发光元件装配电极接触的表面电极处于与半导体衬底底面电极相同的电势。
13.如权利要求12中的光子半导体器件,
其中半导体衬底的电阻为50~15,000Ω。
CN018165303A 2000-09-29 2001-09-27 光接收元件和具有光接收元件的光子半导体器件 Expired - Fee Related CN1217422C (zh)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101859763A (zh) * 2009-04-09 2010-10-13 英飞凌科技股份有限公司 包括esd器件的集成电路
CN106448030A (zh) * 2015-08-13 2017-02-22 西门子瑞士有限公司 烟雾探测单元以及发光二极管

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070001177A1 (en) * 2003-05-08 2007-01-04 Koninklijke Philips Electronics N.V. Integrated light-emitting diode system
KR100587019B1 (ko) * 2005-02-25 2006-06-08 삼성전기주식회사 모니터용 포토다이오드 일체형 발광 다이오드 패키지
DE102006040641A1 (de) * 2006-08-30 2008-03-13 Robert Bosch Gmbh Leuchtmodul
EP2031714B1 (fr) 2007-08-31 2010-08-18 EM Microelectronic-Marin SA Circuit optoélectronique ayant un photorécepteur et une diode laser, et module le comprenant
JP6105428B2 (ja) * 2013-07-29 2017-03-29 京セラ株式会社 受発光素子
EP3065185A4 (en) * 2013-10-30 2017-08-02 Kyocera Corporation Light reception/emission element and sensor device using same
CN105513975A (zh) * 2016-01-29 2016-04-20 中国电子科技集团公司第四十四研究所 易扩展的集成式光电耦合器及其制作方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63164264A (ja) 1986-12-25 1988-07-07 Sony Corp メモリ装置
JP2540850B2 (ja) 1987-03-25 1996-10-09 ソニー株式会社 半導体レ−ザ
JPS63253690A (ja) 1987-04-10 1988-10-20 Nec Corp 光半導体装置
JPH0642357Y2 (ja) * 1987-04-14 1994-11-02 ソニー株式会社 光半導体装置
JPH0284358A (ja) 1988-09-21 1990-03-26 Canon Inc 両面印刷装置
JPH0758806B2 (ja) 1988-11-18 1995-06-21 松下電子工業株式会社 光半導体装置
JP2546974Y2 (ja) * 1988-12-19 1997-09-03 ローム 株式会社 レーザダイオードユニット
JPH0563309A (ja) 1991-09-04 1993-03-12 Fuji Electric Co Ltd 半導体レーザ装置
JPH0745912A (ja) 1993-07-30 1995-02-14 Sony Corp 半導体レーザ装置
JP3188157B2 (ja) 1994-11-30 2001-07-16 シャープ株式会社 半導体レーザ装置用受光素子およびこれを用いた半導体レーザ装置
JP2001034983A (ja) * 1999-07-14 2001-02-09 Sankyo Seiki Mfg Co Ltd 光ピックアップ装置用受発光素子

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101859763A (zh) * 2009-04-09 2010-10-13 英飞凌科技股份有限公司 包括esd器件的集成电路
CN106448030A (zh) * 2015-08-13 2017-02-22 西门子瑞士有限公司 烟雾探测单元以及发光二极管
CN106448030B (zh) * 2015-08-13 2019-06-18 西门子瑞士有限公司 烟雾探测单元以及发光二极管

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