CN1437728A - 多组、容错、高性能存储器寻址系统及其方法 - Google Patents
多组、容错、高性能存储器寻址系统及其方法 Download PDFInfo
- Publication number
- CN1437728A CN1437728A CN00819216A CN00819216A CN1437728A CN 1437728 A CN1437728 A CN 1437728A CN 00819216 A CN00819216 A CN 00819216A CN 00819216 A CN00819216 A CN 00819216A CN 1437728 A CN1437728 A CN 1437728A
- Authority
- CN
- China
- Prior art keywords
- address
- memory
- memory device
- group number
- storer
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0607—Interleaved addressing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/472,930 | 1999-12-27 | ||
| US09/472,930 US6381669B1 (en) | 1999-12-27 | 1999-12-27 | Multi-bank, fault-tolerant, high-performance memory addressing system and method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1437728A true CN1437728A (zh) | 2003-08-20 |
Family
ID=23877479
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN00819216A Pending CN1437728A (zh) | 1999-12-27 | 2000-12-26 | 多组、容错、高性能存储器寻址系统及其方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US6381669B1 (enExample) |
| EP (1) | EP1247185A4 (enExample) |
| JP (1) | JP5089842B2 (enExample) |
| KR (1) | KR100781132B1 (enExample) |
| CN (1) | CN1437728A (enExample) |
| AU (1) | AU2455201A (enExample) |
| WO (1) | WO2001048610A1 (enExample) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102035865A (zh) * | 2009-09-30 | 2011-04-27 | 阿里巴巴集团控股有限公司 | 数据存储及数据寻址方法、系统和设备 |
| CN103399827A (zh) * | 2013-07-25 | 2013-11-20 | 华为技术有限公司 | 存储装置、执行访问操作的系统和方法 |
| CN105518632A (zh) * | 2013-09-27 | 2016-04-20 | 高通股份有限公司 | 用于存储器交错的可配置扩展函数 |
| CN103914390B (zh) * | 2013-01-06 | 2016-08-17 | 北京忆恒创源科技有限公司 | 存储设备 |
| CN110350922A (zh) * | 2019-07-18 | 2019-10-18 | 南京风兴科技有限公司 | 一种二进制编码的寻址方法及寻址器 |
| CN114385089A (zh) * | 2022-03-22 | 2022-04-22 | 北京清微智能信息技术有限公司 | 一种基于交叉编址的动态bank存储方法、装置及电子设备 |
Families Citing this family (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6748480B2 (en) * | 1999-12-27 | 2004-06-08 | Gregory V. Chudnovsky | Multi-bank, fault-tolerant, high-performance memory addressing system and method |
| JP2002064145A (ja) * | 2000-06-09 | 2002-02-28 | Fujitsu Ltd | 冗長素子を備える集積回路チップ、マルチプロセッサおよびその製法 |
| US6671822B1 (en) * | 2000-08-31 | 2003-12-30 | Hewlett-Packard Development Company, L.P. | Method and system for absorbing defects in high performance microprocessor with a large n-way set associative cache |
| US6968300B2 (en) * | 2001-01-26 | 2005-11-22 | Dell Products L.P. | Computer system and printed circuit board manufactured in accordance with a quasi-Monte Carlo simulation technique for multi-dimensional spaces |
| US6765580B2 (en) * | 2001-02-15 | 2004-07-20 | Sony Corporation | Pixel pages optimized for GLV |
| US6828977B2 (en) * | 2001-02-15 | 2004-12-07 | Sony Corporation | Dynamic buffer pages |
| US6795079B2 (en) * | 2001-02-15 | 2004-09-21 | Sony Corporation | Two-dimensional buffer pages |
| US6850241B2 (en) * | 2001-02-15 | 2005-02-01 | Sony Corporation | Swapped pixel pages |
| US7038691B2 (en) * | 2001-02-15 | 2006-05-02 | Sony Corporation | Two-dimensional buffer pages using memory bank alternation |
| US6992674B2 (en) * | 2001-02-15 | 2006-01-31 | Sony Corporation | Checkerboard buffer using two-dimensional buffer pages and using state addressing |
| US6801204B2 (en) * | 2001-02-15 | 2004-10-05 | Sony Corporation, A Japanese Corporation | Checkerboard buffer using memory blocks |
| US6831650B2 (en) * | 2001-02-15 | 2004-12-14 | Sony Corporation | Checkerboard buffer using sequential memory locations |
| US6791557B2 (en) * | 2001-02-15 | 2004-09-14 | Sony Corporation | Two-dimensional buffer pages using bit-field addressing |
| US7379069B2 (en) * | 2001-02-15 | 2008-05-27 | Sony Corporation | Checkerboard buffer using two-dimensional buffer pages |
| US6831651B2 (en) * | 2001-02-15 | 2004-12-14 | Sony Corporation | Checkerboard buffer |
| US7205993B2 (en) * | 2001-02-15 | 2007-04-17 | Sony Corporation | Checkerboard buffer using two-dimensional buffer pages and using memory bank alternation |
| US6803917B2 (en) * | 2001-02-15 | 2004-10-12 | Sony Corporation | Checkerboard buffer using memory bank alternation |
| US7088369B2 (en) * | 2001-02-15 | 2006-08-08 | Sony Corporation | Checkerboard buffer using two-dimensional buffer pages and using bit-field addressing |
| US6831649B2 (en) * | 2001-02-15 | 2004-12-14 | Sony Corporation | Two-dimensional buffer pages using state addressing |
| US20030058368A1 (en) * | 2001-09-24 | 2003-03-27 | Mark Champion | Image warping using pixel pages |
| US6965980B2 (en) * | 2002-02-14 | 2005-11-15 | Sony Corporation | Multi-sequence burst accessing for SDRAM |
| US7155575B2 (en) * | 2002-12-18 | 2006-12-26 | Intel Corporation | Adaptive prefetch for irregular access patterns |
| US7013378B2 (en) * | 2003-04-30 | 2006-03-14 | Hewlett-Packard Development Company, L.P. | Method and system for minimizing the length of a defect list for a storage device |
| JP4765260B2 (ja) * | 2004-03-31 | 2011-09-07 | 日本電気株式会社 | データ処理装置およびその処理方法ならびにプログラムおよび携帯電話装置 |
| KR100539261B1 (ko) * | 2004-05-04 | 2005-12-27 | 삼성전자주식회사 | 디지털 데이터의 부호화 장치와 dvd로의 기록 장치 및그 방법 |
| US7873776B2 (en) * | 2004-06-30 | 2011-01-18 | Oracle America, Inc. | Multiple-core processor with support for multiple virtual processors |
| US7685354B1 (en) * | 2004-06-30 | 2010-03-23 | Sun Microsystems, Inc. | Multiple-core processor with flexible mapping of processor cores to cache banks |
| FR2889349A1 (fr) * | 2005-07-26 | 2007-02-02 | St Microelectronics Sa | Procede et dispositif de securisation d'un circuit integre, notamment une carte a microprocesseur |
| KR100855467B1 (ko) * | 2006-09-27 | 2008-09-01 | 삼성전자주식회사 | 이종 셀 타입을 지원하는 비휘발성 메모리를 위한 맵핑장치 및 방법 |
| US7694193B2 (en) * | 2007-03-13 | 2010-04-06 | Hewlett-Packard Development Company, L.P. | Systems and methods for implementing a stride value for accessing memory |
| US7472038B2 (en) * | 2007-04-16 | 2008-12-30 | International Business Machines Corporation | Method of predicting microprocessor lifetime reliability using architecture-level structure-aware techniques |
| US20100262751A1 (en) * | 2009-04-09 | 2010-10-14 | Sun Microsystems, Inc. | Memory Control Unit Mapping Physical Address to DRAM Address for a Non-Power-of-Two Number of Memory Ranks Using Lower Order Physical Address Bits |
| US9348751B2 (en) * | 2009-09-25 | 2016-05-24 | Nvidia Corporation | System and methods for distributing a power-of-two virtual memory page across a non-power-of two number of DRAM partitions |
| US9268691B2 (en) | 2012-06-11 | 2016-02-23 | Intel Corporation | Fast mechanism for accessing 2n±1 interleaved memory system |
| US10268601B2 (en) | 2016-06-17 | 2019-04-23 | Massachusetts Institute Of Technology | Timely randomized memory protection |
| US10310991B2 (en) * | 2016-08-11 | 2019-06-04 | Massachusetts Institute Of Technology | Timely address space randomization |
| KR102540964B1 (ko) | 2018-02-12 | 2023-06-07 | 삼성전자주식회사 | 입출력 장치의 활용도 및 성능을 조절하는 메모리 컨트롤러, 애플리케이션 프로세서 및 메모리 컨트롤러의 동작 |
| KR102833051B1 (ko) | 2020-04-20 | 2025-07-11 | 삼성전자주식회사 | 메모리 모듈 및 적층형 메모리 장치 |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6265148A (ja) * | 1985-09-17 | 1987-03-24 | Fujitsu Ltd | メモリアクセス制御方式 |
| JPS63225837A (ja) * | 1987-03-13 | 1988-09-20 | Fujitsu Ltd | 距離付きベクトルアクセス方式 |
| US5063526A (en) * | 1987-06-03 | 1991-11-05 | Advanced Micro Devices, Inc. | Bit map rotation processor |
| JPH063589B2 (ja) * | 1987-10-29 | 1994-01-12 | インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン | アドレス置換装置 |
| US5111389A (en) * | 1987-10-29 | 1992-05-05 | International Business Machines Corporation | Aperiodic mapping system using power-of-two stride access to interleaved devices |
| US5043874A (en) | 1989-02-03 | 1991-08-27 | Digital Equipment Corporation | Memory configuration for use with means for interfacing a system control unit for a multi-processor system with the system main memory |
| JPH04293135A (ja) * | 1991-03-20 | 1992-10-16 | Yokogawa Hewlett Packard Ltd | メモリアクセス方式 |
| JP3532932B2 (ja) | 1991-05-20 | 2004-05-31 | モトローラ・インコーポレイテッド | 時間重複メモリ・アクセスを有するランダムにアクセス可能なメモリ |
| US5526507A (en) * | 1992-01-06 | 1996-06-11 | Hill; Andrew J. W. | Computer memory array control for accessing different memory banks simullaneously |
| US5479624A (en) | 1992-10-14 | 1995-12-26 | Lee Research, Inc. | High-performance interleaved memory system comprising a prime number of memory modules |
| CA2116985C (en) | 1993-03-11 | 1999-09-21 | Cynthia J. Burns | Memory system |
| JP3304531B2 (ja) | 1993-08-24 | 2002-07-22 | 富士通株式会社 | 半導体記憶装置 |
| US5530837A (en) | 1994-03-28 | 1996-06-25 | Hewlett-Packard Co. | Methods and apparatus for interleaving memory transactions into an arbitrary number of banks |
| US6021482A (en) * | 1997-07-22 | 2000-02-01 | Seagate Technology, Inc. | Extended page mode with a skipped logical addressing for an embedded longitudinal redundancy check scheme |
-
1999
- 1999-12-27 US US09/472,930 patent/US6381669B1/en not_active Expired - Fee Related
-
2000
- 2000-12-26 KR KR1020027008395A patent/KR100781132B1/ko not_active Expired - Fee Related
- 2000-12-26 AU AU24552/01A patent/AU2455201A/en not_active Abandoned
- 2000-12-26 EP EP00988335A patent/EP1247185A4/en not_active Withdrawn
- 2000-12-26 WO PCT/US2000/035209 patent/WO2001048610A1/en not_active Ceased
- 2000-12-26 CN CN00819216A patent/CN1437728A/zh active Pending
- 2000-12-26 JP JP2001549196A patent/JP5089842B2/ja not_active Expired - Fee Related
-
2002
- 2002-03-26 US US10/107,079 patent/US6519673B1/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102035865A (zh) * | 2009-09-30 | 2011-04-27 | 阿里巴巴集团控股有限公司 | 数据存储及数据寻址方法、系统和设备 |
| CN103914390B (zh) * | 2013-01-06 | 2016-08-17 | 北京忆恒创源科技有限公司 | 存储设备 |
| CN103399827A (zh) * | 2013-07-25 | 2013-11-20 | 华为技术有限公司 | 存储装置、执行访问操作的系统和方法 |
| CN103399827B (zh) * | 2013-07-25 | 2015-11-25 | 华为技术有限公司 | 存储装置、执行访问操作的系统和方法 |
| US9483428B2 (en) | 2013-07-25 | 2016-11-01 | Huawei Technologies Co., Ltd. | Storage apparatus, and system and method for executing access operations |
| CN105518632A (zh) * | 2013-09-27 | 2016-04-20 | 高通股份有限公司 | 用于存储器交错的可配置扩展函数 |
| CN105518632B (zh) * | 2013-09-27 | 2019-07-09 | 高通股份有限公司 | 用于存储器交错的可配置扩展函数 |
| CN110350922A (zh) * | 2019-07-18 | 2019-10-18 | 南京风兴科技有限公司 | 一种二进制编码的寻址方法及寻址器 |
| CN114385089A (zh) * | 2022-03-22 | 2022-04-22 | 北京清微智能信息技术有限公司 | 一种基于交叉编址的动态bank存储方法、装置及电子设备 |
| CN114385089B (zh) * | 2022-03-22 | 2022-08-05 | 北京清微智能信息技术有限公司 | 一种基于交叉编址的动态bank存储方法、装置及电子设备 |
Also Published As
| Publication number | Publication date |
|---|---|
| US6519673B1 (en) | 2003-02-11 |
| WO2001048610A8 (en) | 2001-11-29 |
| KR20020079764A (ko) | 2002-10-19 |
| KR100781132B1 (ko) | 2007-12-03 |
| WO2001048610A1 (en) | 2001-07-05 |
| JP5089842B2 (ja) | 2012-12-05 |
| US6381669B1 (en) | 2002-04-30 |
| JP2003520368A (ja) | 2003-07-02 |
| EP1247185A1 (en) | 2002-10-09 |
| AU2455201A (en) | 2001-07-09 |
| EP1247185A4 (en) | 2008-01-02 |
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