CN1261928A - Low defect density silicon - Google Patents

Low defect density silicon Download PDF

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CN1261928A
CN1261928A CN98806904A CN98806904A CN1261928A CN 1261928 A CN1261928 A CN 1261928A CN 98806904 A CN98806904 A CN 98806904A CN 98806904 A CN98806904 A CN 98806904A CN 1261928 A CN1261928 A CN 1261928A
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crystal
crystal bar
axially symmetric
constant diameter
symmetric region
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CN1280455C (en
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R·法尔斯特
J·C·霍尔泽
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SunEdison Inc
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    • C—CHEMISTRY; METALLURGY
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    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/14—Heating of the melt or the crystallised materials
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20—Controlling or regulating
    • C30B15/203—Controlling or regulating the relationship of pull rate (v) to axial thermal gradient (G)
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20—Controlling or regulating
    • C30B15/206—Controlling or regulating the thermal history of growing the ingot
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T117/00—Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
    • Y10T117/10—Apparatus
    • Y10T117/1004—Apparatus with means for measuring, testing, or sensing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/21—Circular sheet or circular blank

Abstract

The present invention relates to single crystal silicon, in ingot or wafer form, which contains an axially symmetric region which is free of agglomerated intrinsic point defects, and a process for the preparation thereof. The process comprises controlling growth conditions, such as growth velocity, v, instantaneous axial temperature gradient, G0, and the cooling rate, within a range of temperatures at which silicon self-interstitials are mobile, in order to prevent the formation of these agglomerated defects. In ingot form, the axially symmetric region has a width, as measured from the circumferential edge of the ingot radially toward the central axis, which is at least about 30 % the length of the radius of the ingot. The axially symmetric region additionally has a length, as measured along the central axis, which is at least about 20 % the length of the constant diameter portion of the ingot.

Description

The silicon of low defect density
Background of invention
The present invention is relevant with the preparation of the semiconductor grade silicon single crystal that is used for the electronic component manufacturing, particularly has the silicon single crystal rod and wafer and the preparation technology thereof that do not contain the agglomerated intrinsic point defects axially symmetric region.
Silicon single crystal is the original material of the most of manufacturing process of semi-conductor electricity sub-element, lifts the preparation of (" Cz ") method with what is called usually.In the method, with polysilicon pack into crucible and make it the fusing, contact with molten silicon with a seed crystal again, and generate monocrystalline through slowly lifting.Form after the axle journal, by reducing pulling rate and/or fusing sintering temperature crystal diameter is increased, till reaching desirable aimed dia.Then, generate cylinder crystal main body by control pulling rate and fusing sintering temperature with the reduction that compensates because of the degree of dissolving with near constant diameter.Process of growth finishes but before molten silicon does not exhaust as yet in the crucible, crystal diameter dwindled gradually to form the end awl.In general, form the end awl by increasing pulling rate and improving crucible temperature.When diameter became enough hour, crystal promptly separates with molten silicon.
In recent years, a large amount of defectives in the confirmation form crystal silicon were to form with the cooling of the crystal after the crystallization in the crystal growing chamber.This generation of defects in part because of the existence of excessive (being that concentration exceeds solubility limit) intrinsic point defects, is referred to as the room and from-interstitial atom.Generally have excessive one or another kind of intrinsic point defects from the silicon crystal of molten mass growth, or lattice vacancy (" V "), or silicon interstitial atom (" I ").The type of these point defects and starting point concentration are subjected to ratio V/G in the silicon of having confirmed to formalize when crystallization 0Control, wherein V is the speed of growth, G 0Instantaneous axial-temperature gradient when being crystallization in the crystal.With reference to Fig. 1, when increasing ratio V/G 0The time, at a critical V/G 0Just produce near the value from being that main growth slows down that to carry out the transition to the room be that main growth is accelerated from-interstitial atom, this threshold value is about 2.1 * 10 according to common obtainable information -5Cm 2/ sK.At this threshold value place, the concentration of these intrinsic point defects is in equilibrium state.
Work as V/G 0When value surpassed threshold value, vacancy concentration increased, and works as V/G 0During value subcritical value, then certainly-increase of interstitial atom concentration.If these concentration reach a critical supersaturation value in system, and a kind of reaction or a kind of clustering phenomena just may take place when enough high in the mobility of point defect.In the silicon accumulative intrinsic point defects may have a strong impact in complexity and highly integrated circuit produce in the output potential of material.
It is the root of some may observe lattice defects that room-type defective is identified, as D-defective, flow graph defective (FPDs), gate oxidation integrity (GOI) defective, the spontaneous particulate of lattice (COP) defective, the spontaneous luminous point defective of lattice (LPDs), and with the bulk defects of observed some types of infrared light scanning technology such as scanned infrared photomicrography and laser scanning Laminographic.Also have, what appear at the excess vacancy zone has been the defective that epoxidation brings out the effect of stacking fault (OISF) nuclear.Can infer that this special defective be a kind of owing to excess vacancy the occurs oxygen of catalytic high temperature nucleation is assembled forms.
To with from-Study of Defects that interstitial atom is relevant is less, generally it is considered as low-density interstitial atom-type dislocation loop or grid.This defective is not to be the reason that causes gate oxide integrity defective (an important wafer property criterion), but generally believes that they are roots of the other types device defects relevant with common electric leakage problem.
In crystal pulling method silicon this room and from the density of-interstitial atom agglomerated defects generally 1 * 10 3/ cm 3To 1 * 10 7/ cm 3Scope in.When these are worth when relatively low, the accumulative intrinsic point defects increases rapidly the importance of element manufacturing, thereby it is considered as the factor of yield-restriction in fact at present in device manufacturing processes.
So far, there are three kinds of main means to handle accumulative intrinsic point defects problem usually.The method that first kind of means comprise concentrates on pulling technique, in order that reduce the number density of crystal bar agglomerated intrinsic point defects.This means can be further divided into two kinds of methods: the one, it is those methods of main material that the crystal pulling condition forms the room, the 2nd, the crystal pulling condition form with from-interstitial atom is those methods of main material.For example, the number density of having confirmed agglomerated defects can be reduced by following method: (1) control V/G 0The size of value its lattice vacancy of growing is the crystal of main intrinsic point defects; (2) by in the crystal pulling process, in 1100 ℃ to 1050 ℃ temperature range, changing the nucleation rate that silicon rod speed of cooling (generally being cooling) influences agglomerated defects.When this means reduce the number density of agglomerated defects, can not avoid the formation of defective.Make requirement because of device and become more and more stricter, the existence of this defective will continue to become an important problem.
The additive method that proposes has during the crystal growth pulling rate being reduced to and is lower than about 0.4mm/min (mm/min).Yet this suggestion is also unsatisfactory, because pulling rate reduces the output of every crystal puller so slowly.The more important thing is that such pulling rate can cause containing the formation of high density from-interstitial atom silicon single crystal.Simultaneously, this high density also causes assembling from-interstitial atom defective and problem that all are relevant with this defective.
The method that second kind of means of processing agglomerated intrinsic point defects problem comprise is devoted to agglomerated intrinsic point defects and is formed decomposition and elimination afterwards.Usually this is to carry out high-temperature heat treatment by the silicon to the wafer form to realize.For example, at european patent application 503, people such as Fusegawa proposes surpassing the speed growth silicon rod of 0.8mm/min among 816 Al, and the silicon chip that silicon rod cuts into is heat-treated 1150 ℃ to 1280 ℃ temperature range, eliminates the defective that forms in the crystal growing process.Proved that such thermal treatment can reduce the defect concentration near the silicon chip surface coating region.Required special disposal will change according to the concentration and the position of agglomerated intrinsic point defects in the silicon chip.Ask different growth post-treatment conditions possibly from the different silicon chips that the uneven crystal of this class defective axial concentration cuts.And the heat treated cost of this class silicon chip is quite high, and might introduce metallic impurity in silicon chip, thereby is not generally effective to the relevant defective of each crystalloid.
The third means of handling the agglomerated intrinsic point defects problem are in the crystallization of monocrystalline silicon sheet surface epitaxial deposition skim silicon.This technology provides a kind of its surface not contain the monocrystalline silicon piece of agglomerated intrinsic point defects substantially.Yet the epitaxial deposition meeting enlarges markedly the cost of silicon chip.
Make a general survey of these development, still be necessary to find a kind of by the aggreation that produces agglomerated intrinsic point defects being suppressed to avoid forming the silicon single crystal preparation method of this defective.Simply limit the speed that this class defective forms with it, not as good as make great efforts to eliminate some defective after defective forms, a kind of method that can suppress aggreation will be produced the silicon substrate that is substantially free of agglomerated intrinsic point defects.With regard to the unicircuit quantity that every silicon chip obtains, so a kind of method also can provide the monocrystalline silicon piece with the same production potential of extension, and do not have with epitaxy technique interrelate expensive.Brief summary of the invention
Therefore, the purpose of this invention is to provide to have not contain substantially in quite big radial width axially symmetric region and this district and assemble the silicon single crystal rod or the silicon chip of the defective that produces from-interstitial atom by lattice vacancy or silicon; And a kind of preparation technology of silicon single crystal rod is provided, controlled to the room in the silicon with from the concentration of-interstitial atom in this technology, to prevent when silicon rod axial symmetrical gathering of distinguishing intrinsic point defects in silicon rod constant diameter section when Tc cool off.
Briefly, the present invention is intended to obtain a kind of monocrystalline silicon piece, make it to have a central shaft, with the vertical front end face of central shaft and aft end face, circular periphery and the radius that extends to circumferential edge from central shaft.This silicon chip comprises an axially symmetric region that does not contain agglomerated intrinsic point defects substantially.This axially symmetric region radially extends inwardly from the circumferential edge of silicon chip, when radially having certain width, this width to be at least about 40% of silicon chip radius length when central shaft is measured from circumferential edge.
Further object of the present invention is to obtain a kind of silicon single crystal rod, makes it to have a central shaft, seed crystal awl, a tail crystalline cone and have circular periphery and extend to the constant diameter section of the radius of circumferential edge from central shaft between seed crystal awl and tail crystalline cone.This silicon single crystal rod is characterised in that: grow up to and after Tc cooling, its constant diameter section comprises an axially symmetric region that does not contain agglomerated intrinsic point defects substantially at crystal bar.This axially symmetric region radially extends inwardly from garden shape periphery, when radially having certain width, this width to be at least about 30% of constant diameter section radius length when central shaft is measured from circumferential edge.This axially symmetric region also has certain length, is 20% of crystal bar constant diameter segment length at least when central shaft is measured.
A further object of the present invention provides a kind of technology of growing single-crystal silicon rod, by this technology, comprise a central shaft, seed crystal awl, one tail crystalline cone and the crystal bar of constant diameter section that has circular periphery and extend to the radius of circumferential edge from central shaft between seed crystal awl and tail crystalline cone are grown from molten silicon, cool off from Tc by method of pulling up then.This technology comprises control growing speed V and the instantaneous axial-temperature gradient G of crystalline in constant diameter section process of growth 0, in order to when Tc is cooled off, forming an axially symmetric region that does not contain agglomerated intrinsic point defects substantially when crystal bar.This axially symmetric region radially extends towards central shaft from circumferential edge, and its width is 30% of constant diameter section radius length at least, is 20% of constant diameter length at least along the central shaft length measured.
Other purposes of the present invention and characteristics have plenty of conspicuous, and what have will be explained below.Accompanying drawing is briefly described
Fig. 1 shows that the starting point concentration of self-interstitial atom [I] and room [V] is with ratio v/G 0Increase and the example that changes, wherein v is the speed of growth, G 0It is instantaneous axial-temperature gradient.
Fig. 2 shows under given self-interstitial atom starting point concentration [I], forms and assembles the required free energy change amount of interstitial atom defective Δ G IThe example that increases with the reduction of temperature T.
The example of Fig. 3 shows that the means by radial diffusion suppress self-interstitial atomic percent [I], makes to form to assemble the required free energy change amount of interstitial atom defective Δ G IReduction with temperature T reduces (at that time).Wherein solid line is described the situation of no radial diffusion, and dotted line is represented the effect that spreads.
The example of Fig. 4 shows by the radial diffusion means and suppresses certainly-interstitial atom concentration [I], causes aggreation to be avoided, and makes to form to assemble the required free energy change amount of interstitial atom defective Δ G IFully reduce with the reduction of temperature T.Wherein solid line is described the situation of no radial diffusion, and dotted line is represented the effect that spreads.
Fig. 5 shows because of G 0The increase of value makes self-interstitial atom starting point concentration [I] and the room starting point concentration [V] may be with ratio V/G 0Reduce and change along the radius of crystal bar or wafer.Notice occur from the room on the V/I border be main material to from-interstitial atom is the transition of main material.
Fig. 6 is the top view of a silicon single crystal rod or wafer, shows room V respectively and is main material sections and boundary between the two from-interstitial atom I.
Fig. 7 a shows room or the example that changes with radial position because of the radial diffusion from-interstitial atom from-interstitial atom starting point concentration.Show that also this diffusion shifts near the crystal bar center and is suppressed from-interstitial atom concentration [I] because of the room with from the compound V/I of the causing boundary position of-interstitial atom.
Fig. 7 b is Δ G IWith the relation curve of radial position, show that the inhibition (shown in Fig. 7 a) from-interstitial atom concentration [I] is enough to keep Δ G everywhere IAll be lower than the size of the threshold value that silicon takes place from-interstitial atom effect.
Fig. 7 c show the room or from-interstitial atom starting point concentration owing to change another example with radial position from the radial diffusion of-interstitial atom.Note with Fig. 7 a relatively, the V/I border that this diffusion causes shifts near crystal bar center (because of room and compound from-interstitial atom) and causes the increase of interstitial atom concentration in the external region, V/I border.
Fig. 7 d is Δ G IWith the relation curve of radial position, show that the inhibition (shown in Fig. 7 a) from-interstitial atom concentration [I] is not enough to keep Δ G everywhere IAll be lower than the example of the threshold value that silicon takes place from the reaction of-interstitial atom.
Fig. 7 e show the room or from-interstitial atom starting point concentration owing to change another example with radial position from the radial diffusion of-interstitial atom.Note with Fig. 7 a relatively, strengthen diffusion and cause from-inhibition that interstitial atom concentration is stronger.
Fig. 7 f is Δ G IWith the relation curve of radial position, show from the stronger inhibition (shown in Fig. 7 e) of-interstitial atom concentration [I] to cause Δ G IThe example that suppresses (comparing) greatly with Fig. 7 b.
Fig. 7 g show the room or from-interstitial atom starting point concentration owing to change another example with radial position from the radial diffusion of-interstitial atom.Note with Fig. 7 c relatively, strengthen diffusion and cause from-inhibition that interstitial atom concentration is stronger.
Fig. 7 h is Δ G IWith the function relation curve of radial position, show that the stronger inhibition (shown in Fig. 7 g) from-interstitial atom concentration [I] causes Δ G IThe example of the inhibition of higher degree (comparing) with Fig. 7 d.
Fig. 7 i show the room or from-interstitial atom starting point concentration owing to change another example with radial position from the radial diffusion of-interstitial atom.Note the compound zone that makes it no longer to exist based on the room from-interstitial atom and room of q.s in this example.
Fig. 7 j is Δ G IWith the relation curve of radial position, show the example that is enough to radially keep the inhibition of assembling the interstitial atom defective from the radial diffusion (shown in Fig. 7 i) of-interstitial atom everywhere along crystal.
Fig. 8 is that a silicon single crystal rod is vertical, viewgraph of cross-section, shows the axially symmetric region of crystal bar constant diameter section in detail.
Fig. 9 is vertical, the viewgraph of cross-section of a silicon single crystal rod one constant diameter section, shows the axial variation of axially symmetric region width in detail.
Figure 10 is vertical, the viewgraph of cross-section of its axially symmetric region width less than the silicon single crystal rod constant diameter section of crystal bar radius, shows that in detail it is the general cylindrical zone that main material constitutes that this axially symmetric region also comprises a room.
Figure 11 is side direction, the viewgraph of cross-section of axially symmetric region shown in Figure 10.
Figure 12 be its axially symmetric region width silicon single crystal rod constant diameter section of equaling the crystal bar radius vertically, viewgraph of cross-section, show in detail this district be one do not contain substantially agglomerated intrinsic point defects from-interstitial atom is the general cylindrical zone that main material constitutes.
Figure 13 is the minority carrier lifetime scanning image that axially cuts through a series of oxygen deposition thermal treatment crystal bars, show that in detail a room is the general cylindrical zone that main material constitutes, one is the general circular axially symmetric region (the V/I border appears between the two) that main material constitutes from-interstitial atom, and one is assembled the interstitial atom defect area.
Figure 14 is the relation curve of pulling rate (being that seed crystal promotes) and crystal length, shows the linear decline of pulling rate on a part of crystal length.
Figure 15 is through a series of minority carrier lifetime scanning images that oxygen deposition thermal treatment crystal bar axially cuts described in example 1.
Figure 16 is the pulling rate (being that seed crystal promotes) of four single crystal rod and the relation curve of crystal length, marks 1-4 respectively, is used for providing one at the curve V* (z) described in the example 1.
Figure 17 is to crystal/molten mass interface axial-temperature gradient G under two kinds of different situations in the example 2 0Relation curve with radial position.
Figure 18 is to room starting point concentration [V] under two kinds of different situations in the example 2 with from-interstitial atom starting point concentration [I] relation curve with radial position.
Figure 19 is the relation curve of temperature and axial location, shows the temperature distribution of crystal bar under example 3 described two kinds of different situations.
Figure 20 be as shown in figure 19 from two kinds of cooling conditionss produce down from-interstitial atom concentration map, in example 3, more detailed description is arranged.
Figure 21 is the minority carrier lifetime scanning image that axially cuts through the heat treated whole crystal bar of a series of oxygen depositions as described in example 4.The detailed description of preferred embodiment
As used here, following sentence and term should have given implication: " agglomerated intrinsic point defects " means the defective that is caused by following reason: (1) accumulation of vacancies produces D-defective, flow graph defective, gate oxidation integrity defective, the particle defects that gives birth in the crystal source, the luminous point defective that gives birth in the crystal source and the reaction of other room related defects, or (2) are assembled from-interstitial atom and produced dislocation loop and grid and other this class and assemble the reaction of related defects from-interstitial atom; " assemble interstitial atom defective " should refer to by silicon from-agglomerated intrinsic point defects that the interstitial atom aggreation causes; " gathering vacancy defect " should refer to the gathering room point defect that caused by the lattice vacancy aggreation; " radius " refers to the distance that records to circumferential edge from wafer or crystal bar central shaft; " do not contain agglomerated intrinsic point defects substantially " and should refer to that agglomerated defects concentration is lower than the limit of detection of this defective, is about 10 usually 4Individual defective/centimetre 3" V/I border " refer to along crystal bar or wafer radius direction material from the room be main transformer be from-interstitial atom is main position; And " room is main " and " from-interstitial atom is main " intrinsic point defects that refers to material is respectively the room and still preponderates from-interstitial atom.
According to the present invention, find that silicon produces the reaction of assembling the interstitial atom defective and can be suppressed from-interstitial atom effect in the silicon single crystal rod process of growth.Need not to be subject to any particular theory and can believe in technology of the present invention from-interstitial atom concentration and in boule growth and process of cooling, be controlled, make the variation of system's free energy will never surpass the spontaneous generation of aggreation and form the threshold value of assembling the interstitial atom defective.
In general, forms gathering interstitial atom defective by silicon from-interstitial atom and reacts obtainable system free energy change and determine in silicon single crystal, exciting by equation (1): Δ G I = KT ln ( [ I ] [ I ] eq ) - - - - ( 1 ) In the formula
Δ G IIt is the variation of free energy
K is a Boltzmann constant
T is absolute temperature (K)
[I] be in the silicon single crystal a certain event from-interstitial atom concentration
[I] EqBe the same event that produces [I] and the balance under the temperature T from-interstitial atom is dense
Degree
According to this equation, given from-interstitial atom concentration [I], because [I] for one EqReduce rapidly with temperature, thereby the reduction of temperature can make Δ G usually IIncrease.
Fig. 2 illustrates for one and does not adopt some means to suppress its Δ of crystal bar G from-interstitial atom concentration from Tc cooling simultaneously IVariation with silicon interstitial atom concentration.When crystal bar cools off, since [I] oversaturated increase, Δ G IPress equation (1) and increase, near forming the potential barrier of assembling the interstitial atom defective.When continuing cooling, might exceed this potential barrier, promptly produce reaction at this point.This reaction causes assembling the formation and the Δ G of interstitial atom defective IFollow with the alleviation of supersaturation system and to reduce.
When crystal bar when Tc is cooled off, keep silicon and be lower than the value that aggreation takes place from-interstitial atom system free energy, can avoid gathering from-interstitial atom.In other words, system can be controlled to and make it never critical supersaturation.This can enough low may reach critical supersaturation from-interstitial atom starting point concentration by setting up one never.Yet in fact such concentration is difficult on the whole crystal radius and realizes, therefore, critical supersaturation general only may be crystal structure after by suppress silicon oneself-the interstitial atom starting point concentration avoids.
Fig. 3 and 4 illustrates when crystal bar among Fig. 2 and suppresses [I] when Tc is cooled off to Δ G ITwo kinds of possible influences that increase.In Fig. 3, the inhibition of [I] causes Δ G IThe reduction of rate of growth, but in this case, such inhibition is not enough to everywhere with Δ G IRemaining on one is lower than on the threshold value that produces this reaction; So such inhibition only is used for reducing the temperature that produces this reaction.In Fig. 4, the inhibition that strengthens [I] is enough to everywhere with Δ G IRemaining on one is lower than on the threshold value that produces this reaction; Therefore, such inhibition can stop the formation of defective.
Amazing discovery is because quite big from the mobility of-interstitial atom, might by from-interstitial atom radial diffusion to the trap that is positioned at plane of crystal or the room be main zone and on big distance this restraining effect of influence.As long as the time is enough to allow the radial diffusion from-interstitial atom starting point concentration, just can effectively utilize radial diffusion suppress oneself-interstitial atom concentration.In general, will depend on the radial variations from-interstitial atom starting point concentration diffusion time, the diffusion time that less radial variations requires is shorter.
In general, for the silicon single crystal of pressing the method for pulling up growth, its axial-temperature gradient G 0Increase with radius increases.This means at crystal bar radial direction ratio V/G 0Generally not single.Because this variation, the type of intrinsic point defects and starting point concentration are not constant.If at certain some V/G of place along radius 4 0Reach threshold value (in Fig. 5 and 6, being expressed as V/I interface 2), then material will be from the room main transformer be from-interstitial atom is main.In addition, it is the axially symmetric region 6 (wherein silicon increases with the increase of radius from-interstitial atom starting point concentration) of main material from-interstitial atom that crystal bar will comprise one, is that 8 in the general cylinder district of main material is around (wherein the room starting point concentration reduces with the increase of radius) by a room all around.
Fig. 7 a and 7b illustrate when crystal bar according to an example of the present invention and suppress [I] when Tc is cooled off to Δ G IThe influence that increases.When crystal bar is pressed the method for pulling up drawing, this crystal bar comprise one by interstitial atom be that main material constitutes, extend to radius from the crystal bar edge and V/I axially symmetric region at the interface to occur, and room be that main material constitutes, extend to the general cylindrical zone that the V/I interface occurs from the crystal bar center along radius.When crystal bar when Tc is cooled off, owing to the remarkable inhibition from-interstitial atom concentration outside the compound and V/I interface in-interstitial atom and room makes the radial diffusion of interstitial atom cause that the V/I interface is radially towards bias internal.And the inhibition of [I] is enough to keep Δ G everywhere IAll be lower than the size of the threshold value that silicon takes place from-interstitial atom effect.
Referring now to Fig. 8 and Fig. 9,, in technology of the present invention, silicon single crystal rod 10 is grown according to method of pulling up.Silicon rod comprises a central shaft 12,14, tail crystalline cones 16 of seed crystal awl and the constant diameter section 18 between seed crystal awl and tail crystalline cone.This constant diameter section has a circular periphery 20 and a radius 4 that extends to circumferential edge from central shaft.This technology is included in the speed of growth v and the instantaneous axial-temperature gradient G of control crystal bar in the crystal bar constant diameter section process of growth 0, so that when Tc is cooled off, form the rotational symmetry zone 6 that does not contain agglomerated intrinsic point defects substantially at crystal bar.
Should suitably be controlled growth conditions, make V/I interface 2 remain on axially symmetric region 6 volumes with respect on the position of crystal bar 10 constant diameter sections 18 volumes for maximum.Therefore, generally wish the width 22 (radially measuring) of axially symmetric region and radius 4 and the length 26 that length 24 (central shaft along crystal bar is measured) equals crystal bar constant diameter section respectively towards central shaft from the circumferential edge of crystal bar.But in fact, the restriction of operational condition and crystal puller hardware may make the rotational symmetry zone only account for the smaller portions of crystal bar constant diameter section.So, wish that generally axial symmetrical sector width is at least about 30% of crystal bar constant diameter section diameter, better at least 40%, better more at least 60%, preferably at least 80%.In addition, the length that axially symmetric region extends is at least about 20% of crystal bar constant diameter segment length, and better at least 40%, better more at least 60%, preferably at least 80%.
Referring to Fig. 9, the width 22 of axially symmetric region 6 may have some fluctuations along central shaft 12 length directions.So for the axially symmetric region of a given length, its width is determined to decentering axle radial distance more farthest from the circumferential edge 20 of crystal bar 10 by measuring.In other words, to determine minor increment in axially symmetric region 6 given lengths 24 exactly to the measurement of width 22.
Now referring to Figure 10 and, when the width 22 of crystal bar 10 constant diameter sections 18 axially symmetric regions 6 during less than the radius 4 of constant diameter section, this district is generally the garden ring-type.One is the center, is that the general cylindrical zone that main material 8 constitutes is positioned in this general circular segments diametrically with the room with central shaft 12.Referring to Figure 12, be to be understood that when the width 22 of axially symmetric region 6 equals the radius 4 of constant diameter section 18 it is main zone that this district does not contain the room; And axially symmetric region itself generally is cylindrical, and by do not contain substantially agglomerated intrinsic point defects from-interstitial atom is that main material constitutes.
If wish that it is main peak width when maximum that the control crystal growth condition makes interstitial atom, may limit to some extent the design of a given crystal-pulling machine hot-zone.When the V/I interface shifts near the center crystallographic axis, as long as cooling conditions and G 0(r) constant (G 0(r) be G 0Radial variations), then desired smallest radial diffusing capacity increases.In these cases, the room is that the primary area has a minimum radius, and this is to form desired for suppress to assemble the interstitial atom defective by radial diffusion.
It is the example that the primary area surpasses minimum radius that Fig. 7 c and 7d illustrate a room.In this example, cooling conditions and G 0(r) with Fig. 7 a and 7b in adopted identical, to shown in the V/I interface location have enough external diffusions to avoid assembling the interstitial atom defective.In Fig. 7 c and 7d, the V/I interface location shifts near central shaft (with respect to Fig. 7 a and 7b) and causes the increase of external region, V/I interface interstitial atom concentration.So, require stronger radial diffusion fully to suppress interstitial atom concentration.If can not realize enough external diffusions, system's Δ G then ITo increase and exceed threshold value, and occur producing the reaction of assembling the interstitial atom defective, thereby form this defect area in the annular regions between V/I interface and crystal edge.The V/I interface radius that this reaction occurs is a minimum radius for given heating zone.If stronger interstitial atom radial diffusion allows, then this minimum radius reduces.
Fig. 7 e, 7f, 7g and 7h illustrate for the crystal with identical initial room of Fig. 7 a, 7b, 7c and crystal that 7d is exemplified and the growth of interstitial atom concentration distribution, strengthen radially external diffusion to interstitial atom concentration distribution and the Δ G of system IThe influence that increases.The radial diffusion that strengthens interstitial atom can cause the inhibition stronger to interstitial atom, thereby to the Δ G of system IThe inhibition degree that increases is than higher in situation shown in Fig. 7 a, 7b, 7c and the 7d.In the case, system's Δ G ICan not exceed for the desired value of less V/I interface radius.
Fig. 7 i and 7j illustrate one and allow enough radial diffusion to make by guaranteeing that radial diffusion is enough to suppress to assemble the interstitial atom defective everywhere along crystal radius and makes minimum radius be reduced to zero example.
In a preferred embodiment of technology of the present invention, crystal bar is axially symmetric to be that silicon is controlled from the starting point concentration of-interstitial atom in the primary area from-interstitial atom.Again referring to Fig. 1, silicon from the starting point concentration of-interstitial atom generally by control crystalline growth velocity V and instantaneous axial-temperature gradient G 0Control, make ratio V/G 0Quite near the threshold value that this ratio at V/I interface occurs.In addition, may set up instantaneous axial-temperature gradient G 0Make G 0(thereby V/G 0) also controlled with the variation of crystal bar radius.
Speed of growth V and instantaneous axial-temperature gradient G 0Generally to control to and make V/G 0Value from about 0.5 to 2.5 times of its threshold value (by common obtainable V/G 0The information of threshold value, promptly 1 * 10 -5Cm 2/ sK to 5 * 10 -5Cm 2About/sK).Selecting preferably is V/G 0Value from about 0.6 to 1.5 times of its threshold value (by common obtainable V/G 0The information of threshold value, promptly 1.3 * 10 -5Cm 2/ sK to 3 * 10 -5Cm 2About/sK).Preferably select V/G 0From about 0.75 to 1 times of its threshold value (by common obtainable V/G 0The information of threshold value, promptly 1.6 * 10 -5Cm 2/ sK to 2.1 * 10 -5Cm 2About/sK).These ratios are by independent control growing speed V and instantaneous axial-temperature gradient G 0Realize.
Instantaneous axial-temperature gradient G 0The general main design of control by crystal puller " hot-zone " (promptly constituting the graphite or the other materials of well heater, insulation and thermoshield or the like) realize.Though this design details may become according to the making of crystal puller and moulding, generally can adopt in melt/solid interface (to comprise and make heat transfer axially change minimum any process means of being used always to G 0Control, comprise reverberator, radiation shielding, vapor pipe, photoconductive tube and well heater etc.In general, locate these devices by an about boule diameter above melt/solid interface with interior place and control G 0Radial variations.Also can be by adjusting these devices and melt and the crystalline relative position is further controlled G 0This be by adjust these devices in the hot-zone the position or be adjusted in the hot-zone position of bath surface and finish.These methods a kind of or both all can adopt in batches lifting in the operation of exhausting of melt in technological process.
For some example of the present invention, wish instantaneous axial-temperature gradient G usually 0Variation with boule diameter is constant relatively.But should be pointed out that the improvement when hot zone design allows G 0Variation reduce to hour, the mechanical problem relevant with keeping the constant speed of growth seems important further.This is because process of growth becomes more responsive to any variation of pulling rate, and its while directly influences speed of growth V.From the technology controlling and process opinion, this means G on whole crystal bar radius 0It is favourable getting different value.Yet, G 0The value possibility that has big difference produces higherly from-interstitial atom concentration near Waffer edge, increases the difficulty of avoiding forming agglomerated intrinsic point defects therefrom.
From above-mentioned analysis, G 0Control relate to and make G 0Radial variations minimum and keep the weighing apparatus of making even between the favourable process control condition.Therefore, generally behind the crystal length that draws an about diameter, pulling rate will be roughly in 0.2 mm/min between 0.8 mm/min, better be 0.25 mm/min between 0.6 mm/min, preferably get 0.3 mm/min between 0.5 mm/min.Be noted that above-mentioned span is to 200 mm dia crystalline representative values.Yet pulling rate is decided by the design of crystal diameter and crystal puller.In general, pulling rate will reduce with the increase of crystal diameter.
Consider from commodity production, from-interstitial atom diffusing capacity can by the control crystal bar from Tc (about 1410 ℃) be cooled to silicon oneself-the interstitial atom irremovable speed of cooling that becomes controls.Silicon seems active especially from-interstitial atom under the temperature of adjacent silicon Tc (promptly about 1410 ℃).Yet this mobility reduces with the silicon single crystal rod decrease of temperature.So far the experimental data of Huo Deing shows: for the industrial time cycle, be lower than under about 700 ℃ temperature, perhaps under the temperature of height to 800 ℃, 900 ℃ even 1,000 ℃, Zi-the interstitial atom velocity of diffusion can be slowly to motionless substantially considerable.
Show movably temperature range from-interstitial atom in, and depend on the hot-zone temperature, speed of cooling is generally about 0.2 ℃/minute to 2 ℃/minute, is preferably about 0.2 ℃/minute to 1.5 ℃/minute, preferably about 0.2 ℃/minute to 1 ℃/minute.The control of speed of cooling can realize by any means (comprise and use thermal insulator, well heater and radiation shielding) that the heat transfer minimum is used always.
As mentioned above, exist one can make that to assemble the repressed room of interstitial atom defective be the primary area minimum radius.This minimum radius value is decided by V/G 0(r) and speed of cooling.Because crystal puller and hot zone design can change, thereby above-mentioned about V/G 0(r), the span of pulling rate and speed of cooling also can change.Equally, these conditions also may change along the length of growing crystal.Also as mentioned above, wish that not having the interstitial atom of assembling the interstitial atom defective is the width maximum in primary area.Therefore, wish in given crystal puller along keeping this regional width on the length of growing crystal to be the poor of primary area minimum radius near (but being no more than) crystal radius and room as far as possible.
For a given crystal puller hot zone design, axially the optimum width and the desired best pulling rate in symmetry district distribute and can determine according to experiment for they.In general, this experimental technique at first will obtain the data of the crystal bar axial temperature of growing distribution that is easy to obtain and the instantaneous axial-temperature gradient radial variations of crystal bar of growing in same crystal puller in specific crystal puller.In general, draw one or more silicon single crystal rod, analyze it then and assemble the situation that the interstitial atom defective occurs with these data.Can determine that according to said method best pulling rate distributes.
Figure 13 is the scanning image that one section 200 mm dia crystal bar axially cuts minority carrier lifetime after the oxygen deposition thermal treatment of series of displays defect map.It is described and adopts near-best pulling rate to be distributed in the example of a given crystal puller hot zone design.In this example, a best V/G that maximum width is arranged from axially symmetric region has appearred 0(r) be worth one and exceed the V/G that interstitial atom is the primary area maximum width 0(r) Zhi transition, thereby form gathering interstitial atom defect area 28.
Except G from the crystal bar radius 0Increase the V/G that causes 0Outside the radial variations, V/G 0Also may be owing to the change of V or owing to czochralski process causes G 0Change naturally and take place axially to change.For the standard czochralski process, V will change with the adjustment of pulling rate in the growth cycle, to keep boule diameter constant.This adjustment of pulling rate or change cause V/G simultaneously 0On crystal bar constant diameter length, change.By technology of the present invention, therefore pulling rate is controlled so that crystal bar axially symmetric region width maximum.Yet its possibility of result changes the crystal bar radius.Therefore, constant for guaranteeing the gained boule diameter, the diameter that preferably makes boule growth is greater than desirable size.Then with crystal bar by the art breading standard excess stock of pruning from the surface, so just guarantee to obtain the crystal bar of constant diameter.
For by prepared of the present invention and the crystal bar at V/I interface is arranged, experimental results show that the material of wishing to obtain low oxygen content, promptly be lower than about 13PPMA (atom content in per 1,000,000 atoms, ASTM standard F-121-83).Better be that the silicon single crystal oxygen level is lower than about 12PPMA, better again is to be lower than about 11PPMA, preferably is lower than about 10PPMA.This be because in the wafer of elevated oxygen level (promptly 14 arrive 18PPMA), just in time the oxygen in the V/I interface brings out stacking fault and enhanced oxygen boundling band becomes more obvious.Its each all is the latency that goes wrong in given integrated circuit fabrication process.
Can adopt two kinds of methods to weaken the effect that strengthens polyoxy group, these two kinds of methods can be used separately also and can use simultaneously.The oxygen deposition nucleation centre generally forms in the annealed silicon in about 750 ℃ of temperature ranges at about 350 ℃.Therefore, use, may wish to adopt " weak point " crystalline substance for some, promptly a kind of by czochralski process growth rapid refrigerative crystal of crystal bar after the seed crystal end is as cold as about 750 ℃ from silicon fusing point (1410 ℃).When adopting this method, consumed time should be kept the shortlyest in the critical temperature range that nucleation centre is formed, thereby has little time to form the oxygen deposition nucleation centre in crystal puller.
Another kind of preferable method is by silicon single crystal is annealed the oxygen deposition nucleation centre branch that forms in the single crystal growth process to be taken off.As long as they are without stable thermal treatment, rapidly silicon is heated at least 875 ℃ and preferably continue to be warmed up to 1000 ℃, the oxygen deposition nucleation centre is evicted from from silicon through annealing.When silicon reaches 1000 ℃, this class defective basically all (for example＞99%) eliminate.Importantly silicon chip will be heated to such temperature very soon, and promptly temperature rise speed is at least 10 ℃ of per minutes, and preferably per minute is 50 ℃.Otherwise partly or entirely the oxygen deposition nucleation centre may settle out because of this thermal treatment.(promptly 1 minute magnitude) can reach equilibrium state in the quite short time cycle.Therefore, the oxygen deposition nucleation centre in the silicon single crystal can be taken off preferably 10 minutes by its annealing under at least about 875 ℃ high temperature is divided at least 30 seconds.This decomposition can be carried out in common stove or in rapid thermal annealing (RTA) system.In addition, this decomposition can be carried out on crystal bar or wafer, but is good with wafer.
Though take place theoretically can change in a wide temperature range from the temperature of-interstitial atom aggreation, in fact this scope is rather narrow for common Czochralski grown silicon.This is to start from-result that the interstitial atom concentration range is rather narrow by common obtain first in the method for pulling up grown silicon.Which therefore, under about 1100 ℃ of no matter temperature in about 800 ℃ of scopes, generally all can take place from-interstitial atom aggreation.
Will illustrate as following example, the invention provides a kind of technology for preparing silicon single crystal rod, in this technology, when crystal bar by method of pulling up when Tc is cooled off, in the axially symmetric region of crystal bar constant diameter section, can not form the gathering of intrinsic point defects, can cut into wafer thus.
Following example is stated one group of condition that can be used to realize The above results.Also have the other method to be used for determining the best pulling rate of a given crystal puller.For example, with its with different pulling rates a series of crystal bars of growing, not as good as improve and reduce the pulling rate monocrystalline of growing along crystal length; According to said method, in single crystal growth process, may cause and assemble from-repeatedly appearing and subsiding of interstitial atom defective.Thereby possibly best pulling rate is determined at many different crystals position.Therefore, can not do accurate the explanation to following example.Example 1 is deposited the optimization technological process of hot zone design crystal puller earlier
First 200 millimeters silicon single crystal rod growing under the linear saltus step condition to 0.35 mm/min along the crystal length pulling rate from 0.75 mm/min.Figure 14 shows the relation of pulling rate and crystal length.The instantaneous axial-temperature gradient G that the axial temperature of considering 200 millimeters crystal bars of growth in crystal puller and setting in advance distributes and sets in advance 0Radial variations (being the axial-temperature gradient on melt/solid interface), these pulling rates are selected, with guarantee crystal bar one end from the center to the edge always the room be main material, and the other end from the center to the edge always interstitial atom be main material.The crystal bar of growth is axially cut and analyzes to determine to assemble the position that the interstitial atom defective begins to form.
Figure 15 is the scanning image of the axial cutting minority carrier lifetime of 635 millimeters to 760 millimeters one section of crystal bar shoulders, and this crystal bar discloses the distribution plan of its defective through a series of oxygen deposition thermal treatments.At about 680 millimeters crystal position, can see that is assembled an interstitial atom imperfect tape 28.This position is corresponding to V *The pulling rate of (680 millimeters)=0.33 mm/min.At this some place, the width of axially symmetric region 6 (interstitial atom is the primary area, but does not assemble the interstitial atom defective) is got maximum value; The room is the width R in primary area 8 V *(680) be about 35 millimeters, and the width R of axially symmetric region I *(680) about 65 millimeters.
Then, one group of four silicon single crystal rod of growth under the pulling rate that obtains the maximum width axially symmetric region than first 200 millimeters crystal bar pulling rate fast slightly and steamed bun slightly.Figure 16 shows the variation of its each crystalline pulling rate with crystal length, is labeled as 1-4 respectively.Then these four kinds of crystal are analyzed to determine to assemble the axial location (with corresponding pulling rate) of the initial appearing and subsiding of interstitial atom defective.These four the definite points (with " * " mark) of experiment are shown in Figure 16.As first approximation, the relation of the length of maximum width is got in this curve representative to 200 millimeters crystalline pulling rates and axially symmetric region in crystal puller.
Additional crystalline growth and these crystalline analyses will make V under other pulling rates *(z) experiment is defined more accurate.Example 2G 0(r) radial variations reduces
Figure 17 and 18 illustrates by reducing axial-temperature gradient G on crystal/melt interface 0(r) radial variations can obtainable quality improvement.The starting point concentration of room and interstitial atom (approximately from 1 centimetre of crystal/melt interface) is from two kinds of different G 0(r) situation is calculated: (1) G 0(r)=2.65+5 * 10 -4r 2(K/mm) and (2) G 0(r)=2.65+5 * 10 -5r 2(K/mm).In each case, adjusting pulling rate makes the separation surface of rich room silicon and rich interstitial atom silicon be in the radius of 3mm.Situation 1 and 2 pulling rates that adopt are respectively 0.4mm/min and 0.35mm/min.Be clear that the interstitial atom starting point concentration in the rich interstitial atom of crystal district reducing and sharply reduce from Figure 18 with initial axial-temperature gradient radial variations.This causes the improvement of quality of materials, because the forming to become and avoid than being easier to of the interstitial atom defective that is caused by interstitial atom supersaturation group.Example 3 prolongs the outer-diffusion time of interstitial atom
Figure 19 and 20 illustrates and prolongs interstitial atom external diffusion time quality improvement in the cards.The concentration of interstitial atom is calculated to temperature distribution dT/dz two kinds of disalignments in the crystal.Axial-temperature gradient at crystal/melt interface under two kinds of situations is the same, thereby the starting point concentration of interstitial atom (approximately from 1 centimetre of crystal/melt interface) also is identical.In this example, adjust pulling rate and make whole crystal that rich interstitial atom be arranged.Pulling rate under two kinds of situations is all 0.32mm/min.Under the 2nd kind of situation interstitial atom long outside-cause comprehensive reduction of interstitial atom concentration diffusion time.This causes the improvement of quality of materials, because the forming to become and avoid than being easier to of the interstitial atom defective that is caused by interstitial atom supersaturation group.Example 4
The crystal that long 700 millimeters, diameter is 150 millimeters grows into the pulling rate that changes.Pulling rate is from change to the 0.4mm/min from shoulder 430mm place in the intimate linearity of the 1.2mm/min of shoulder, then at the intimate again 0.65mm/min that turns back to linearly from shoulder 700mm place.Under this growth conditions of this specific crystal puller, entire radius is from growing to the crystal length of about 525mm from the about 320mm of crystal shoulder under the rich state of interstitial atom.Under the pulling rate of the axial location of about 525mm and about 0.47mm/min, on the whole diameter of crystalline, there is not agglomerated intrinsic point defects group.Changing a kind of saying exists a bit of its axially symmetrical district (promptly not having the agglomerated defects district substantially) width to equal the crystal bar radius exactly.
From the above as seen, multinomial purpose of the present invention all is implemented.
Because above-mentioned design and technology may be done various changes and not surmount scope of the present invention, attempt to be used as that illustration makes an explanation and to do accurate explanation with contained full content in the above description.

Claims (21)

  1. One kind have central shaft, with this vertical front end face and aft end face, circular periphery and the silicon single crystal wafer that extends to the radius of wafer circumferential edge from central shaft, this wafer comprises the axially symmetric region that does not have agglomerated intrinsic point defects substantially, this axially symmetric region prolongs from the circumferential edge radial inward expansion of wafer, and its width that radially records towards central shaft from circumferential edge is at least 40% of wafer radius.
  2. 2. wafer described in claim 1, its axially symmetric region is generally annular, it is the cylindrical zone that main material constitutes that wafer also comprises by the room, be in annular regions radially in.
  3. 3. wafer described in claim 1, its oxygen level is lower than about 13PPMA.
  4. 4. wafer described in claim 1, its oxygen level is lower than about 11PPMA.
  5. 5. wherein there is not the oxygen deposition nucleation centre in wafer described in claim 1.
  6. 6. one kind has central shaft, the seed crystal awl, the tail crystalline cone, and between seed crystal awl and tail crystalline cone tool circular periphery and extend to the silicon single crystal rod of constant diameter section of the radius of circumferential edge from central shaft, this silicon single crystal rod is characterised in that: grow up to and after Tc cooling at crystal bar, its constant diameter section comprises the axially symmetric region that does not have agglomerated intrinsic point defects substantially, this axially symmetric region radially expands inwardly from the crystal bar circumferential edge and prolongs, its width that radially records towards the crystal bar central shaft from circumferential edge is at least 30% of constant diameter district radius length, and its length that records along central shaft is at least 20% of crystal bar constant diameter segment length.
  7. 7. silicon single crystal rod described in claim 6, the length of its axially symmetric region is at least 40% of crystal bar constant diameter segment length.
  8. 8. silicon single crystal rod described in claim 7, the length of its axially symmetric region is at least 60% of crystal bar constant diameter segment length.
  9. 9. silicon single crystal rod described in claim 6, the width of its axially symmetric region is at least 60% of crystal bar constant diameter section radius length.
  10. 10. silicon single crystal rod described in claim 9, the width of its axially symmetric region is at least 80% of crystal bar constant diameter section radius length.
  11. 11. the growth technique of a silicon single crystal rod, its crystal bar comprises central shaft, seed crystal awl, tail crystalline cone and tool circular periphery and extend to the constant diameter section of the radius of circumferential edge from central shaft between seed crystal awl and tail crystalline cone, this crystal bar is grown from silicon melt by method of pulling up, from the Tc cooling, this technology is included in control crystalline speed of growth V and instantaneous axial-temperature gradient G in the crystal bar constant diameter section process of growth then 0To form axial symmetrical section, after crystal bar cools off from Tc, this section does not contain agglomerated intrinsic point defects substantially, this axially symmetric region expands inwardly from the circumferential edge of crystal bar and prolongs, its width that radially records towards the crystal bar central shaft from circumferential edge is at least 30% of crystal bar radius length, and its length that records along central shaft is at least 20% of crystal bar constant diameter segment length.
  12. 12. technology described in claim 11, wherein the length of its axially symmetric region is at least 40% of crystal bar constant diameter segment length.
  13. 13. technology described in claim 12, wherein the length of axially symmetric region is at least 60% of crystal bar constant diameter segment length.
  14. 14. technology described in claim 11, the width of its axially symmetric region are at least 60% of crystal bar constant diameter section radius length.
  15. 15. technology described in claim 14, the width of its axially symmetric region are at least 80% of crystal bar constant diameter section radius length.
  16. 16. the growth technique of a silicon single crystal rod, this silicon single crystal rod is characterised in that: grow into by method of pulling up and after Tc cooling at crystal bar, the constant diameter section of crystal bar comprises the axially symmetric region that does not have agglomerated intrinsic point defects substantially, and this technology comprises control crystalline speed of growth V and instantaneous axial-temperature gradient G 0, make ratio V/G 0From it threshold value about 0.6 times to about 1.5 times of values.
  17. 17. the growth technique of a silicon single crystal rod, this silicon single crystal rod is characterised in that: grow into by method of pulling up and after Tc cooling at crystal bar, the constant diameter section of crystal bar comprises does not have the rotational symmetry of agglomerated intrinsic point defects section substantially, and this technology comprises control crystalline speed of growth V and instantaneous axial-temperature gradient G 0, make ratio V/G 0From it threshold value about 0.6 times to about 1.5 times of values; And, make the speed of cooling scope from 0.2 ℃/min to 1.5 ℃/min in about 1400 ℃ to 800 ℃ temperature range inner control speed of cooling.
  18. 18. technology described in claim 17 is wherein to speed of growth V and instantaneous axial-temperature gradient G 0Control, make ratio V/G 0From it threshold value about 0.75 times to about 1 times of value.
  19. 19. technology described in claim 17 is wherein controlled speed of cooling in about 1400 ℃ to 1000 ℃ temperature range.
  20. 20. technology described in claim 19 is wherein controlled speed of cooling, make the speed of cooling scope from about 0.2 ℃/min to about 1 ℃/min.
  21. 21. technology described in claim 19, the oxygen deposition nucleation centre that wherein forms in single crystal growth process is taken off by silicon single crystal is annealed to divide.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1304647C (en) * 2002-05-09 2007-03-14 信越半导体株式会社 Silicon single crystal wafer and epitaxial wafer, and method for producing silicon single crystal
CN102978688A (en) * 2012-11-16 2013-03-20 晶科能源有限公司 Cooling process of czochralski single-crystal method
CN101490314B (en) * 2006-05-19 2013-06-12 Memc电子材料有限公司 Controlling agglomerated point defect and oxygen cluster formation induced by the lateral surface of a silicon single crystal during cz growth
WO2023125206A1 (en) * 2021-12-27 2023-07-06 中环领先半导体材料有限公司 Method for preparing single crystal, and silicon crystal

Families Citing this family (121)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG64470A1 (en) 1997-02-13 1999-04-27 Samsung Electronics Co Ltd Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnace and ingots and wafers manufactured thereby
US6503594B2 (en) 1997-02-13 2003-01-07 Samsung Electronics Co., Ltd. Silicon wafers having controlled distribution of defects and slip
US6485807B1 (en) 1997-02-13 2002-11-26 Samsung Electronics Co., Ltd. Silicon wafers having controlled distribution of defects, and methods of preparing the same
US6045610A (en) * 1997-02-13 2000-04-04 Samsung Electronics Co., Ltd. Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnance
US5994761A (en) * 1997-02-26 1999-11-30 Memc Electronic Materials Spa Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
EP0973962B1 (en) * 1997-04-09 2002-07-03 MEMC Electronic Materials, Inc. Low defect density, ideal oxygen precipitating silicon
DE69813041T2 (en) 1997-04-09 2004-01-15 Memc Electronic Materials Cut-off dominating silicon with low defect density
US6379642B1 (en) * 1997-04-09 2002-04-30 Memc Electronic Materials, Inc. Vacancy dominated, defect-free silicon
JPH1179889A (en) * 1997-07-09 1999-03-23 Shin Etsu Handotai Co Ltd Production of and production unit for silicon single crystal with few crystal defect, and silicon single crystal and silicon wafer produced thereby
EP1035234A4 (en) * 1997-08-26 2003-05-28 Sumitomo Mitsubishi Silicon High-quality silicon single crystal and method of producing the same
US6340392B1 (en) 1997-10-24 2002-01-22 Samsung Electronics Co., Ltd. Pulling methods for manufacturing monocrystalline silicone ingots by controlling temperature at the center and edge of an ingot-melt interface
JP3346249B2 (en) * 1997-10-30 2002-11-18 信越半導体株式会社 Heat treatment method for silicon wafer and silicon wafer
JP3407629B2 (en) * 1997-12-17 2003-05-19 信越半導体株式会社 Heat treatment method for silicon single crystal wafer and silicon single crystal wafer
JP3955375B2 (en) * 1998-01-19 2007-08-08 信越半導体株式会社 Silicon single crystal manufacturing method and silicon single crystal wafer
JPH11349393A (en) * 1998-06-03 1999-12-21 Shin Etsu Handotai Co Ltd Silicon single crystal wafer and production of silicon single crystal wafer
JP3943717B2 (en) 1998-06-11 2007-07-11 信越半導体株式会社 Silicon single crystal wafer and manufacturing method thereof
KR20010041957A (en) 1998-06-26 2001-05-25 헨넬리 헬렌 에프 Process for growth of defect free silicon crystals of arbitrarily large diameters
CN1155074C (en) * 1998-09-02 2004-06-23 Memc电子材料有限公司 Silicon on insulator structure from low-defect density single crystal silicon
DE69941196D1 (en) 1998-09-02 2009-09-10 Memc Electronic Materials Heat treated silicon wafers with improved self-termination
DE69933777T2 (en) 1998-09-02 2007-09-13 Memc Electronic Materials, Inc. METHOD FOR PRODUCING A SILICON WAFER WITH IDEAL OXYGEN FILLING BEHAVIOR
US6312516B2 (en) 1998-10-14 2001-11-06 Memc Electronic Materials, Inc. Process for preparing defect free silicon crystals which allows for variability in process conditions
US6416836B1 (en) 1998-10-14 2002-07-09 Memc Electronic Materials, Inc. Thermally annealed, low defect density single crystal silicon
CN1313651C (en) 1998-10-14 2007-05-02 Memc电子材料有限公司 Epitaxial silicon wafers substantially free of grown-in defects
JP4233651B2 (en) * 1998-10-29 2009-03-04 信越半導体株式会社 Silicon single crystal wafer
JP2000154070A (en) * 1998-11-16 2000-06-06 Suminoe Textile Co Ltd Ceramic three dimensional structure and its production
TW505710B (en) 1998-11-20 2002-10-11 Komatsu Denshi Kinzoku Kk Production method for silicon single crystal and production device for single crystal ingot, and heat treating method for silicon single crystal wafer
US6284384B1 (en) * 1998-12-09 2001-09-04 Memc Electronic Materials, Inc. Epitaxial silicon wafer with intrinsic gettering
KR20010083771A (en) * 1998-12-28 2001-09-01 와다 다다시 Method for thermally annealing silicon wafer and silicon wafer
JP3601340B2 (en) * 1999-02-01 2004-12-15 信越半導体株式会社 Epitaxial silicon wafer, method for manufacturing the same, and substrate for epitaxial silicon wafer
US6458202B1 (en) * 1999-09-02 2002-10-01 Memc Electronic Materials, Inc. Process for preparing single crystal silicon having uniform thermal history
US6391662B1 (en) * 1999-09-23 2002-05-21 Memc Electronic Materials, Inc. Process for detecting agglomerated intrinsic point defects by metal decoration
WO2001021861A1 (en) * 1999-09-23 2001-03-29 Memc Electronic Materials, Inc. Czochralski process for growing single crystal silicon by controlling the cooling rate
US6635587B1 (en) 1999-09-23 2003-10-21 Memc Electronic Materials, Inc. Method for producing czochralski silicon free of agglomerated self-interstitial defects
EP2259299A1 (en) * 1999-10-14 2010-12-08 Shin-Etsu Handotai Co., Ltd. Method for manufacturing SOI wafer, and SOI wafer
JP2001118801A (en) * 1999-10-18 2001-04-27 Mitsubishi Materials Silicon Corp Substrate for epitaxial wafer and semiconductor device using the same
JP3901092B2 (en) * 2000-06-30 2007-04-04 信越半導体株式会社 Method for producing silicon single crystal
KR100374703B1 (en) 2000-09-04 2003-03-04 주식회사 실트론 A Single Crystal Silicon Wafer, Ingot and Methods thereof
EP1669478B1 (en) * 2000-09-19 2010-03-17 MEMC Electronic Materials, Inc. Nitrogen-doped silicon substantially free of oxidation induced stacking faults
KR100917087B1 (en) * 2000-09-19 2009-09-15 엠이엠씨 일렉트로닉 머티리얼즈 인코포레이티드 Nitrogen-doped silicon substantially free of oxidation induced stacking faults
US6663708B1 (en) * 2000-09-22 2003-12-16 Mitsubishi Materials Silicon Corporation Silicon wafer, and manufacturing method and heat treatment method of the same
KR20020024368A (en) * 2000-09-25 2002-03-30 가와이 겐이찌 Silicon wafer
DE10066099B4 (en) * 2000-09-25 2008-11-20 Mitsubishi Materials Silicon Corp. Silicon wafer used in the production of semiconductor circuits has a low number of particles of crystalline origin in the wafer surface
US6689209B2 (en) * 2000-11-03 2004-02-10 Memc Electronic Materials, Inc. Process for preparing low defect density silicon using high growth rates
WO2003004734A1 (en) * 2000-11-03 2003-01-16 Memc Electronic Materials, Inc. Method for the production of low defect density silicon
US6858307B2 (en) 2000-11-03 2005-02-22 Memc Electronic Materials, Inc. Method for the production of low defect density silicon
US7105050B2 (en) 2000-11-03 2006-09-12 Memc Electronic Materials, Inc. Method for the production of low defect density silicon
US8529695B2 (en) 2000-11-22 2013-09-10 Sumco Corporation Method for manufacturing a silicon wafer
US20040055527A1 (en) * 2000-11-30 2004-03-25 Makoto Kojima Process for controlling thermal history of vacancy-dominated, single crystal silicon
KR20030059293A (en) * 2000-11-30 2003-07-07 엠이엠씨 일렉트로닉 머티리얼즈, 인크. Process for controlling thermal history of vacancy-dominated, single crystal silicon
US7008874B2 (en) * 2000-12-19 2006-03-07 Memc Electronics Materials, Inc. Process for reclaiming semiconductor wafers and reclaimed wafers
JP3624827B2 (en) 2000-12-20 2005-03-02 三菱住友シリコン株式会社 Method for producing silicon single crystal
JP3994665B2 (en) * 2000-12-28 2007-10-24 信越半導体株式会社 Silicon single crystal wafer and method for producing silicon single crystal
US20020084451A1 (en) * 2000-12-29 2002-07-04 Mohr Thomas C. Silicon wafers substantially free of oxidation induced stacking faults
KR100708788B1 (en) 2001-01-02 2007-04-19 엠이엠씨 일렉트로닉 머티리얼즈, 인크. Process for preparing single crystal silicon having improved gate oxide integrity
KR100805518B1 (en) * 2001-01-26 2008-02-20 엠이엠씨 일렉트로닉 머티리얼즈 인코포레이티드 Low defect density silicon having a vacancy-dominated core substantially free of oxidation induced stacking faults
US6743495B2 (en) 2001-03-30 2004-06-01 Memc Electronic Materials, Inc. Thermal annealing process for producing silicon wafers with improved surface characteristics
US6649883B2 (en) * 2001-04-12 2003-11-18 Memc Electronic Materials, Inc. Method of calibrating a semiconductor wafer drying apparatus
EP1710830A3 (en) * 2001-06-22 2007-11-28 MEMC Electronic Materials, Inc. Silicon on insulator structure having intrinsic gettering
WO2003001583A2 (en) * 2001-06-22 2003-01-03 Memc Electronic Materials, Inc. Process for producing silicon on insulator structure having intrinsic gettering by ion implantation
WO2003016598A1 (en) * 2001-08-15 2003-02-27 Memc Electronic Materials, Inc. Controlled crown growth process for czochralski single crystal silicon
US20030047130A1 (en) * 2001-08-29 2003-03-13 Memc Electronic Materials, Inc. Process for eliminating neck dislocations during czochralski crystal growth
JP4567251B2 (en) * 2001-09-14 2010-10-20 シルトロニック・ジャパン株式会社 Silicon semiconductor substrate and manufacturing method thereof
US6866713B2 (en) * 2001-10-26 2005-03-15 Memc Electronic Materials, Inc. Seed crystals for pulling single crystal silicon
US6669775B2 (en) 2001-12-06 2003-12-30 Seh America, Inc. High resistivity silicon wafer produced by a controlled pull rate czochralski method
TWI231357B (en) * 2002-10-18 2005-04-21 Sumitomo Mitsubishi Silicon Method for measuring defect-distribution in silicon monocrystal ingot
DE60334722D1 (en) * 2002-11-12 2010-12-09 Memc Electronic Materials PROCESS FOR THE MANUFACTURE OF A SILICONE INCRISTALITY TEMPERATURE GRADIENTEN TO CONTROL
KR101181052B1 (en) * 2002-11-12 2012-09-07 엠이엠씨 일렉트로닉 머티리얼즈, 인크. A crystal puller and method for growing a monocrystalline ingot
JP4382438B2 (en) * 2002-11-14 2009-12-16 株式会社東芝 Semiconductor wafer inspection method, semiconductor device development method, semiconductor device manufacturing method, and semiconductor wafer processing apparatus
JP2004172391A (en) * 2002-11-20 2004-06-17 Sumitomo Mitsubishi Silicon Corp Silicon wafer and method for manufacturing the same
US6916324B2 (en) * 2003-02-04 2005-07-12 Zimmer Technology, Inc. Provisional orthopedic prosthesis for partially resected bone
WO2004083496A1 (en) * 2003-02-25 2004-09-30 Sumitomo Mitsubishi Silicon Corporation Silicon wafer, process for producing the same and method of growing silicon single crystal
JP4151474B2 (en) * 2003-05-13 2008-09-17 信越半導体株式会社 Method for producing single crystal and single crystal
US7559326B2 (en) 2003-06-18 2009-07-14 Resmed Limited Vent and/or diverter assembly for use in breathing apparatus
JP2005015313A (en) * 2003-06-27 2005-01-20 Shin Etsu Handotai Co Ltd Method for manufacturing single crystal, and single crystal
US6955718B2 (en) * 2003-07-08 2005-10-18 Memc Electronic Materials, Inc. Process for preparing a stabilized ideal oxygen precipitating silicon wafer
KR100531552B1 (en) 2003-09-05 2005-11-28 주식회사 하이닉스반도체 Silicon wafer and method of fabricating the same
JP4432458B2 (en) * 2003-10-30 2010-03-17 信越半導体株式会社 Single crystal manufacturing method
US7074271B2 (en) * 2004-02-23 2006-07-11 Sumitomo Mitsubishi Silicon Corporation Method of identifying defect distribution in silicon single crystal ingot
KR100709798B1 (en) * 2004-10-19 2007-04-23 주식회사 실트론 High quality single crystal growing method
US7416603B2 (en) * 2004-10-19 2008-08-26 Siltron Inc. High quality single crystal and method of growing the same
KR100788018B1 (en) 2004-11-29 2007-12-21 주식회사 실트론 Silicon single crystal ingot and silicon wafer manufactured therefrom
GB0424505D0 (en) * 2004-11-05 2004-12-08 Gr Advanced Materials Ltd Emulsion ink
KR100714215B1 (en) 2004-11-23 2007-05-02 주식회사 실트론 High quality silicon single crystal ingot and high quality silicon wafer manufactured from the same
US7371283B2 (en) * 2004-11-23 2008-05-13 Siltron Inc. Method and apparatus of growing silicon single crystal and silicon wafer fabricated thereby
US20060138601A1 (en) * 2004-12-27 2006-06-29 Memc Electronic Materials, Inc. Internally gettered heteroepitaxial semiconductor wafers and methods of manufacturing such wafers
KR100840751B1 (en) * 2005-07-26 2008-06-24 주식회사 실트론 High quality silicon single crystalline ingot producing method, Apparatus for growing the same, Ingot, and Wafer
JP4743010B2 (en) * 2005-08-26 2011-08-10 株式会社Ｓｕｍｃｏ Silicon wafer surface defect evaluation method
KR100831044B1 (en) * 2005-09-21 2008-05-21 주식회사 실트론 An Apparatus Of Growing High Quality Silicon Single Crystalline Ingot, A Growing method Using The Same
US7633307B2 (en) * 2005-12-16 2009-12-15 Freescale Semiconductor, Inc. Method for determining temperature profile in semiconductor manufacturing test
US7427325B2 (en) 2005-12-30 2008-09-23 Siltron, Inc. Method for producing high quality silicon single crystal ingot and silicon single crystal wafer made thereby
JP4853027B2 (en) * 2006-01-17 2012-01-11 信越半導体株式会社 Method for producing silicon single crystal wafer
JP2007194232A (en) * 2006-01-17 2007-08-02 Shin Etsu Handotai Co Ltd Process for producing silicon single crystal wafer
DE102006034786B4 (en) 2006-07-27 2011-01-20 Siltronic Ag Monocrystalline semiconductor wafer with defect-reduced regions and method for annealing GOI-relevant defects in a monocrystalline semiconductor wafer
US7560355B2 (en) * 2006-10-24 2009-07-14 Vishay General Semiconductor Llc Semiconductor wafer suitable for forming a semiconductor junction diode device and method of forming same
JP2009292662A (en) * 2008-06-03 2009-12-17 Sumco Corp Method for forming shoulder in growing silicon single crystal
JP2009292663A (en) * 2008-06-03 2009-12-17 Sumco Corp Method for growing silicon single crystal
JP2010040587A (en) * 2008-07-31 2010-02-18 Covalent Materials Corp Method of manufacturing silicon wafer
IL204034A (en) * 2009-02-24 2015-05-31 Schott Ag Photovoltaic device with concentrator optics
KR101275418B1 (en) * 2010-03-16 2013-06-14 주식회사 엘지실트론 Method for Manufacturing Single Crystal Ingot, and Wafer manufactured by the same
CN101824649A (en) * 2010-04-30 2010-09-08 中山大学 Growth early-stage control method of automatic photoelectric crystal furnace
JP2012166979A (en) * 2011-02-14 2012-09-06 Sumco Corp Electromagnetic casting method and electromagnetic casting apparatus of polycrystalline silicon
JP5733245B2 (en) 2012-03-16 2015-06-10 信越半導体株式会社 Manufacturing method of silicon single crystal wafer
FR3005966B1 (en) * 2013-05-27 2016-12-30 Commissariat Energie Atomique PROCESS FOR MANUFACTURING A SILICON INGOT BY DIRECTING SOLIDIFICATION ON GERMS
FR3005967B1 (en) * 2013-05-27 2017-06-02 Commissariat Energie Atomique PROCESS FOR PRODUCING A SILICON INGOT HAVING SYMMETRIC GRAIN SEALS
US9634098B2 (en) 2013-06-11 2017-04-25 SunEdison Semiconductor Ltd. (UEN201334164H) Oxygen precipitation in heavily doped silicon wafers sliced from ingots grown by the Czochralski method
US20150243494A1 (en) * 2014-02-25 2015-08-27 Texas Instruments Incorporated Mechanically robust silicon substrate having group iiia-n epitaxial layer thereon
KR102384041B1 (en) 2014-07-31 2022-04-08 글로벌웨이퍼스 씨오., 엘티디. Nitrogen doped and vacancy dominated silicon ingot and thermally treated wafer formed therefrom having radially uniformly distributed oxygen precipitation density and size
DE102015224983B4 (en) 2015-12-11 2019-01-24 Siltronic Ag Single crystal silicon wafer and process for its production
DE102015226399A1 (en) 2015-12-22 2017-06-22 Siltronic Ag Silicon wafer with homogeneous radial oxygen variation
CN109346433B (en) 2018-09-26 2020-10-23 上海新傲科技股份有限公司 Method for bonding semiconductor substrate and bonded semiconductor substrate
WO2020210129A1 (en) 2019-04-11 2020-10-15 Globalwafers Co., Ltd. Process for preparing ingot having reduced distortion at late body length
JP2022529451A (en) 2019-04-18 2022-06-22 グローバルウェーハズ カンパニー リミテッド Growth method of single crystal silicon ingot using continuous Czochralski method
KR102647797B1 (en) 2019-09-13 2024-03-15 글로벌웨이퍼스 씨오., 엘티디. Methods for growing nitrogen-doped single crystal silicon ingots using the continuous Czochralski method and single crystal silicon ingots grown by this method
EP3929334A1 (en) 2020-06-23 2021-12-29 Siltronic AG Method for producing semiconductor wafers
EP3940124B1 (en) 2020-07-14 2024-01-03 Siltronic AG Monocrystalline silicon crystal article
KR20220066147A (en) * 2020-07-21 2022-05-23 와커 헤미 아게 How to Measure Trace Metals in Silicon
KR102255421B1 (en) * 2020-08-11 2021-05-24 충남대학교산학협력단 Method for Evaluating Defect in Monoclinic Gallium Oxide
CN113138195A (en) * 2021-04-16 2021-07-20 上海新昇半导体科技有限公司 Monitoring method of crystal defects and crystal bar growing method
CN113703411B (en) * 2021-08-31 2022-08-30 亚洲硅业(青海)股份有限公司 Polycrystalline silicon growth process monitoring system and method and polycrystalline silicon production system
CN115233296A (en) * 2022-07-25 2022-10-25 北京麦竹吉科技有限公司 Heater, crystal pulling furnace and method for eliminating self-gap defect of large-diameter monocrystalline silicon
EP4321656A1 (en) 2022-08-09 2024-02-14 Siltronic AG Method for producing a monocrystalline crystal made of silicon

Family Cites Families (75)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US622164A (en) * 1899-03-28 Carl august pfenning
US548735A (en) * 1895-10-29 Pile carpet
GB1456050A (en) * 1974-05-13 1976-11-17 British Aluminium Co Ltd Production of metallic articles
US3997368A (en) 1975-06-24 1976-12-14 Bell Telephone Laboratories, Incorporated Elimination of stacking faults in silicon devices: a gettering process
JPS583375B2 (en) * 1979-01-19 1983-01-21 超エル・エス・アイ技術研究組合 Manufacturing method of silicon single crystal wafer
US4350560A (en) * 1981-08-07 1982-09-21 Ferrofluidics Corporation Apparatus for and method of handling crystals from crystal-growing furnaces
US4473795A (en) * 1983-02-23 1984-09-25 International Business Machines Corporation System for resist defect measurement
JPS59190300A (en) 1983-04-08 1984-10-29 Hitachi Ltd Method and apparatus for production of semiconductor
JPS62105998A (en) * 1985-10-31 1987-05-16 Sony Corp Production of silicon substrate
CN86104069A (en) * 1986-06-09 1987-02-11 电子工业部第四十四研究所 The multiple impurity-absorbing technique of silicon and multiple impurity-absorbed silicon slice
JPS63215041A (en) 1987-03-04 1988-09-07 Toshiba Corp Etching liquid for crystal defect evaluation
US5264189A (en) 1988-02-23 1993-11-23 Mitsubishi Materials Corporation Apparatus for growing silicon crystals
US4981549A (en) 1988-02-23 1991-01-01 Mitsubishi Kinzoku Kabushiki Kaisha Method and apparatus for growing silicon crystals
JPH02137524A (en) 1988-11-18 1990-05-25 Matsushita Electric Ind Co Ltd Electronic tuner
JPH02180789A (en) 1989-01-05 1990-07-13 Kawasaki Steel Corp Production of si single crystal
JPH0633235B2 (en) 1989-04-05 1994-05-02 新日本製鐵株式会社 Silicon single crystal excellent in oxide film withstand voltage characteristic and method for manufacturing the same
JPH0633236B2 (en) 1989-09-04 1994-05-02 新日本製鐵株式会社 Method and apparatus for heat treating silicon single crystal and manufacturing apparatus
JPH0729878B2 (en) 1990-06-07 1995-04-05 三菱マテリアル株式会社 Silicon wafer
JPH04108682A (en) 1990-08-30 1992-04-09 Fuji Electric Co Ltd Device for producing compound semiconductor single crystal and production
JPH06103714B2 (en) 1990-11-22 1994-12-14 信越半導体株式会社 Method for inspecting electrical characteristics of silicon single crystal
JPH08760B2 (en) 1991-03-14 1996-01-10 信越半導体株式会社 Quality inspection method for silicon wafers
JP2613498B2 (en) * 1991-03-15 1997-05-28 信越半導体株式会社 Heat treatment method for Si single crystal wafer
JP3016897B2 (en) * 1991-03-20 2000-03-06 信越半導体株式会社 Method and apparatus for producing silicon single crystal
JP2758093B2 (en) 1991-10-07 1998-05-25 信越半導体株式会社 Manufacturing method of semiconductor wafer
JPH0684925A (en) * 1992-07-17 1994-03-25 Toshiba Corp Semiconductor substrate and its treatment
US5485803A (en) 1993-01-06 1996-01-23 Nippon Steel Corporation Method of predicting crystal quality of semiconductor single crystal and apparatus thereof
JPH0741383A (en) 1993-07-29 1995-02-10 Nippon Steel Corp Semiconductor single crystal and production thereof
JPH07158458A (en) 1993-12-10 1995-06-20 Mitsubishi Motors Corp Intake control device for multiple cylinder internal combustion engine
DE4414947C2 (en) 1993-12-16 1998-12-17 Wacker Siltronic Halbleitermat Method of pulling a single crystal from silicon
IT1280041B1 (en) * 1993-12-16 1997-12-29 Wacker Chemitronic PROCEDURE FOR DRAWING A SILICON MONOCRYSTAL
JP3276500B2 (en) 1994-01-14 2002-04-22 ワッカー・エヌエスシーイー株式会社 Silicon wafer and manufacturing method thereof
US5474020A (en) * 1994-05-06 1995-12-12 Texas Instruments Incorporated Oxygen precipitation control in czochralski-grown silicon cyrstals
JP3552278B2 (en) * 1994-06-30 2004-08-11 三菱住友シリコン株式会社 Method for producing silicon single crystal
KR960005669A (en) 1994-07-21 1996-02-23 이헌조 Method and apparatus for forming fluorescent film of black and white brown tube
JP2874834B2 (en) * 1994-07-29 1999-03-24 三菱マテリアル株式会社 Intrinsic gettering method for silicon wafer
JP3285111B2 (en) * 1994-12-05 2002-05-27 信越半導体株式会社 Method for producing silicon single crystal with few crystal defects
US5966282A (en) * 1994-12-20 1999-10-12 A. C. Data Systems, Inc. Power surge protection assembly
JPH08208374A (en) 1995-01-25 1996-08-13 Nippon Steel Corp Silicon single crystal and its production
US5593494A (en) 1995-03-14 1997-01-14 Memc Electronic Materials, Inc. Precision controlled precipitation of oxygen in silicon
JP2826589B2 (en) 1995-03-30 1998-11-18 住友シチックス株式会社 Single crystal silicon growing method
JP3085146B2 (en) 1995-05-31 2000-09-04 住友金属工業株式会社 Silicon single crystal wafer and method of manufacturing the same
JPH08337490A (en) 1995-06-09 1996-12-24 Shin Etsu Handotai Co Ltd Silicon single crystal almost free from crystal defect and its production
JP3006669B2 (en) * 1995-06-20 2000-02-07 信越半導体株式会社 Method and apparatus for producing silicon single crystal having uniform crystal defects
JP4020987B2 (en) 1996-01-19 2007-12-12 信越半導体株式会社 Silicon single crystal having no crystal defects around the wafer and its manufacturing method
US5958133A (en) * 1996-01-29 1999-09-28 General Signal Corporation Material handling system for growing high-purity crystals
JP3417515B2 (en) 1996-03-22 2003-06-16 信越半導体株式会社 Method for evaluating crystal defects of silicon single crystal substrate
DE19613282A1 (en) 1996-04-03 1997-10-09 Leybold Ag Device for pulling single crystals
DE19637182A1 (en) 1996-09-12 1998-03-19 Wacker Siltronic Halbleitermat Process for the production of silicon wafers with low defect density
JPH10152395A (en) 1996-11-21 1998-06-09 Komatsu Electron Metals Co Ltd Production of silicon single crystal
US5789309A (en) 1996-12-30 1998-08-04 Memc Electronic Materials, Inc. Method and system for monocrystalline epitaxial deposition
KR100237829B1 (en) 1997-02-06 2000-01-15 윤종용 Defect analysing method for wafer
SG64470A1 (en) * 1997-02-13 1999-04-27 Samsung Electronics Co Ltd Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnace and ingots and wafers manufactured thereby
US6045610A (en) 1997-02-13 2000-04-04 Samsung Electronics Co., Ltd. Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnance
US5994761A (en) * 1997-02-26 1999-11-30 Memc Electronic Materials Spa Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
DE19711922A1 (en) 1997-03-21 1998-09-24 Wacker Siltronic Halbleitermat Device and method for pulling a single crystal
DE69813041T2 (en) * 1997-04-09 2004-01-15 Memc Electronic Materials Cut-off dominating silicon with low defect density
US6379642B1 (en) * 1997-04-09 2002-04-30 Memc Electronic Materials, Inc. Vacancy dominated, defect-free silicon
EP0973962B1 (en) 1997-04-09 2002-07-03 MEMC Electronic Materials, Inc. Low defect density, ideal oxygen precipitating silicon
JPH1179889A (en) 1997-07-09 1999-03-23 Shin Etsu Handotai Co Ltd Production of and production unit for silicon single crystal with few crystal defect, and silicon single crystal and silicon wafer produced thereby
US5942032A (en) 1997-08-01 1999-08-24 Memc Electronic Materials, Inc. Heat shield assembly and method of growing vacancy rich single crystal silicon
US5922127A (en) 1997-09-30 1999-07-13 Memc Electronic Materials, Inc. Heat shield for crystal puller
JP3919308B2 (en) 1997-10-17 2007-05-23 信越半導体株式会社 Method for producing silicon single crystal with few crystal defects and silicon single crystal and silicon wafer produced by this method
JP3596257B2 (en) 1997-11-19 2004-12-02 三菱住友シリコン株式会社 Manufacturing method of silicon single crystal wafer
US6245430B1 (en) * 1997-12-12 2001-06-12 Sumitomo Sitix Corporation Silicon single crystal wafer and manufacturing method for it
JP3634133B2 (en) 1997-12-17 2005-03-30 信越半導体株式会社 Method for producing silicon single crystal with few crystal defects and silicon single crystal wafer
JP4147599B2 (en) 1997-12-26 2008-09-10 株式会社Ｓｕｍｃｏ Silicon single crystal and manufacturing method thereof
JP3627498B2 (en) 1998-01-19 2005-03-09 信越半導体株式会社 Method for producing silicon single crystal
JP3955375B2 (en) 1998-01-19 2007-08-08 信越半導体株式会社 Silicon single crystal manufacturing method and silicon single crystal wafer
DE19823962A1 (en) 1998-05-28 1999-12-02 Wacker Siltronic Halbleitermat Method of manufacturing a single crystal
US6077343A (en) 1998-06-04 2000-06-20 Shin-Etsu Handotai Co., Ltd. Silicon single crystal wafer having few defects wherein nitrogen is doped and a method for producing it
US6093913A (en) 1998-06-05 2000-07-25 Memc Electronic Materials, Inc Electrical heater for crystal growth apparatus with upper sections producing increased heating power compared to lower sections
CN1155074C (en) 1998-09-02 2004-06-23 Memc电子材料有限公司 Silicon on insulator structure from low-defect density single crystal silicon
CN1313651C (en) * 1998-10-14 2007-05-02 Memc电子材料有限公司 Epitaxial silicon wafers substantially free of grown-in defects
US6416836B1 (en) * 1998-10-14 2002-07-09 Memc Electronic Materials, Inc. Thermally annealed, low defect density single crystal silicon
US20020084451A1 (en) * 2000-12-29 2002-07-04 Mohr Thomas C. Silicon wafers substantially free of oxidation induced stacking faults

Cited By (6)

* Cited by examiner, † Cited by third party
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CN1304647C (en) * 2002-05-09 2007-03-14 信越半导体株式会社 Silicon single crystal wafer and epitaxial wafer, and method for producing silicon single crystal
CN101490314B (en) * 2006-05-19 2013-06-12 Memc电子材料有限公司 Controlling agglomerated point defect and oxygen cluster formation induced by the lateral surface of a silicon single crystal during cz growth
CN102978688A (en) * 2012-11-16 2013-03-20 晶科能源有限公司 Cooling process of czochralski single-crystal method
CN102978688B (en) * 2012-11-16 2015-07-08 晶科能源有限公司 Cooling process of czochralski single-crystal method
WO2023125206A1 (en) * 2021-12-27 2023-07-06 中环领先半导体材料有限公司 Method for preparing single crystal, and silicon crystal
TWI829486B (en) * 2021-12-27 2024-01-11 大陸商中環領先半導體材料有限公司 Preparation method of single crystal and silicon crystal

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