JPH0729878B2 - Silicon wafer - Google Patents

Silicon wafer

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Publication number
JPH0729878B2
JPH0729878B2 JP14959590A JP14959590A JPH0729878B2 JP H0729878 B2 JPH0729878 B2 JP H0729878B2 JP 14959590 A JP14959590 A JP 14959590A JP 14959590 A JP14959590 A JP 14959590A JP H0729878 B2 JPH0729878 B2 JP H0729878B2
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Prior art keywords
silicon wafer
silicon
single crystal
etch pits
jp
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JP14959590A
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JPH0442893A (en )
Inventor
幹男 岸本
康 島貫
悦郎 森田
俊郎 田中
次郎 龍田
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三菱マテリアルシリコン株式会社
三菱マテリアル株式会社
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【発明の詳細な説明】 〈産業上の利用分野〉 本発明はLSI等の作製に用いられるシリコンウエーハ、 BACKGROUND OF THE INVENTION <FIELD OF THE INVENTION> The present invention is a silicon wafer used for manufacturing of such LSI,
詳しくはCZ法により引き上げられ、作製されたシリコンウエーハの改良に関する。 Details pulled by the CZ method, an improvement of the fabricated silicon wafer.

〈従来の技術〉 従来のCZ法によるシリコンウエーハは、引き上げられた単結晶シリコンをスライサーによってスライスして作製されている。 Silicon wafer according to <ART> conventional CZ method is manufactured by slicing a single-crystal silicon pulled up by the slicer. この切断されたシリコンウエーハは、ラップまたは研削が行なわれ、さらに加工歪を除去するため、化学的エッチングが行われている。 The cut silicon wafer, wrap or grinding is performed, in order to further remove work strain, chemical etching is performed.

そして、最終仕上げとして、このシリコンウエーハはその表面が鏡面研磨され、洗浄されている。 Then, as a final finishing, the silicon wafer surface thereof is mirror-polished, and cleaned.

〈発明が解決しようとする課題〉 しかしながら、このようなCZ法により作製した従来のシリコンウエーハにあっては小さく高密度の欠陥、または、大きく低密度の欠陥のいずれかが、存在していた。 <SUMMARY OF THE INVENTION> However, high-density defects smaller in the conventional silicon wafer produced by such a CZ method or any defects of large low density, was present.
これらの欠陥は、鏡面研磨後のアンモニア系洗浄においてその表面にエッチピットとなって表れる。 These defects appears as a etch pits on the surface of the ammonia-based washing after mirror polishing.

そして、この欠陥によりシリコンウエーハの電気的特性が損なわれていた。 The electrical properties of the silicon wafer has been impaired by the defect.

また、その結果としてシリコンウエーハの製造における歩留まりが低下していた。 Moreover, the yield in the manufacture of the silicon wafer was reduced as a result.

そこで、本発明は、電気特性が向上するとともに、製造時の歩留まりを高めたシリコンウエーハ提供することをその目的としている。 The present invention, together with the electrical characteristics are improved, and to provide a silicon wafer with increased yield during production and its purpose.

〈課題を解決するための手段〉 本発明は、CZ法によってシリコン単結晶が引き上げられ、このシリコン単結晶を素材として作製されたシリコンウエーハにおいて、そのシリコンウエーハの表面にエッチピットが存在しないシリコンウエーハを提供するものである。 The present invention <Means for Solving the Problems> A silicon single crystal is pulled up by the CZ method, a silicon wafer which is manufactured the silicon single crystal as a material, a silicon wafer having an etch pit is not present on the surface of the silicon wafer it is intended to provide.

〈作用および効果〉 本発明に係るシリコンウエーハにあっては、鏡面研磨後のアンモニア系洗浄においてそのシリコンウエーハの表面には実質上エッチピットは存在しない。 In the silicon wafer according to <Function and Effect> The present invention, on the surface of the silicon wafer in the ammonia-based washing after mirror polishing are not substantially etch pits exist. すなわち、このシリコンウエーハの表面近傍には上記欠陥が存在しないものである。 That is, in the vicinity of the surface of the silicon wafer in which the defect is not present.

そして、このようなエッチピットのないシリコンウエーハを作製するには、CZ法により引き上げたシリコン単結晶を所定の冷却速度で冷却する。 Then, to prepare a silicon wafer without such etch pits cools the silicon single crystal was pulled by the CZ method at a predetermined cooling rate. 例えばシリコン単結晶が1200℃から800℃に冷却されるまでの間の全期間にあってその冷却速度を0.4℃/分より小さくしたものである。 For example, those silicon single crystal the cooling rate was less than 0.4 ° C. / min In the entire period until it is cooled to 800 ° C. from 1200 ° C..

この結果、エッチピット、すなわち欠陥のないシリコンウエーハが得られる。 Consequently, etch pits, that is, a silicon wafer having no defects is obtained. よって、電気特性は向上し、かつ、シリコンウエーハの製造上の歩留まりも向上するものである。 Therefore, the electrical characteristics are improved, and is intended to be improved manufacturing yield of the silicon wafer.

〈実施例〉 以下、本発明の実施例を説明する。 <Example> Hereinafter, an embodiment of the present invention.

この実施例においては、シリコン単結晶の成長には、CZ In this embodiment, the growth of silicon single crystal, CZ
法が用いられている。 The law has been used.

この場合、引き上げられたシリコン単結晶が1200℃から From this case, the silicon was pulled single crystal 1200 ° C.
800℃にまで冷却されるその全期間の冷却速度を0.4℃/ The cooling rate of the entire period to be cooled to 800 ° C. 0.4 ° C. /
分より小さい速度に制御する。 To control the minute less than the speed. または、この冷却速度を Or, the cooling rate
0.5〜1.0℃/分とすることもできる。 It can also be a 0.5~1.0 ℃ / min.

そして、このようにして引き上げ形成した高純度の単結晶シリコンを、通常条件のプロセスを用いてウエーハ加工し、研磨する。 Then, in this way the high-purity single crystal silicon which is pulled formed, and a wafer processed using the process of normal conditions, polished.

このようにして作製したP型、(100)方位のシリコンウエーハをアンモニア系洗浄液、例えばNH 4 OH/H 2 O 2 /H 2 O In this way, the P-type produced, (100) orientation silicon wafer ammonia-based cleaning liquid, for example NH 4 OH / H 2 O 2 / H 2 O
液(1:1:5)を用いて、エッチング作用を強くするために通常よりも高温である85℃で、20分間程度洗浄する。 Liquid (1: 1: 5) and according to the 85 ° C. than normal at a high temperature in order to strengthen the etching action, and washed for about 20 minutes.

この洗浄を10回繰り返す。 This washing is repeated 10 times. この結果、0.1μmの大きさのエッチピットを周知パーティクルカウンタによりカウントすることができる。 As a result, it is possible to count the known particle counter etch pits in the size of 0.1 [mu] m.

この結果、シリコンウエーハの表面においては、例えば現在顧客からの要求レベルでもある直径0.2μm程度の大きさのエッチピットが形成されることはない。 As a result, in the surface of the silicon wafer, for example, it never requests a diameter of about 0.2μm, which is also the level magnitude of the etch pits from the current customer is formed.

例えば周知パーティクルカウンタにより測定した場合、 For example when measured by a known particle counter,
従来のCZ法に係るシリコンウエーハではこのアンモニア系洗浄を10回繰り返すことにより、エッチピットが1000 In the silicon wafer according to the conventional CZ method by repeating the ammonia-based washing 10 times, etch pits 1000
個程度確認することができた。 It was possible to confirm the order number. これに対して、本実施例では同様の洗浄後の測定では0個、すなわちエッチピットは確認することができなかったものである。 In contrast, zero is measured after similar wash in this embodiment, i.e. the etch pits are those that could not be confirmed.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 龍田 次郎 埼玉県大宮市北袋町1丁目297番地 三菱 金属株式会社中央研究所内 (72)発明者 島貫 康 埼玉県大宮市北袋町1丁目297番地 三菱 金属株式会社中央研究所内 (72)発明者 田中 俊郎 東京都千代田区岩本町3丁目8番16号 日 本シリコン株式会社内 (56)参考文献 特開 昭56−45894(JP,A) 特開 昭61−201692(JP,A) 特開 昭62−202900(JP,A) 特開 平3−177391(JP,A) ────────────────────────────────────────────────── ─── of the front page continued (72) inventor Jiro Tatsuta Saitama Prefecture Omiya Kitabukuro-cho 1-chome 297 address Mitsubishi metal Co., Ltd. center within the Institute (72) inventor Yasushi Shimanuki Saitama Prefecture Omiya Kitabukuro-cho 1-chome 297 address Mitsubishi metal Co., Ltd. center within the Institute (72) inventor Toshiro Tanaka, Chiyoda-ku, tokyo Iwamotocho 3-chome No. 8 No. 16 Date this silicon within Co., Ltd. (56) reference Patent Sho 56-45894 (JP, a) JP Akira 61 -201692 (JP, A) JP Akira 62-202900 (JP, A) JP flat 3-177391 (JP, A)

Claims (1)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】CZ法によってシリコン単結晶が引き上げられ、このシリコン単結晶を素材として作製されたシリコンウエーハにおいて、 そのシリコンウエーハの表面にエッチピットが存在しないことを特徴とするシリコンウエーハ。 1. A silicon single crystal is pulled up by the CZ method, a silicon wafer which is manufactured the silicon single crystal as a material, a silicon wafer, characterized in that there is no etch pits on the surface of the silicon wafer.
JP14959590A 1990-06-07 1990-06-07 Silicon wafer Expired - Lifetime JPH0729878B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14959590A JPH0729878B2 (en) 1990-06-07 1990-06-07 Silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14959590A JPH0729878B2 (en) 1990-06-07 1990-06-07 Silicon wafer

Publications (2)

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JPH0442893A true JPH0442893A (en) 1992-02-13
JPH0729878B2 true JPH0729878B2 (en) 1995-04-05

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JP14959590A Expired - Lifetime JPH0729878B2 (en) 1990-06-07 1990-06-07 Silicon wafer

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6913647B2 (en) 1998-06-26 2005-07-05 Memc Electronic Materials, Inc. Process for cooling a silicon ingot having a vacancy dominated region to produce defect free silicon

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5629216A (en) * 1994-06-30 1997-05-13 Seh America, Inc. Method for producing semiconductor wafers with low light scattering anomalies
US5709755A (en) * 1996-08-09 1998-01-20 Taiwan Semiconductor Manufacturing Company, Ltd. Method for CMP cleaning improvement
US6379642B1 (en) 1997-04-09 2002-04-30 Memc Electronic Materials, Inc. Vacancy dominated, defect-free silicon
DE69806369D1 (en) 1997-04-09 2002-08-08 Memc Electronic Materials Silicon with low defect density and ideal oxygen precipitation
CN1280454C (en) 1997-04-09 2006-10-18 Memc电子材料有限公司 Low defect density, ideal oxygen precipitating silicon
WO2000022197A9 (en) 1998-10-14 2000-10-26 Memc Electronic Materials Epitaxial silicon wafers substantially free of grown-in defects
US7105050B2 (en) 2000-11-03 2006-09-12 Memc Electronic Materials, Inc. Method for the production of low defect density silicon
CN100348782C (en) 2001-01-26 2007-11-14 Memc电子材料有限公司 Low defect density silicon substantially free of oxidution induced stacking faults having vacancy-dominated core
CN101490314B (en) 2006-05-19 2013-06-12 Memc电子材料有限公司 Controlling agglomerated point defect and oxygen cluster formation induced by the lateral surface of a silicon single crystal during cz growth

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5645894A (en) * 1979-09-25 1981-04-25 Kokusai Electric Co Ltd Reducing method for defect of silicon single crystal
JPH0367994B2 (en) * 1985-03-04 1991-10-24 Mitsubishi Materiaru Kk
JPH0463839B2 (en) * 1986-03-03 1992-10-13 Tokyo Shibaura Electric Co
JP2549445B2 (en) * 1989-12-05 1996-10-30 新日本製鐵株式会社 Method for manufacturing a silicon single crystal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6913647B2 (en) 1998-06-26 2005-07-05 Memc Electronic Materials, Inc. Process for cooling a silicon ingot having a vacancy dominated region to produce defect free silicon

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Publication number Publication date Type
JPH0442893A (en) 1992-02-13 application

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