CN1220171C - 电流写入型有源矩阵有机电致发光显示面板数据驱动电路 - Google Patents
电流写入型有源矩阵有机电致发光显示面板数据驱动电路 Download PDFInfo
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- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
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Abstract
用于电流写入型AMOEL显示面板的数据驱动电路,包括:多个电流输出通道;多个在各个电流输出通道上的通道电流产生电路,用于使电流输出通道之间产生的电流级别的差最小化。每个通道电流产生电路包括:一对晶体管;电流产生部分,用于产生与一对晶体管的门限电压的差的平方成正比的小偏差的电流;以及电流镜像部分,用于对电流入行镜像,并将镜像的电流作为通道的通道电流入行发送,从而使输出通道之间产生的电流级别的差最小化,并均匀地驱动AMOEL显示面板。
Description
本申请要求2002年1月9日提交的韩国申请No.P2002-1175的利益,在这里,其被引入作为参考。
技术领域
本发明涉及用于电流写入型有源矩阵有机电致发光(AMOEL)显示面板的数据驱动电路。
背景技术
通常,有两种有源矩阵有机电致发光(AMOEL:Active Matrix OrganicElectro Luminescent)的像素结构;电压写入型像素结构和电流写入型像素结构。电流写入型像素结构的AMOEL显示面板对诸如门限电压的变化、地线上无规律的电压升高之类的各种噪声敏感。
图1说明了两个有源元件的电压写入型像素结构的一种相关技术的电路。
参考图1,电荷存储电容器Cstg,具有:驱动三极管Q1,用于直接驱动有机电致发光元件(OEL);并具有与之相连的正电压源VDD;该电荷存储电容器Cstg用于存储薄膜晶体管-液晶显示器(TFT-LCD:Thin FilmTransistor-Liquid Crystal Display)的电荷。驱动晶体管Q1的一侧与OEL的正极相连。开关晶体管Q2具有与扫描线相连的栅极,用于在来自扫描线的信号的控制下,切换OEL。开关晶体管Q2的源极与数据线相连,其漏极与驱动晶体管Q1的栅极相连。电荷存储电容器Cstg与正电压源VDD相连,且与驱动晶体管Q1的栅极相连。如图1中所示,驱动晶体管Q1和开关晶体管Q2是P型金属氧化物半导体(PMOS:Ptype Metal Oxide Semiconductor)晶体管。
将要解释的是图1中的电路的操作。
具有调节的灰度等级的数据电压,通过开关晶体管Q2,从数据线被提供到电荷存储电容器Cstg、以及驱动晶体管Q1的栅极。当开关晶体管Q2响应扫描线信号而关闭时,每个像素的灰度等级的数据电压通过数据线被写到电荷存储电容器Cstg上。写入的数据电压被用作控制电压,以固定驱动晶体管Q1的电流级别(level)。被控制电压控制的电流通过驱动晶体管Q1被提供给OEL。AMOEL面板具有许多像素,其中,如果在像素之间的驱动晶体管Q1的电压-电流特性不是均匀的,则在像素中流入到OEL的电流就不是均匀的,即使在电荷存储电容器Cstg上写入的电压是相同的,结果,在AMOEL显示面板上出现非均匀的显示,即,非均匀的发光,这是电压写入型的缺点之一。
图2说明了电流写入型的相关技术像素的电路。与图1中所示的电压写入型不同,灰度等级的电流级别直接被写在驱动晶体管P1上。
参考图2,如果用于提供写入电流Idata的数据驱动电路是均匀地可操作的,则有机电致发光(EL)面板可以均匀地显示,即使像素的驱动晶体管P1的电压-电流特性不是均匀的。然而,图2实际上说明了用于仅仅一个像素的数据驱动电路。也就是说,用于提供写入电流的部分,不仅作为如在数据驱动电路部分中的一个电路而存在,而且存在于全部数据线或几条数据线。因此,如果在提供写入电流的电路之中出现故障,电流写入型的像素就不能最好地利用它们的优点,使得有机EL面板不能具有均匀的显示特性。
为了解决图2的问题,可以使用图3中所说明的电路。图3说明了用于对参考电流源IREF进行镜像以提供期望的电流源的电路。在这种情况中,一个参考电流源被使用在数据驱动电路中。然而,参考图3,如果一个参考电流源被镜像到所有的数据线,则,如果起镜像作用的晶体管之间的距离离参考电流源太远,那么,参考电流源就不能被精确地镜像。
参考图4,作为另一种方法,可以采用用于校正参考电流源IREF的电路。在这个电路的情况中,诸如晶体管、以及电荷存储电容器之类的电流源器件,可以被用于使数据线的校准周期相等。然而,在电荷存储晶体管的栅极和源极之间的电流泄漏引起数据线上的电压变化,和数据线之间的非均匀的输出电流。
发明内容
相应地,本发明致力于一种用于具有电流写入型像素结构的AMOEL显示面板的数据驱动电路,它充分地消除了由于相关技术的限制和缺点而引起的一个或多个问题。
本发明的目的是提供一种用于具有电流写入型像素结构的AMOEL显示面板的数据驱动电路,在其中,在通道中的输出电流级别之间的差被最小化,以便对具有电流写入型像素结构的AMOEL面板进行均匀地驱动。
本发明的另一个目的是提供一种用于电流写入型AMOEL显示面板的数据驱动电路,它能根据流过AMOEL显示面板的电流的大小,在AMOEL显示通道上均匀且精确地显示数据。
本发明的再一个目的是提供一种用于TFT-AMOEL或具有电流写入型像素结构的单一晶体的AMOEL显示面板的数据驱动电路。
本发明的附加特点和优点将在随后的描述中给出,以及将从描述中部分地显现出来,或通过本发明的实践而被理解。本发明的目的和其它优点,将通过书面的说明书、及其权利要求书和附图中所特别指出的结构来实现和获得。
为实现这些和其它优点,并根据本发明的目的,如所具体地表达的和概括地描述的,用于电流写入型AMOEL显示面板的数据驱动电路包括:多个电流输出通道;以及在各个电流输出通道上的多个通道电流产生电路,用于使在电流输出通道之间产生的电流级别的差最小化,每一个通道电流产生电路包括一对具有相同宽度、长度和一个公共栅极端的PMOS晶体管,第一偏压电路与该PMOS晶体管对的公共栅极端相连,以防止公共栅极端的浮动(floating),第一NMOS晶体管用于接收来自该PMOS晶体管对的输出电流,n(n=1,2,3,……)个第二NMOS晶体管连接到第一NMOS晶体管的栅极端,每一个第二NMOS晶体管与第一NMOS晶体管一起形成一个电流镜,用于对来自该PMOS晶体管对的输出电流入行镜像,并且,n个PMOS晶体管分别与n个第二NMOS晶体管串联连接,其中,n个PMOS晶体管的输出是并联连接的。
最好是,一对PMOS晶体管具有相同的宽度和长度。
可以理解,前面的一般性的描述和下面的详细的描述均是示范性的和解释性的,是打算提供对所寻求保护的本发明的进一步的解释。
附图说明
所包括的附图提供了对本发明的进一步的理解,并且被并入而构成这份说明书的一部分,与描述一起来说明本发明的实施例,以便解释本发明的原理。
在附图中:
图1说明了用于具有两个有源元件的电压写入型显示面板的相关技术的数据驱动电路;
图2说明了用于电流写入型显示面板的相关技术的数据驱动电路;
图3说明了:应用了对参考电流源进行镜像的方法的电流写入型显示面板的相关技术的数据驱动电路;
图4说明了:应用了通过使用参考电流源进行校正的方法的电流写入型显示面板的相关技术的数据驱动电路;
图5A说明了:用于根据本发明的优选实施例的电流写入型AMOEL显示面板的数据驱动电路;
图5B说明了图5A中的每一个通道电流产生电路的详细电路。
具体实施方式
现在,将详细参考本发明的优选实施例,其示例说明于附图5A,5B中。图5A说明了根据本发明的优选实施例的用于电流写入型AMOEL显示面板的数据驱动电路的方框图。
参考图5A,数据驱动电路包括多个电流输出通道Iout1,Iout2,…,Ioutk;以及在各个电流输出通道位置上的多个通道电流产生电路,用于使在电流输出通道Iout1,Iout2,…,Ioutk之间产生的电流级别的差最小化。
参考图5B,通道电流产生电路包括具有相同的宽度、长度、电流输出通道Iout、以及一个公共栅极端的一对PMOS晶体管Q1和Q2,偏压电路10连到PMOS晶体管对Q1和Q2的公共栅极端,以防止公共栅极端浮动,第一NMOS晶体管M1用于接收来自该PMOS晶体管对Q1和Q2的电流,n个第二NMOS晶体管M2,M3,…,Mn+1的每一个都具有与第一NMOS晶体管M1的栅极端一样的栅极端,以便与第一NMOS晶体管M1一起形成电流镜像电路,用于对来自该PMOS晶体管对Q1和Q2的电流IQ2进行镜像,并且,n个第二PMOS晶体管D1,D2,…,Dn分别与n个第二NMOS晶体管M2,M3,…,Mn+1的输出侧连接,该n个第二NMOS晶体管M2,M3,…,Mn+1的输出并联连接,以形成电流输出通道Iout1,Iout2,…,Ioutk之中的一个。
参考图5B,PMOS晶体管对Q1和Q2之中的一个具有相互连接的一个主体(body)和一个源极,它们又相连到第一外部偏压VBias1,并且,PMOS晶体管对的公共栅极端连到外部偏压电路10以防止浮动。外部偏压电路包括连在公共栅极端与地之间的三个NMOS晶体管,并具有用作公共栅极电压的第二外部偏压VBias2。
同时,n个PMOS晶体管D1,D2,…,Dn中的每一个都接收一个比特的外部数字栅极信号,用于控制到相关的NMOS晶体管M的电流。来自第二POMS晶体管D1,D2,…,Dn的电流被并联地加在一起,并作为一个驱动电流提供给电流输出通道之中的一个。通过将n-比特的数字信号结合到n个PMOS晶体管D1,D2,…,Dn,驱动电流被调节以具有二进制形式的电流级别。n个第二NMOS晶体管M2,M3,…,Mn+1的每一个的宽度和长度被固定,使得流入到其中的电流是来自PMOS晶体管对的电流IQ2的2α(α=0,1,…)倍。
如根据该实施例所解释的,具有正比于PMOS晶体管Q1和Q2的门限电压的差的平方的小的变化的电流,是通过使用PMOS晶体管对Q1和Q2而产生的,并且,通过n+1个NMOS晶体管M1,M2,…,Mn+1的n个电流镜像电路而被镜像。来自每个电流镜像电路的输出电流,通过相关的第二PMOS晶体管‘D’来进行调节,并被并联地加在一起。相加的值是一个通道的电流值。从而,所获得的通道电流值的每一个,使通道之间的驱动电流的级别的差最小化,而进行AMOEL显示面板的均匀操作。
此外,参考图5B,即使在输出通道上感应的电压由于各个输出通道的有效的接地阻抗的差异而不同,由接地阻抗的差异而引起的在输出通道上的电压升高,也不会对通道的输出电流产生大的影响,这是因为,在PMOS晶体管对Q1和Q2上产生的电流IQ2,通过n+1个NMOS晶体管M1,M2,…,Mn+1的n个电流镜像电路而被镜像。在地线上的电压升高的影响被抵弥补了。
当数据驱动电路具有许多通道,这些通道需要很长的公共的地线时,在彼此相距很远的通道之间的地线的有效阻抗是不同的。如果通道之间的接地阻抗不同,在地线上感应的电压也不同。然而,参考图5B,来自PMOS晶体管对Q1和Q2的电流IQ2与通道的驱动电流相比是很小的,所述的驱动电流是n+1个第二NMOS晶体管M1,M2,M3,…,Mn+1的电流镜像电路的输出电流,因来自PMOS晶体管对Q1和Q2的电流IQ2引起的电压降可以被忽略。
此外,由PMOS晶体管对Q1和Q2产生的来自一个通道的输出电流,在被NMOS晶体管的镜像电路镜像之后而被利用,由接地阻抗的差异引起的电压升高不会对来自通道的输出电流产生影响。这样,在具有不同有效地电压的通道之间的电流级别的偏差可以被减小到一个小的值。
来自通道的输出电流Iout的级别,通过控制来自电流镜像电路的输出电流而被固定,其中,来自电流镜像电路的输出电流是借助于n个PMOS晶体管D1,D2,…,Dn而镜像于第一NMOS晶体管M1的电流IQ2的。该n个第二PMOS晶体管D1,D2,…,Dn使用作为门信号的外部n-比特数字信号,来控制来自电流镜像电路的输出电流。使用n-比特数字信号作为其门信号的n个PMOS晶体管D1,D2,…,Dn,与n个第二NMOS晶体管M2,M3,…,Mn+1串联连接。NMOS晶体管M2,M3,…,Mn+1之中的每一个,通过n-比特的组合而具有2n个电流级别的宽度和长度,从而是来自PMOS晶体管对Q1和Q2的电流IQ2的2α(α=0,1,2,……)倍之中的一个。
流入第一NMOS晶体管M1的电流IQ2是由PMOS晶体管对Q1和Q2产生的,所述的PMOS晶体管对Q1和Q2具有与第一NMOS晶体管M1相同的宽度和长度。PMOS晶体管对Q1和Q2的公共栅极连接有可变的阻抗。外部偏压电路10连到PMOS晶体管对Q1和Q2的公共栅极上。源极和PMOS晶体管Q1的主体相互连接,再连到第一外部偏置电流源VBias1上。PMOS晶体管Q2的源极连接正电压源VDD。
来自PMOS晶体管Q2的电流IQ2可以通过下面的方程(1)和(2)计算。
|IQ1|=K1(VBias1-Vx-|Vth1|2----------------------------------------(1)
其中,
以及
其中,K1=μpCσx(W1/L1),
K2=μpCσx(W2/L2)。
参考方程(2),如果正电压源电压VDD、第一外部偏压VBias1和
是常数,则来自PMOS晶体管Q2的电流IQ2与PMOS晶体管对Q1和Q2的门限电压的差的平方成正比。
这意味着,如果PMOS晶体管Q1和Q2设计成为接近的,则PMOS晶体管对Q1和Q2提供均匀的源极电流IQ2,即使是当电流输出通道之间的距离远时,在各个通道上的PMOS晶体管Q1和Q2的门限电压变化了。
也就是说,由于PMOS晶体管对Q1和Q2设计成为接近的,来自PMOS晶体管对的输出,即,来自PMOS晶体管对Q1和Q2的基极电流IQ2具有小的偏差的电流值,所述的小的偏差的电流值与PMOS晶体管对Q1和Q2的门限电压的差的平方成正比,从而提供相当均匀的电流值。
另外,如果PMOS晶体管对Q1和Q2相隔远,则来自PMOS晶体管对Q1和Q2的基极电流IQ2是大的偏差的电流,所述的大的偏差的电流与PMOS晶体管对Q1和Q2的门限电压Vth1和Vth2的差的平方成正比。
如所解释的,由于所获得的均匀的电流IQ2如此通过位于靠近PMOS晶体管对Q1和Q2的n+1个NMOS晶体管的电流镜像电路,所以电流镜像电路的并联总合被用作来自数据驱动电路的一个均匀通道的输出电流Iout。
另外,该实施例的数据驱动电路通过下述的原理补偿了通道的地电压的差异,即使出现了差异。
如所解释的,在数据驱动电路中有很多电流输出通道的情况下,要求通道的公共地线非常长,其长度依赖于通道的位置。相距远的通道具有不同的地线的有效阻抗。
例如,如果两个相距远的通道具有不同的有效接地阻抗,在地线上感应的电压也因通道的不同而异。
由于在数据驱动电路中,来自用于一个通道的PMOS晶体管对的电流IQ2的级别,与通道输出电流Iout相比是如此之低,从而足以忽略由PMOS晶体管对Q1和Q2的电流IQ2引起的正电压源电压VDD的电压降。在简单地使用NMOS晶体管的电流源时,由通道输出电流Iout引起的在地线上的电压上升,是通道输出电流不同的原因。
来自PMOS晶体管对Q1和Q2的电流IQ2,与镜像到n+1个NMOS晶体管M1,M2,…,Mn+1的电流镜像电路的电流IQ2一起被使用,接地阻抗上的电压上升不影响通道输出电流Iout。
如已经解释的,用于本发明的电流写入型AMOEL显示面板的数据驱动电路具有下述优点。
通过使用具有一定宽度和长度的晶体管对,提供了与晶体管的门限电压的差的平方成正比的小的偏差的电流。相应地,不同于使用与门限电压的差的平方成正比的大的偏差的电流的相关技术的情况,可以防止在相互独立且相距远的电流输出通道之间的输出电流级别的差异。
显然,对于本领域技术人员来说,在不脱离本发明的实质和范围的前提下,用于本发明的电流写入型AMOEL显示面板的数据驱动电路可以有各种修改和变化。因而,本发明意图覆盖本发明的这些修改和变化,只要它们落入所附权利要求及其同等物的范围之内。
Claims (10)
1.一种用于电流写入型有源矩阵有机电致发光显示面板的数据驱动电路,包括:
多个电流输出通道;以及
多个在各自电流输出通道上的通道电流产生电路,用于使在电流输出通道之间产生的电流级别的差最小化,每一个通道电流产生电路包括:
一对晶体管,
电流产生部分,用于产生与一对晶体管的门限电压的差的平方成正比的小偏差的电流,以及
电流镜像部分,用于对电流镜像,并将镜像的电流作为通道的通道电流发送。
2.如权利要求1的数据驱动电路,其中,一对晶体管具有相同的宽度和长度。
3.如权利要求1的数据驱动电路,其中,电流产生部分包括具有相同宽度、长度和一个公共栅极的一对第一型晶体管。
4.如权利要求3的数据驱动电路,其中,电流镜像部分包括多个电流镜像电路,每个电流镜像电路具有不同于第一型晶体管的第二型金属氧化物半导体晶体管。
5.一种用于电流写入型有源矩阵有机电致发光显示面板的数据驱动电路,包括:
多个电流输出通道;以及
多个在各个电流输出通道上的通道电流产生电路,用于使在电流输出通道之间产生的电流级别的差最小化,每个通道电流产生电路包括:
一对P型金属氧化物半导体晶体管,具有相同的宽度、长度和一个公共栅极,
第一偏压电路,与P型金属氧化物半导体晶体管对的公共栅极端相连,以防止公共栅极端的浮动,
第一N型金属氧化物半导体晶体管,用于接收来自P型金属氧化物半导体晶体管对的输出电流,
n个第二N型金属氧化物半导体晶体管,与第一N型金属氧化物半导体晶体管的栅极端相连,其中n=1,2,3......,每一个第二N型金属氧化物半导体晶体管都用于与第一N型金属氧化物半导体晶体管一起形成电流镜,用于对来自P型金属氧化物半导体晶体管对的输出电流镜像,以及
n个P型金属氧化物半导体晶体管,分别与n个第二N型金属氧化物半导体晶体管串联连接,其中,n个P型金属氧化物半导体晶体管的输出是并联连接的。
6.如权利要求5的数据驱动电路,其中,在P型金属氧化物半导体晶体管对中,第一P型金属氧化物半导体晶体管具有一个主体和与之连在一起的源极,它们又与第一外部偏压电路相连,第二P型金属氧化物半导体晶体管具有一个主体和与之连在一起的源极,它们又与正电压源相连。
7.如权利要求5的数据驱动电路,其中,偏压电路包括:
至少一个N型金属氧化物半导体晶体管,串联连接在公共栅极和地之间,
第二外部偏压,用作N型金属氧化物半导体晶体管的栅极的公共栅极电压。
8.如权利要求5的数据驱动电路,其中,n个P型金属氧化物半导体晶体管,响应作为各个门信号而被接收的外部的n个比特的数字信号,而控制流入第二N型金属氧化物半导体晶体管的电流,以便作为各个通道电流而进行发送。
9.如权利要求8的数字驱动电路,其中,各个通道电流,通过在n个P型金属氧化物半导体晶体管上接收的n-比特的数字信号的组合,被调节到具有期望的电流级别的二进制形式。
10.如权利要求5的数据驱动电路,其中,n个第二N型金属氧化物半导体晶体管具有固定的宽度和长度,使得流入n个第二N型金属氧化物半导体晶体管的电流是来自P型金属氧化物半导体晶体管对的输出电流的2α倍,其中α=0,1,2,...。
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KR100442257B1 (ko) * | 2002-01-09 | 2004-07-30 | 엘지전자 주식회사 | 전류기입형 amoel 패널의 데이터 구동회로 |
JP4146421B2 (ja) * | 2002-04-26 | 2008-09-10 | 東芝松下ディスプレイテクノロジー株式会社 | El表示装置およびel表示装置の駆動方法 |
JP3707484B2 (ja) * | 2002-11-27 | 2005-10-19 | セイコーエプソン株式会社 | 電気光学装置、電気光学装置の駆動方法および電子機器 |
-
2002
- 2002-01-09 KR KR10-2002-0001175A patent/KR100442257B1/ko active IP Right Grant
-
2003
- 2003-01-06 US US10/336,743 patent/US6982687B2/en not_active Expired - Lifetime
- 2003-01-08 EP EP03000091A patent/EP1327972B1/en not_active Expired - Lifetime
- 2003-01-08 JP JP2003001995A patent/JP4399169B2/ja not_active Expired - Lifetime
- 2003-01-09 CN CNB031054404A patent/CN1220171C/zh not_active Expired - Lifetime
-
2005
- 2005-10-14 US US11/249,353 patent/US7561125B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US7561125B2 (en) | 2009-07-14 |
US20030128202A1 (en) | 2003-07-10 |
CN1431643A (zh) | 2003-07-23 |
JP4399169B2 (ja) | 2010-01-13 |
KR100442257B1 (ko) | 2004-07-30 |
EP1327972B1 (en) | 2012-03-07 |
EP1327972A2 (en) | 2003-07-16 |
US6982687B2 (en) | 2006-01-03 |
US20060028411A1 (en) | 2006-02-09 |
KR20030060461A (ko) | 2003-07-16 |
JP2003248459A (ja) | 2003-09-05 |
EP1327972A3 (en) | 2004-07-14 |
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