CN1214525C - 振荡电路 - Google Patents
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
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- H—ELECTRICITY
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- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
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- H03K3/011—Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
- H03K3/0231—Astable circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/354—Astable circuits
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Abstract
振荡电路包括电流发生器(4),该电流发生器向可调电容阵列中的电容器(C0,C1)输入端提供电流。电容器的输入端保持一个相对恒定的电压,这样,来自电流发生器的所有电流流过电容阵列里希望的电容器,从而使寄生电容的影响最小化。
Description
技术领域
本发明涉及一种用于例如在集成电路里产生时钟信号的振荡电路。
背景技术
振荡电路通常在集成电路中使用来提供时钟信号。产生的时钟信号的频率取决于振荡电路的参数。特别地,在集成电路中,制造足够精确的振荡电路元件来提供具有期望精确度的时钟频率是不可能的。
因此,制造频率可调的振荡电路是公知的。也就是说,振荡电路制造出来后,频率可以通过例如多比特数字信号的输入信号来调整。这样,频率可以精确地产生希望的数值。
US5,859,571公开了一种频率可调振荡器,其中电流发生器提供输出电流,并产生两个门限电压。电流被切换入延迟单元,该单元包括两个电容器阵列,一个用于提供输出频率的粗调,一个用于提供细调。电容器上的电压与两个门限电压相比较,比较的结果用于设定和复位触发器,每个这样的循环所需的时间就是输出时钟信号的周期,这样,频率就取决于调节的电容值,从而可以根据需要来进行调节。
然而,如上所述,该电路需要两个电容器阵列。而且,每个电容器具有相关联的寄生电容。它是集成电路电容器的固有特性,寄生电容的值不象预定电容的值一样可以控制。因此,虽然振荡器的输出频率应当按照希望随预定调节电容值而线性变化,但是实际中这只能在有限的程度上实现。
发明内容
按照本发明的优选方式,振荡电路包括电流发生器,该电流发生器产生通过电阻器阵列可调节的电流,这样就只包括一个电容器阵列。
按照本发明的一种振荡电路,包括:产生参考电流的供电电路;电容器阵列,包括多个电容器和用于将电容器切换入和切换出所述振荡电路来控制总调节电容值的开关;和,连接到电容器阵列来接收电容器阵列两端电压作为输入的定时电路;其中,参考电流在多个电容器的各个第一结点提供给电容器阵列,以对切换入所述振荡电路的电容器充电或放电,并且定时电路产生周期取决于电容器阵列两端电压到达一个或多个门限所需时间的输出信号;进一步包括:运算放大器,它包括连接到参考电压的第一输入端,连接到电容器阵列的电容器的各个第一结点的第二输入端,以及连接在电容器阵列和定时电路之间的输出端,从而,电容器阵列环绕运算放大器形成反馈回路,并且电容器的各个第一结点保持相对恒定的电压,其中参考电流和电压门限由同一个电路供电电压提供,从而使所述供电电压中的任何变化对振荡器的输出信号的周期不产生影响。
上述振荡电路进一步包括电阻器阵列,它包括多个电阻器和将电阻器切换入和切换出所述振荡电路来控制总调节阻抗值的开关,电流源以调节阻抗值的函数产生参考电流。
上述振荡电路中,电阻器阵列提供粗调,而电容器阵列提供细调。
按照本发明,电容器的输入端保持相对恒定的电压,这样,来自电流发生器的所有电流流过电容器阵列里希望的电容器,从而使寄生电容的影响最小化。
附图说明
图1是按照本发明的振荡电路的方框图。
图2是图1电路的第一子电路组成部分的示意电路图。
图3是图1电路的第二子电路组成部分的示意电路图。
图4是图1电路的第三子电路组成部分的示意电路图。
图5是说明图1电路操作的定时图。
具体实施方式
图1示出了按照本发明方式的振荡电路。图1的振荡电路包括控制电路2,它包括电流源4。电流源4产生大小为Iset的电流,该电流可以被控制流出或流入电流源4。电流源4还产生第一和第二门限电压Vu、Vl,作为各个比较器6、8的输入。这些比较器6、8的另一输入各由大小为Vramp的电压提供。比较器6、8的输出分别连接到触发器10的设定和复位端,触发器10的输出反馈给电流源4,同时也作为输出时钟信号馈送给电路输出12。
包含电阻器阵列16的可变电阻电路14连接到电流源4,用来改变其电流输出的大小Iset。
运算放大器18通过它的非倒相输入端20连接到固定参考电压Vref,如果需要,该电压也可以由控制电路2来提供。运算放大器18的倒相输入端22连接到电流源4的输出。运算放大器18的输出端24提供放大输出电压Vramp,如上所述,该电压作为每个比较器6、8的输入提供给控制电路2。运算放大器18一般是常规的,在此不再作进一步的说明。
电容器阵列26连接在运算放大器输出端24和倒相输入端22之间,这样环绕放大器形成反馈回路。
由于运算放大器非倒相输入20的电压相对供电电压保持恒定,所以运算放大器倒相输入22的电压也保持相对恒定。
电容器阵列包括固定电容(图1中未显示)和多个电容器,它们可以通过一个多比特数字信号切换入或切换出电路。在优选实施例中具有九个这样的电容器,但是为了清楚起见,在图1中只示出了两个电容器C0,C1。每个电容器C0,C1,…具有第一端,通过各自的第一开关28.0,28.1,…连接到放大器倒相输入端22,或通过各自的第二开关30.0,30.1,…分别接地。开关由控制比特B0,B1,…控制,从而当控制比特为高时,各自的第一开关闭合,而当控制比特为低时,各自的第二开关闭合。每个电容C0,C1,…还具有连接到运算放大器输出端24的第二端。
相应地,在阵列26中的每个电容C0,C1,…具有相关联的寄生电容。特别地,如图1所示,在第一电容器端和地层之间存在寄生电容32.0,32.1…,在第二电容器端和地层之间存在寄生电容34.0,34.1,…。
图2是图1的控制电路2的示意电路图。控制电路包括向运算放大器18的非倒相输入端提供参考电压Vref的分压器202。控制电路还包括电流源204,它与可变电阻器阵列16相连,并且由反向电路输出电压控制产生电流输出Iset。第一门限电压Vu是PMOS晶体管206、208的门电压,下门限电压Vl是NMOS晶体管210、212的门电压。控制电路2还包括具有比较器和触发器的子单元214,它产生反向电路输出电压。
图3是图1的可变电阻器阵列14的示意电路图。电阻器阵列14包括四个电阻器302、304、306、308,以及四个CMOS开关310、312、314、316,这些都是公知的类型。开关在与电流源4连接的端口318、320之间与第五电阻器322串联。开关310、312、314、316分别由二进制信号D0、D1、D2、D3控制。当各个二进制值为低时,开关闭合,当各个二进制值为高时,开关开启而相应的电阻器切换入电路。
在优选实施例中,电阻器302具有21kΩ的值,电阻器304具有2×21=42kΩ的值,电阻器306具有4×21=84kΩ的值,电阻器308具有8×21=168kΩ的值,电阻器322具有15×21=315kΩ的值。电阻器可以方便地由多个符合21kΩ值的电阻组成。这样,通过由控制比特D0-3将电阻器302、304、306、308切换入或切换出电路,电阻器阵列14的阻抗值可以在开关全部闭合时的315kΩ和开关全部开启时的630kΩ之间变化。
图4是图1的可变电容器阵列26的示意电路图。电容器阵列26包括九个电容器501,…,509,每个在运算放大器18的反馈回路的端口519、520之间与各个开关510,…,518连接。另外还有与九个电容器501,…,509并联连接的电容器521。每个开关510,…,518都是图1所示的类型,并且由各个二进制数字B0,…,B8控制。当各个二进制值为低时,相应的电容器就切换入电路,当相应的二进制值为高时,开关就打开并且相应的电容器切换出电路。
在优选实施例中,电容器510具有0.152pF的值,电容器511具有2×0.152pF的值,电容器512具有4×0.152pF的值,电容器513具有8×0.152pF的值,电容器514具有16×0.152pF的值,电容器515具有32×0.152pF的值,电容器516具有64×0.152pF的值,电容器517具有128×0.152pF的值,电容器518具有256×0.152pF的值,而电容器521具有305.5pF的值。这些电容器可以方便地由多个符合0.152pF,或8×0.152pF,或64×0.152pF值的电容组成。
这样,通过由控制比特B0-8将电容器510,…,518切换入或切换出电路,电容器阵列26的电容值可以在所有二进制值B0-B9为高而相应的电容器全部切换出电路时的305.5pF,和在所有的二进制值为低而相应的电容器全部切换入电路时的305.5pF+511×0.152pF之间变化。集成电路电容器可以具有很好的匹配,使得在二进制字B0-B9的值和调节的电容值之间存在高度的线性关系。
这样,在图1-4的电路运行中,电流源4产生电流Iset,它是正供电电压的函数,并且与电阻器阵列16的粗调阻抗值成反比。电流源4可以作为电源或换能器,而电流的方向取决于反馈给电流源的输出端12的信号Vo的符号。当该信号为高时,电流从电容器阵列26流入电流源4,如图1中箭头所示。当该信号为低时,电流从电流源4流入电容器阵列26。
流经电容器阵列26的电流Iset使得运算放大器18的输出电压Vramp线性增加或减少。
这样,如图5所示,当Vo为低时,Vramp下降直至下门限Vl,此时,比较器8向触发器10的复位输入发送一个脉冲。然后输出Vo升高,Vramp开始上升。Vramp一直上升直至达到上门限Vu,此时,比较器6向触发器10的设定输入发送一个脉冲。这样,电路产生振荡输出Vo,如图6所示。
如上所述,门限电压Vl、Vu由电流源4设定,它们同电流Iset一样受供电电压变化的影响。
振荡频率Fosc是一个循环周期的倒数。一个循环周期是运算放大器输出电压Vramp从Vl升到Vu,或从Vu降到Vl的时间Δt的两倍。因此,如果(Vu-Vl)=ΔV,并且阵列26的总选择电容是Ct,那么:
典型地,上下门限Vu、Vl和电流Iset可以通过例如下面的方程式与供电电压Vdd和电阻器阵列的阻抗Rset建立关系:
Vu=Vdd-Vx1
Vl=Vx2
Iset=(Vdd-Vx1-Vx2)/Rset
其中Vx1和Vx2是未知电压。
这样就得出:
因此,振荡频率由阻抗和电容的调节值控制,而不受供电电压Vdd中的波动影响。
如前所述,电容器C0-C8具有与之关联的寄生电容。然而,本发明的电路把其造成的任何问题最小化。特别地,参照图1,运算放大器18具有高增益,并且非倒相输入端保持在恒定电压。这样,运算放大器将它的两个输入端的电压保持在同一电平上,而倒相输入端的电压基本保持恒定。结果,寄生电容32.0,32.1等两端的电压基本保持恒定,所有的电流Iset流经相应的电容器C0,C1等,而不是流经寄生电容。而当电流流经寄生电容34.0,34.1等时,它是来自运算放大器18,而不是来自电流Iset。
结果,振荡器频率Fosc与预定电容Ct的总值之间具有精确而线性的关系。
这样就说明了可被用于集成电路并产生可精确控制的输出频率的振荡电路。
Claims (3)
1.一种振荡电路,包括:
产生参考电流的供电电路;
电容器阵列,包括多个电容器和用于将电容器切换入和切换出所述振荡电路来控制总调节电容值的开关;和
连接到电容器阵列来接收电容器阵列两端电压作为输入的定时电路;
其中,参考电流在多个电容器的各个第一结点提供给电容器阵列,以对切换入所述振荡电路的电容器充电或放电,并且定时电路产生周期取决于电容器阵列两端电压到达一个或多个门限所需时间的输出信号;
进一步包括:
运算放大器,它包括连接到参考电压的第一输入端,连接到电容器阵列的电容器的各个第一结点的第二输入端,以及连接在电容器阵列和定时电路之间的输出端,从而,电容器阵列环绕运算放大器形成反馈回路,并且电容器的各个第一结点保持相对恒定的电压,
其中参考电流和电压门限由同一个电路供电电压提供,从而使所述供电电压中的任何变化对振荡器的输出信号的周期不产生影响。
2.如权利要求1所述的振荡电路,其特征在于,进一步包括电阻器阵列,它包括多个电阻器和将电阻器切换入和切换出所述振荡电路来控制总调节阻抗值的开关,电流源以调节阻抗值的函数产生参考电流。
3.如权利要求2所述的振荡电路,其特征在于,所述电阻器阵列提供粗调,而电容器阵列提供细调。
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Application Number | Priority Date | Filing Date | Title |
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GB9915421A GB2351619A (en) | 1999-07-01 | 1999-07-01 | A frequency trimmable oscillator with insensitivity to power supply variations and parasitic capacitance |
GB9915421.3 | 1999-07-01 |
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CN1359559A CN1359559A (zh) | 2002-07-17 |
CN1214525C true CN1214525C (zh) | 2005-08-10 |
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US (1) | US6326859B1 (zh) |
EP (1) | EP1196993B1 (zh) |
JP (1) | JP2003504910A (zh) |
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CN (1) | CN1214525C (zh) |
AT (1) | ATE343248T1 (zh) |
AU (1) | AU5683700A (zh) |
CA (1) | CA2377969A1 (zh) |
DE (1) | DE60031408D1 (zh) |
GB (1) | GB2351619A (zh) |
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-
1999
- 1999-07-01 GB GB9915421A patent/GB2351619A/en not_active Withdrawn
- 1999-09-10 TW TW088115647A patent/TW478253B/zh not_active IP Right Cessation
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2000
- 2000-06-19 CN CNB008098794A patent/CN1214525C/zh not_active Expired - Fee Related
- 2000-06-19 AU AU56837/00A patent/AU5683700A/en not_active Abandoned
- 2000-06-19 AT AT00942099T patent/ATE343248T1/de not_active IP Right Cessation
- 2000-06-19 CA CA002377969A patent/CA2377969A1/en not_active Abandoned
- 2000-06-19 EP EP00942099A patent/EP1196993B1/en not_active Expired - Lifetime
- 2000-06-19 WO PCT/EP2000/005635 patent/WO2001003298A1/en active IP Right Grant
- 2000-06-19 JP JP2001508596A patent/JP2003504910A/ja not_active Withdrawn
- 2000-06-19 DE DE60031408T patent/DE60031408D1/de not_active Expired - Lifetime
- 2000-06-19 KR KR1020017016649A patent/KR20020019110A/ko not_active Application Discontinuation
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ATE343248T1 (de) | 2006-11-15 |
TW478253B (en) | 2002-03-01 |
AU5683700A (en) | 2001-01-22 |
KR20020019110A (ko) | 2002-03-09 |
JP2003504910A (ja) | 2003-02-04 |
WO2001003298A1 (en) | 2001-01-11 |
EP1196993B1 (en) | 2006-10-18 |
DE60031408D1 (de) | 2006-11-30 |
GB9915421D0 (en) | 1999-09-01 |
EP1196993A1 (en) | 2002-04-17 |
US6326859B1 (en) | 2001-12-04 |
CA2377969A1 (en) | 2001-01-11 |
CN1359559A (zh) | 2002-07-17 |
GB2351619A (en) | 2001-01-03 |
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