CN1214446C - 用于提高光刻胶附着的无定形碳层 - Google Patents

用于提高光刻胶附着的无定形碳层 Download PDF

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CN1214446C
CN1214446C CNB018182488A CN01818248A CN1214446C CN 1214446 C CN1214446 C CN 1214446C CN B018182488 A CNB018182488 A CN B018182488A CN 01818248 A CN01818248 A CN 01818248A CN 1214446 C CN1214446 C CN 1214446C
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戴维·P·曼西尼
史蒂文·M·史密斯
道格拉斯·J·雷斯尼克
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Abstract

一种改进的新型半导体器件(10)，包括无定形碳层(14)，用于提高光刻胶的附着；以及制造方法。该器件包括具有表面(13)的衬底(12)、形成在衬底表面上的碳层(14)，以及形成在碳层表面上的抗蚀剂层(16)。器件如下形成：提供具有表面的衬底，利用等离子增强化学气相沉积(PECVD)或溅射在衬底表面上沉积碳层，以及在碳层表面上形成抗蚀剂层。

Description

用于提高光刻胶附着的无定形碳层
技术领域
本发明涉及半导体工艺技术，尤其涉及包括具有改善附着质量的光刻胶层的半导体器件以及用于在衬底材料上制造包括光刻胶附着增强的器件的方法。
背景技术
使用现有方法，光刻胶在衬底——尤其是InGaAs和InAlAs衬底上的附着非常差。结果就是光刻工艺质量的下降。已有一些尝试想要改善光刻胶材料在各种衬底材料——例如InGaAs和InAlAs表面的附着。由于使用了许多表面预处理方法，这些传统的程序无法实现完成所有必须工艺步骤所需的附着持久性。特别地，已观察到光刻胶层在显影步骤过程中或在浸入清洗溶液——例如氢氧化铵(NH4OH)溶液(10％水溶液)——中的过程中会从晶片表面剥落。该NH4OH溶液通常用来在后续工艺步骤——例如沉积和金属化——之前清洁晶片表面。
最近已对表面预处理方法进行了一些尝试，努力想提高抗蚀剂附着。这些方法包括，脱水烘烤、用作薄膜夹层的i-线和DUV抗反涂层的使用、标准HMDS气相处理(vapor priming)，以及某些硅烷基有机偶联剂。然而，这些处理方法都没有充分改善附着。
现有工业标准是用六甲基二硅胺烷(HMDS)气相处理晶片表面。HMDS用作预备抗蚀剂涂敷所用的硅晶片。然而，HMDS只与硅化学相容，不与其它材料发生相同的反应。在硅表面上，HMDS从气相中提供疏水或其它水溶液——例如显影剂或NH4OH——的有机单层。衬底/抗蚀剂界面处薄膜的疏水特性防止了抗蚀剂膜在随后的含水工艺——例如显影或清洗——中起皱。众所周知，水在表面的接触角是该表面疏水性的一个很好的量度。水滴在用HMDS适当处理的硅表面上的接触角通常在65-72°之间。还发现了，传统的气相处理只能维持三天，之后就必须重新处理晶片。另外，在气相处理过程中，通常将晶片加热倒150℃并保持30分钟。这对于某些对温度敏感的应用来说是不能采用的。
如前所述，存在其它方法来提高光刻胶在晶片上的附着。其中一种经常用于调整对气相处理不敏感的表面的方法就是使用化学气相沉积(CVD)工艺在表面上给出一薄层(＜500埃)第二材料——例如氮化硅(SiN)或氧化硅(SiO)。当与传统HMDS气相处理结合时，该材料的沉积提供了抗蚀层在晶片表面的良好附着。然而，这样的涂层必须在后面除去，这又带来了另外的问题。例如，已经发现，SiN材料的去除——通常是通过干法刻蚀技术来进行——有很强的侵蚀性，可导致易碎的晶片外延层的损坏。
发明内容
因此，本发明的一个目的是给出一种半导体器件，它包括促进光刻胶在晶片表面的改善附着的表面预处理。
本发明的另一目的是给出一种半导体器件，它包括促进光刻胶在晶片表面的附着的界面材料。
本发明进一步的目的是给出一种半导体器件，它包括改善的光刻胶附着，其中随后的抗蚀剂和界面层的去除不会损坏下层材料表面。
本发明的又一目的是给出一种制造半导体器件的方法，包括给出促进光刻胶在晶片表面的改善附着的表面预处理的步骤。
本发明的再一目的是给出一种制造半导体器件的方法，包括给出促进光刻胶材料在晶片表面的改善附着的界面材料的步骤。
通过半导体器件以及制造包括衬底、光刻胶堆叠和沉积在衬底和光刻胶堆叠之间的碳层的半导体器件的方法的给出，基本满足了这些和其它的需要。制造半导体器件的方法包括下列步骤：提供具有一个表面的衬底，在衬底的表面上沉积碳层，在碳层的表面上形成抗蚀剂堆叠。利用标准的等离子增强化学气相沉积技术(PECVD)或溅射来形成碳层。
具体地说，本发明提供一种半导体器件，包含：衬底，具有一个上表面；碳单层，形成在衬底的上表面上；以及抗蚀剂堆叠，形成在碳单层的上表面上。
根据本发明的上述半导体器件，其中衬底由III-V族材料形成。
根据本发明的上述半导体器件，其中衬底由InGaAs形成。
根据本发明的上述半导体器件，其中衬底由InAlAs形成。
根据本发明的上述半导体器件，其中衬底由GaAs形成。
根据本发明的上述半导体器件，其中衬底由金属形成。
根据本发明的上述半导体器件，其中衬底由含硅材料形成。
根据本发明的上述半导体器件，其中碳单层由类聚合物碳形成。
根据本发明的上述半导体器件，其中碳单层为无定形的。
根据本发明的上述半导体器件，其中碳单层由类金刚石碳形成。
根据本发明的上述半导体器件，其中所述衬底包含III-V族材料；并且所述碳层使用等离子增强化学气相沉积形成。
本发明还提供形成包括增强的光刻胶附着的半导体器件的方法，包括下列步骤：提供具有一个表面的衬底；在衬底的表面上沉积碳层；以及在碳层表面上形成抗蚀剂堆叠。
附图说明
从下面结合附图对优选实施方案的详细描述中，熟练的技术人员将可明显看出本发明前述的和其它的以及更特定的目的和优点，其中：
图1-4示出根据本发明制造半导体器件的步骤的剖面图，该半导体器件包括用于提高光刻胶附着的无定形碳层。
具体实施方式
在描述过程中，类似的数字用来标示依照说明本发明的不同附图的类似要素。因此，图1在简化剖面图中示出根据本发明制造半导体器件的方法中的第一步骤。图1中示出的半导体器件——通常标为10——包括提供衬底12，作为第一步骤。在该特定实施方案中，衬底12描述为由任何III-V材料形成。更特定地，衬底12描述为由InGaAs材料形成。应当理解，该公开所预期的是InAlAs材料、GaAs材料或与——包括但不局限于——硅、含硅材料和某些金属在光刻胶附着上有困难的任何其它材料的衬底12的制造。
在衬底12的上表面13上沉积了碳层14。碳层14由利用典型的半导体沉积技术在衬底12的表面13上沉积的碳材料而形成。更特定地，利用等离子增强化学气相沉积(PECVD)或溅射在衬底12的表面13上沉积碳层14。应当理解，当利用等离子增强化学气相沉积(PECVD)技术沉积时，碳层14是氮掺杂的。碳层14给出了衬底12和光刻胶(一会儿讨论)之间增强的附着。
碳层14由一薄层无定形碳形成。在该优选实施方案中的碳层14利用工业上众所周知的标准PECVD技术或溅射来沉积，厚度小于100埃，优选地厚度为30-70埃。碳层14的沉积导致了随后沉积的光刻胶在衬底12——更特定地，在该特定实施方案中，InGaAs外延涂敷(epi coated)晶片——上附着持久性的提高。
现在参看图2和3，下一步用有机光刻胶堆叠16涂敷晶片堆叠——总体标为15。光刻胶堆叠16可由一层或多层可感光有机光刻胶层组成，包括那些光敏材料或对电子束敏感的材料。如图2所示，有机光刻胶堆叠16形成为标准的单层抗蚀剂，包括光刻胶层18。如图3所示，在替代实施方案中，有机光刻胶堆叠16形成为多层抗蚀剂，例如标准的双层抗蚀剂，包括光刻胶层18和20。应当理解，无论是形成为单层抗蚀剂堆叠，还是多层抗蚀剂堆叠，抗蚀剂堆叠16都可包括正胶抗蚀剂或负胶抗蚀剂，这取决于想要的图形。
如图4所示，利用标准的光刻方法——例如电子束或光学方法等——显影并构图晶片堆叠15，更特定地，抗蚀剂堆叠16。如图所示，在显影工艺过程中，堆叠16的区域20被去除，从而形成图形。
下一步，在氧等离子体中将完全显影的晶片堆叠15刻蚀大约一分钟，以除去构图步骤中碳14被曝光的部分，用于随后的金属化步骤。然后将堆叠15在10％的NH4OH溶液浸泡一段时间，通常为1至5分钟。堆叠15在NH4OH溶液中的浸泡在金属化之前清洁了曝光表面。测量附着强度和持久性的标准是在室温下在10％氢氧化铵(NH4OH)水溶液中浸泡十分钟。在这个浸泡时间内，不应发生即使是最小的——通常为亚微米——部分的剥离或削低。
通常，在大约15秒内沉积碳层14，用低/零偏压氧等离子体就可容易地去除。更特定地，在构图之后，以及后继工艺之前，马上清除已构图堆叠15的浮渣。在后继的所需工艺之后，除去抗蚀剂层16和碳层14。去除步骤可由包括湿法化学分解或氧等离子体灰化的技术来完成。然后，将像此处所公开的那样利用碳层以及单层或双层抗蚀剂堆叠来构图的晶片的样品显影1分钟并在10％氢氧化铵溶液中浸泡10分钟。利用扫描电子显微镜(SEM)对已构图抗蚀剂的检验显示，抗蚀剂没有剥离，其外形也没有显出任何分层或削低的迹象。结果，可以断定，碳层14的引入使得衬底12的表面很适合于光刻胶16的附着。
本公开预期，碳层14由无定形碳形成，沉积在衬底12的表面13上，厚度小于100埃。如前在优选实施方案中所述，碳层14厚度在30-70埃之间。公开了两类适合于制造碳层14的无定形碳。更特定地，公开了用作碳层14的类聚合物碳材料和类金刚石碳(DLC)材料。在优选实施方案中，类聚合物碳材料描述为～60％聚合的，具有低密度值～0.9g/cc，硬度值～2.0GPa，以及n～1.7和k～0.02的光学常数数据。类金刚石碳材料描述为～35聚合的，具有较高密度值～1.4g/cc，硬度值～8.0GPa，以及n～1.9和k～0.20的光学常数数据。碳层14改变了衬底12的表面能，从而使其与光刻胶堆叠16有更大的相容性，同时又能疏水或含水混合物，由此增强了光刻胶堆叠16在衬底12的表面13上的附着。
这样，公开了用以提高光刻胶附着的碳层及制造方法。碳层的引入增强了抗蚀剂层在晶片表面的附着。这一附着特性的增强改进了半导体器件的制造，包括获得了抗蚀剂层去除的简易性。

Claims (12)

1.半导体器件，包含：
衬底，具有一个上表面；
碳单层，形成在衬底的上表面上；以及
抗蚀剂堆叠，形成在碳单层的上表面上。
2.根据权利要求1的半导体器件，其中衬底由III-V族材料形成。
3.根据权利要求2的半导体器件，其中衬底由InGaAs形成。
4.根据权利要求2的半导体器件，其中衬底由InAlAs形成。
5.根据权利要求2的半导体器件，其中衬底由GaAs形成。
6.根据权利要求1的半导体器件，其中衬底由金属形成。
7.根据权利要求1的半导体器件，其中衬底由含硅材料形成。
8.根据权利要求1的半导体器件，其中碳单层由类聚合物碳形成。
9.根据权利要求1的半导体器件，其中碳单层为无定形的。
10.根据权利要求1的半导体器件，其中碳单层由类金刚石碳形成。
11.根据权利要求1的半导体器件，其中
所述衬底包含III-V族材料；并且
所述碳层使用等离子增强化学气相沉积形成。
12.形成包括增强的光刻胶附着的半导体器件的方法，包括下列步骤：
提供具有一个表面的衬底；
在衬底的表面上沉积碳层；以及
在碳层表面上形成抗蚀剂堆叠。
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Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6287990B1 (en) 1998-02-11 2001-09-11 Applied Materials, Inc. CVD plasma assisted low dielectric constant films
US6054379A (en) 1998-02-11 2000-04-25 Applied Materials, Inc. Method of depositing a low k dielectric with organo silane
US6593247B1 (en) 1998-02-11 2003-07-15 Applied Materials, Inc. Method of depositing low k films using an oxidizing plasma
US6660656B2 (en) 1998-02-11 2003-12-09 Applied Materials Inc. Plasma processes for depositing low dielectric constant films
US6303523B2 (en) 1998-02-11 2001-10-16 Applied Materials, Inc. Plasma processes for depositing low dielectric constant films
US6573030B1 (en) * 2000-02-17 2003-06-03 Applied Materials, Inc. Method for depositing an amorphous carbon layer
US6531398B1 (en) 2000-10-30 2003-03-11 Applied Materials, Inc. Method of depositing organosillicate layers
US6368924B1 (en) * 2000-10-31 2002-04-09 Motorola, Inc. Amorphous carbon layer for improved adhesion of photoresist and method of fabrication
US20030206337A1 (en) * 2002-05-06 2003-11-06 Eastman Kodak Company Exposure apparatus for irradiating a sensitized substrate
US7105460B2 (en) * 2002-07-11 2006-09-12 Applied Materials Nitrogen-free dielectric anti-reflective coating and hardmask
US6927178B2 (en) * 2002-07-11 2005-08-09 Applied Materials, Inc. Nitrogen-free dielectric anti-reflective coating and hardmask
US6867786B2 (en) * 2002-07-29 2005-03-15 Microsoft Corp. In-situ digital inking for applications
US6673684B1 (en) 2002-07-31 2004-01-06 Advanced Micro Devices, Inc. Use of diamond as a hard mask material
US6884733B1 (en) 2002-08-08 2005-04-26 Advanced Micro Devices, Inc. Use of amorphous carbon hard mask for gate patterning to eliminate requirement of poly re-oxidation
US6989332B1 (en) 2002-08-13 2006-01-24 Advanced Micro Devices, Inc. Ion implantation to modulate amorphous carbon stress
US7110028B1 (en) * 2002-08-13 2006-09-19 Foveon, Inc. Electronic shutter using buried layers and active pixel sensor and array employing same
US6875664B1 (en) 2002-08-29 2005-04-05 Advanced Micro Devices, Inc. Formation of amorphous carbon ARC stack having graded transition between amorphous carbon and ARC material
US7521304B1 (en) 2002-08-29 2009-04-21 Advanced Micro Devices, Inc. Method for forming integrated circuit
US7084071B1 (en) 2002-09-16 2006-08-01 Advanced Micro Devices, Inc. Use of multilayer amorphous carbon ARC stack to eliminate line warpage phenomenon
US7148079B1 (en) * 2002-11-01 2006-12-12 Advanced Micro Devices, Inc. Diamond like carbon silicon on insulator substrates and methods of fabrication thereof
US6653202B1 (en) 2003-01-17 2003-11-25 Advanced Micro Devices, Inc. Method of shallow trench isolation (STI) formation using amorphous carbon
US6913868B2 (en) * 2003-01-21 2005-07-05 Applied Materials, Inc. Conductive bi-layer e-beam resist with amorphous carbon
US6825114B1 (en) 2003-04-28 2004-11-30 Advanced Micro Devices, Inc. Selective stress-inducing implant and resulting pattern distortion in amorphous carbon patterning
US7015124B1 (en) 2003-04-28 2006-03-21 Advanced Micro Devices, Inc. Use of amorphous carbon for gate patterning
US6773998B1 (en) 2003-05-20 2004-08-10 Advanced Micro Devices, Inc. Modified film stack and patterning strategy for stress compensation and prevention of pattern distortion in amorphous carbon gate patterning
TW200503066A (en) * 2003-07-07 2005-01-16 Macronix Int Co Ltd Process for reworking semiconductor patterned photoresist layer
US20080156346A1 (en) * 2006-12-28 2008-07-03 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus for cleaning a substrate
US20080254233A1 (en) * 2007-04-10 2008-10-16 Kwangduk Douglas Lee Plasma-induced charge damage control for plasma enhanced chemical vapor deposition processes
US7851138B2 (en) 2007-07-19 2010-12-14 Hitachi Global Storage Technologies, Netherlands, B.V. Patterning a surface comprising silicon and carbon
US20090197086A1 (en) * 2008-02-04 2009-08-06 Sudha Rathi Elimination of photoresist material collapse and poisoning in 45-nm feature size using dry or immersion lithography
WO2010096646A2 (en) * 2009-02-20 2010-08-26 University Of Florida Research Foundation, Inc. Graphene processing for device and sensor applications
CN102543846B (zh) * 2011-08-15 2014-04-02 上海华力微电子有限公司 一种增强铝制程金属层与光阻附着力的表面处理方法
US10410928B2 (en) * 2017-11-28 2019-09-10 International Business Machines Corporation Homogeneous densification of fill layers for controlled reveal of vertical fins
JP2022507368A (ja) 2018-11-14 2022-01-18 ラム リサーチ コーポレーション 次世代リソグラフィにおいて有用なハードマスクを作製する方法
KR102431292B1 (ko) 2020-01-15 2022-08-09 램 리써치 코포레이션 포토레지스트 부착 및 선량 감소를 위한 하부층
WO2022010809A1 (en) * 2020-07-07 2022-01-13 Lam Research Corporation Integrated dry processes for patterning radiation photoresist patterning

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0258221A (ja) * 1988-08-23 1990-02-27 Semiconductor Energy Lab Co Ltd 炭素または炭素を主成分とするマスクを用いたエッチング方法
JPH0496273A (ja) * 1990-08-03 1992-03-27 Sharp Corp 半導体装置の製造方法
KR950011563B1 (ko) * 1990-11-27 1995-10-06 가부시끼가이샤 도시바 반도체장치의 제조방법
EP0531232A3 (en) * 1991-08-26 1993-04-21 Eastman Kodak Company High durability mask for use in selective area, epitaxial regrowth of gaas
US5470661A (en) * 1993-01-07 1995-11-28 International Business Machines Corporation Diamond-like carbon films from a hydrocarbon helium plasma
US5559367A (en) * 1994-07-12 1996-09-24 International Business Machines Corporation Diamond-like carbon for use in VLSI and ULSI interconnect systems
JPH08102014A (ja) * 1994-09-30 1996-04-16 Hitachi Ltd 薄膜磁気ヘッドの磁気コア形成方法
TW366367B (en) * 1995-01-26 1999-08-11 Ibm Sputter deposition of hydrogenated amorphous carbon film
JP2737720B2 (ja) * 1995-10-12 1998-04-08 日本電気株式会社 薄膜形成方法及び装置
US6083781A (en) * 1995-12-20 2000-07-04 The United States Of America As Represented By The United States Department Of Energy Method for manufacturing compound semiconductor field-effect transistors with improved DC and high frequency performance
JP2956571B2 (ja) * 1996-03-07 1999-10-04 日本電気株式会社 半導体装置
JPH10326837A (ja) * 1997-03-25 1998-12-08 Toshiba Corp 半導体集積回路装置の製造方法、半導体集積回路装置、半導体装置、及び、半導体装置の製造方法
US6331481B1 (en) * 1999-01-04 2001-12-18 International Business Machines Corporation Damascene etchback for low ε dielectric
US6368924B1 (en) * 2000-10-31 2002-04-09 Motorola, Inc. Amorphous carbon layer for improved adhesion of photoresist and method of fabrication

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