CN1206811C - 数据编码方法、数据编码设备 - Google Patents
数据编码方法、数据编码设备 Download PDFInfo
- Publication number
- CN1206811C CN1206811C CN02106433.4A CN02106433A CN1206811C CN 1206811 C CN1206811 C CN 1206811C CN 02106433 A CN02106433 A CN 02106433A CN 1206811 C CN1206811 C CN 1206811C
- Authority
- CN
- China
- Prior art keywords
- bit
- word
- data
- code
- conversion table
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/04—Conversion to or from representation by pulses the pulses having two levels
- H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
- H03M5/145—Conversion to or from block codes or representations thereof
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
- G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP055529/2001 | 2001-02-28 | ||
| JP2001055529A JP2002261619A (ja) | 2001-02-28 | 2001-02-28 | データ符号化方法、データ符号化装置及び記憶媒体 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1373559A CN1373559A (zh) | 2002-10-09 |
| CN1206811C true CN1206811C (zh) | 2005-06-15 |
Family
ID=18915703
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN02106433.4A Expired - Fee Related CN1206811C (zh) | 2001-02-28 | 2002-02-28 | 数据编码方法、数据编码设备 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6559779B2 (enExample) |
| JP (1) | JP2002261619A (enExample) |
| CN (1) | CN1206811C (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004213767A (ja) * | 2002-12-27 | 2004-07-29 | Toshiba Corp | データ変換装置及びデータ変換方法 |
| JP3769753B2 (ja) * | 2003-03-24 | 2006-04-26 | ソニー株式会社 | 符号化装置および符号化方法、記録媒体、並びにプログラム |
| WO2005020440A1 (en) * | 2003-08-13 | 2005-03-03 | Seagate Technology Llc | Dc-free code design with increased distance between code words |
| JP4123109B2 (ja) * | 2003-08-29 | 2008-07-23 | 日本ビクター株式会社 | 変調装置及び変調方法並びに復調装置及び復調方法 |
| US7064684B2 (en) * | 2004-06-01 | 2006-06-20 | Peter Lablans | Sequence detection by multi-valued coding and creation of multi-code sequences |
| US7002492B2 (en) * | 2004-07-07 | 2006-02-21 | Seagate Technology Llc | High rate running digital sum-restricted code |
| US7142135B1 (en) * | 2005-09-06 | 2006-11-28 | Media Tek Inc. | Modulation methods and systems |
| US7423561B2 (en) * | 2005-09-06 | 2008-09-09 | Mediateck Inc. | Modulation methods and systems |
| US20090103727A1 (en) * | 2007-10-17 | 2009-04-23 | Heywood Gareth M | Sync-bit Insertion for Timing Reference Signals to Prevent Long Runs of Static Data in Serial Digital Interfaces |
| US7777652B2 (en) * | 2008-10-29 | 2010-08-17 | Silicon Image, Inc. | Coding system for memory systems employing high-speed serial links |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4337458A (en) | 1980-02-19 | 1982-06-29 | Sperry Corporation | Data encoding method and system employing two-thirds code rate with full word look-ahead |
| US4833470A (en) * | 1986-07-15 | 1989-05-23 | Matsushita Electric Industrial Co., Ltd. | Code conversion apparatus |
| JPH08287622A (ja) * | 1995-04-12 | 1996-11-01 | Toshiba Corp | データ復号装置及び方法と記録媒体 |
| JP2000105981A (ja) * | 1998-09-29 | 2000-04-11 | Toshiba Corp | データ変換方法および装置 |
-
2001
- 2001-02-28 JP JP2001055529A patent/JP2002261619A/ja active Pending
-
2002
- 2002-02-28 CN CN02106433.4A patent/CN1206811C/zh not_active Expired - Fee Related
- 2002-02-28 US US10/084,052 patent/US6559779B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US6559779B2 (en) | 2003-05-06 |
| US20020118125A1 (en) | 2002-08-29 |
| JP2002261619A (ja) | 2002-09-13 |
| CN1373559A (zh) | 2002-10-09 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20050615 Termination date: 20120228 |