CN118210529A

CN118210529A - Upgrading device, upgrading and starting loading method for board card firmware of optimizing machine frame type equipment

Info

Publication number: CN118210529A
Application number: CN202410613653.0A
Authority: CN
Inventors: 徐川; 杨康; 张连举
Original assignee: Chengdu Lingmu Technology Co ltd
Current assignee: Chengdu Lingmu Technology Co ltd
Priority date: 2024-05-17
Filing date: 2024-05-17
Publication date: 2024-06-18

Abstract

The invention discloses an upgrading device and an upgrading and starting loading method for board card firmware of an optimizing machine frame type device, wherein the board card comprises a plurality of board cards to be upgraded and a public board card; the upper computer is only connected with the public board card; the DSP component of the public board card comprises a reset module, an SPI Boot module, a public FLASH and an upgrading module, the programmable logic component comprises a reset control module and a SPI SWITCHER module, and the public FLASH and the upgrading module are respectively connected with the SPI SWITCHER module; SPI Boot modules of all boards are respectively connected to SPI SWITCHER modules through SPI buses, and reset control modules of all boards are respectively connected with SPI SWITCHER modules in a communication mode. All the boards share one Flash, and the solidifying program on the same Flash is multiplexed in a time-sharing way, so that the hardware cost is saved, and the upgrading efficiency is improved.

Description

Upgrading device, upgrading and starting loading method for board card firmware of optimizing machine frame type equipment

Technical Field

The invention relates to the technical field of data signal processing, in particular to an upgrading device, an upgrading and starting loading method for board card firmware of an optimizing machine frame type device.

Background

A frame type device generally refers to a large device structure of modular design used in the fields of communication, IT hardware, data centers, etc. The device consists of a basic frame (also called a chassis or chassis) and a plurality of slots (slots), and a single board card (such as a processing board, an interface board, a power board and the like) with different functions can be inserted into each slot. By flexibly configuring different single board cards, the machine frame type equipment can meet the requirements of different scales and functions, such as a switch, a router, a server, a storage device and the like;

Currently, in a common frame-type device, each board card (specifically referred to herein as a board card using a DSP as a core processor, where the DSP and Flash are connected through an SPI interface) is generally equipped with a Flash for storing a system Image (Image). When upgrading, independent upgrading operation is required to be carried out on each board card, namely, image is distributed to each board card and written into corresponding Flash.

There are two types of current board upgrade schemes: serial and parallel. The serial upgrade can sequentially upgrade the board cards to be upgraded according to the board card numbers (or other sequences); and when the board card is upgraded in parallel, a plurality of tasks are directly created, and all board cards needing to be upgraded are upgraded in parallel.

The parallel upgrade can improve upgrade efficiency to a certain extent compared with serial upgrade, but it is unavoidable that individual boards fail to upgrade, so that it is also necessary to calibrate and re-upgrade the failed boards according to upgrade results. Particularly, under the condition that the same Image is used for all the boards, as each board has respective Flash, the upgrade needs to distribute the Image for each board and write the respective Flash, which is troublesome in operation and long in time consumption (especially serial upgrade); and each board card needs to be provided with independent Flash, so that the hardware cost is high.

Disclosure of Invention

The invention aims to provide an upgrading device, an upgrading and starting loading method for board card firmware of an optimizing machine frame type device, wherein a board card with one slot position is selected from all board cards to serve as a public board card, a common Flash is allocated in the public board card, and other board cards cancel the corresponding Flash. Through SPI SWITCHER modules of the public boards, SPIs of all boards are converged together and connected to a common Flash, the SPI buses of all boards can be used for multiplexing the same Flash in a time-sharing manner, a plurality of boards can respectively and independently access the same Flash through the SPI, and therefore all boards in equipment can be upgraded only once when upgrading is achieved, flash resources are saved, and hardware cost is reduced.

In order to achieve the above object, the present application provides the following solutions:

in one aspect, the application provides a device for optimizing upgrading of board card firmware of a frame type device, which comprises an upper computer and a frame comprising a plurality of board card slots for placing board cards, wherein the board cards comprise a plurality of board cards to be upgraded and a common board card; the upper computer is only connected with the public board card;

All the boards comprise a DSP component and a programmable logic component, wherein the DSP component comprises a reset module and an SPI Boot module, and the programmable logic component comprises a reset control module; the reset module is respectively in communication connection with the reset control module and the SPI Boot module;

The DSP component of the public board card also comprises a public FLASH and an upgrading module which is in communication connection with the upper computer;

The programmable logic assembly of the public board card also comprises SPI SWITCHER modules, and the public FLASH and the upgrading module are respectively connected with SPI SWITCHER modules; wherein,

SPI Boot modules of all boards are respectively connected to SPI SWITCHER modules through SPI buses, and reset control modules of all boards are respectively connected with SPI SWITCHER modules in a communication mode.

In some alternative embodiments, the programmable logic assembly of the common board further includes a first register for recording SPI SWITCHER the current working mode of the module and a second register for recording SPI SWITCHER the number of the board that the module currently needs to switch.

In some specific embodiments, the upper computer is configured to obtain a slot number of a public board card in the current machine frame device, establish a communication connection with a DSP component of the public board card, send Sysupdate signals to the public board card, and send an Image file to the DSP component of the public board card;

the upgrade module is used for responding to Sysupdate signals of the upper computer, receiving an Image file issued by the upper computer, generating a Write instruction, sending the Write instruction to the SPI SWITCHER module, and writing the Image file into the public FLASH through the SPI bus according to the SPI SWITCHER module;

SPI SWITCHER, responding to the Write instruction of the upgrade module, inquiring the working mode recorded by the first register, and if the current working mode is the upgrade mode, switching the access right of the public FLASH to the upgrade module;

The public FLASH is used for storing Image files of all the boards.

In some specific embodiments, the Reset control module is configured to send a Reset/Reset control signal to the Reset module, generate Reset note information, and send the Reset note information to the SPI SWITCHER module;

The resetting module is used for resetting/resetting according to the control signal and triggering the SPI Boot module to start;

the public FLASH is used for storing Image files of all the boards;

SPI SWITCHER module, which is used for responding to the Reset note information of all boards, inquiring the working mode recorded by the first register, and if the current working mode is SPI Boot mode, sequentially switching the access right of the public FLASH to the SPI Boot module of each board according to the board starting loading sequence recorded by the second register, so as to realize the time-sharing multiplexing of SPI buses of boards with different slots and the public FLASH;

and the SPI Boot module is used for reading the Image file from the public FLASH through the SPI bus switched by the SPI SWITCHER module and starting loading.

In a second aspect, the present application provides a method for optimizing upgrading of a board card firmware of a frame type device, which is applied to a device for optimizing upgrading of a board card firmware of a frame type device in the first aspect, and specifically includes the following steps:

s1, responding to a user upgrading command, and acquiring a slot number of a public board card in current frame equipment;

S2, establishing communication connection with the public board card, and issuing an Image file to the public board card to upgrade the public board card;

S3, receiving an upgrading result of the public board card, judging whether the public board card is successfully upgraded, and if not, repeating the steps S2-S3 until the upgrading is successful.

In some embodiments, the specific process of upgrading the common board in step S2 is:

s21, responding Sysupdate signals of the upper computer, recording the current working mode in the first register as an upgrade mode, and receiving an Image file issued by the upper computer;

S22, performing validity check on the Image file, and if the verification is passed, generating a Write instruction and sending the Write instruction to the SPI SWITCHER module, so that the SPI SWITCHER module executes the Write instruction to switch the access right of the public FLASH;

S23, obtaining the access right of the public FLASH, and writing the Image file into the public FLASH through the SPI bus;

S24, judging whether the read-back check is passed after the read-back check is written into the public FLASH, writing the read-back check result into the upgrading result, and sending the upgrading result to the upper computer.

In some specific embodiments, the specific procedure of the SPI SWITCHER module switching in step S22 is:

S221, responding to a Write instruction, and inquiring whether the working mode currently recorded in the first register is an upgrade mode or not;

s222, if yes, switching the access right of the public FLASH to the upgrading module of the public board card, so that SPI buses between the public FLASH and the upgrading module are communicated.

In a third aspect, the present application provides a method for optimizing boot loading of a board card firmware of a machine frame type device, which is applied to a device for optimizing upgrade of a board card firmware of a machine frame type device in the first aspect, and specifically includes the following steps:

step 1, each board card is powered on in turn according to a power-on time sequence to start respective programmable logic components, and after power-on, reset control modules of each board card respectively generate Reset Notice information notification to SPI SWITCHER modules;

Step 2, in SPI SWITCHER modules, the public FLASH access rights are sequentially switched into all the boards according to the board starting and loading sequence, wherein the board starting and loading sequence is the sequence of the public boards and the board to be upgraded;

Step 3, for each board card, after the board card obtains the public FLASH access right, the reset control module of the board card generates a reset-releasing signal to the reset module of the board card for reset-releasing;

after the reset module of the board card is reset, a starting signal is sent to the SPI Boot module of the board card, the SPI Boot module of the board card is connected to a public Flash through a SPI SWITCHER module, and Image data is read from the Flash to start loading.

In some embodiments, the specific process of step 2 is:

2.1, SPI SWITCHER modules respond to Reset Notice information, record the current working mode in the first register as SPI Boot mode, and write the corresponding board card numbers of each board card in the second register in turn according to the starting loading sequence of each board card,

And 2.2, when the working mode recorded in the first register is the SPI Boot mode, switching FLASH access rights to the SPI Boot modules of the boards in sequence according to the serial numbers of the boards recorded in the second register, and starting and loading the boards.

In some embodiments, the process of step 2.2 is:

Inquiring the states of the first register and the second register, when the working mode recorded in the first register is an SPI Boot mode and the board number recorded in the second register is a public board, switching the FLASH access right to an SPI Boot module in the public board, reading an Image file from the public FLASH, starting and loading, and finishing the starting and loading of the public board;

After the starting loading of the public board card is completed, sequentially modifying the board card numbers in the second register according to the board card starting loading sequence;

After each time the second register is modified, the FLASH access right is switched to the board card to be upgraded corresponding to the board card number recorded in the modified second register, so that an SPI Boot module of the board card to be upgraded is connected with an SPI bus of the public FLASH, an Image file is read from the public FLASH to start loading, and the starting loading of the board card to be upgraded is completed.

The invention has the beneficial effects that:

The application is applied to frame equipment, and utilizes the existing programmable logic device (such as PLD), selects a board card with a slot position from all board cards as a common board card, and is provided with a common Flash, and other board cards cancel the corresponding Flash. Meanwhile, a SPI SWITCHER module is added in the PLD of the public board and is connected with the Flash and SPI buses of DSPs on all the boards, SPIs of a plurality of boards are gathered together, and then a scheme of multiplexing the same Flash through a switching circuit by using the programmable characteristics of a programmable logic device to achieve multiplexing of multiple SPIs in a time-sharing way is utilized, so that the plurality of boards can access the same Flash independently through the SPIs;

By sharing the same Flash, when the firmware version is upgraded, only the SPI SWITCHER module of the public board is needed to write the Image file into the public Flash once, so that the program upgrading of all the boards can be realized only by upgrading once (namely, executing the operation of writing the Image into the Flash once) when the firmware version is upgraded, the upgrading complexity is reduced, the probability of upgrading operation errors is reduced, and the upgrading efficiency is improved; flash resources are saved at the same time, and hardware cost is reduced.

When the FLASH memory is started and loaded, the SPI SWITCHER module sequentially switches the access right of the public FLASH to each board card through the SPI bus, so that all the board cards can acquire Image files from the public FLASH to respective RAM/DDR to operate.

Drawings

FIG. 1 is a schematic diagram of a prior art upgrade and loading scheme for a frame-type device;

FIG. 2 is a schematic diagram of a serial upgrade process in the prior art;

FIG. 3 is a prior art SPI Boot flow chart;

FIG. 4 is a schematic diagram of an upgrade loading scheme of a frame-type device according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of an upgrade process according to an embodiment of the present invention;

FIG. 6 is a schematic flow chart of the DSP_0 SPI Boot according to an embodiment of the present invention;

Fig. 7 is a schematic diagram of a dsp_n SPI Boot flow provided by an embodiment of the present invention.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

The relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless it is specifically stated otherwise.

Meanwhile, it should be understood that the sizes of the respective parts shown in the drawings are not drawn in actual scale for convenience of description.

In addition, descriptions of well-known structures, functions and configurations may be omitted for clarity and conciseness. Those of ordinary skill in the art will recognize that various changes and modifications of the examples described herein can be made without departing from the spirit and scope of the present disclosure.

Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but should be considered part of the specification where appropriate.

In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of the exemplary embodiments may have different values.

Before describing the embodiments of the present application, concepts that need to be related will be described:

Machine frame type device: generally, IT refers to a large equipment structure of modular design used in the fields of communication, IT hardware, data center, etc. The device consists of a basic frame (also called a chassis or chassis) and a plurality of slots (slots), and a single board card (such as a processing board, an interface board, a power board and the like) with different functions can be inserted into each slot. By flexibly configuring different single board cards, the machine frame type equipment can meet the requirements of different scales and functions, such as a switch, a router, a server, a storage device and the like;

DSP chip: a digital signal processor Chip (DIGITAL SIGNAL Processing Chip) is a microprocessor specifically designed to quickly execute digital signal Processing algorithms. Common such as TMS320C6000 series of TI (Texas instruments), armada series of Marvell, FT-M6678 of Galaxy, etc.;

SPI: serial peripheral interface (SERIAL PERIPHERAL INTERFACE), a common synchronous serial communication protocol, is mainly used for short-distance, full duplex, master-slave communication between DSP and other peripheral devices (such as memories), and is mainly used herein for data exchange between DSP and Flash;

RAM: random access memory (Random Access Memory), which is a data storage area with which the CPU interacts directly. The method is characterized in that random access can be performed according to the requirement, and the access speed is high;

DDR: the DDR SDRAM (Double Data Rate Synchronous Dynamic Random-Access Memory) is a synchronous dynamic random Access Memory, and is characterized in that data can be transmitted on both rising and falling edges of one clock period, so that the data transmission rate is twice that of the traditional SDRAM;

RBL: ROM Bootloader is a boot loader that is implemented in the ROM inside the DSP, which is the first stage loader after the DSP is powered on or reset.

SPI Boot: the SPI starting mode of the DSP is a common starting mode in the RBL of the DSP, and after the DSP is reset by electrolysis, the system selects the corresponding starting mode according to the configuration of the chip to carry out SPI Boot. In the mode, when the DSP is started, a program mirror image is read from Flash through an SPI interface, and is arranged in an internal RAM according to a preset address sequence for execution;

PLD A programmable logic device (Programmable Logic Device, PLD) is an integrated circuit whose internal circuitry can be programmed by a user to implement specific digital logic functions. The design flexibility of PLDs is extremely high, allowing electronic engineers to customize specific logic circuits at the hardware level without having to design and fabricate new integrated circuits as with conventional fixed function chips. Common programmable logic devices also include: FPGA and CPLD;

And (3) FPGA: a Field-Programmable gate array (Field-Programmable GATE ARRAY) is an advanced PLD, and is characterized by extremely high flexibility and powerful parallel processing capability. It is advantageous in applications requiring greater flexibility, higher performance, and larger scale logic implementation than CPLDs.

CPLD: the complex programmable logic device (Complex Programmable Logic Device), a common PLD, can be used for realizing user-defined digital logic design, has a relatively simple structure, has a small number of macro units compared with the FPGA, is suitable for processing logic design with low density, and is more suitable for realizing combinational logic or medium-small-scale sequential logic circuits, such as bus interface control, state machine design and the like;

Image: the program image file of the DSP is generally compiled by a series of compiling tool chains to generate a binary file which can be executed on the DSP chip.

Currently, in a common frame-type device, each board card (specifically referred to herein as a board card using a DSP as a core processor, hereinafter referred to as a "DSP") is generally configured with a Flash for storing a system Image (abbreviated as an "Image" hereinafter referred to as a "Image"). When upgrading, independent upgrading operation is required to be carried out on each board card, namely, image is distributed to each board card and written into corresponding Flash.

Because there are many modes of connection between DSP and Flash, this patent mainly relates to the Flash device that connects through SPI interface. The board card upgrading and loading schematic of the current machine frame type equipment is shown in fig. 1, and each board card generally has 2 core devices: PLDs and DSPs. Wherein:

PLD: each board card is generally configured with a programmable logic device (which is illustrated by a PLD (programmable logic device)/FPGA (field programmable logic device) in unified way, and is realized by selecting CPLD in general practical engineering), and the main function of each board card is to control the power-on time sequence of the core device in the board card. For example, reset Controller (Reset control module) in PLD in fig. 1 mainly realizes Reset/Reset function to DSP chip by controlling Reset pin of DSP chip, so as to achieve effect of controlling DSP start.

DSP: the core device of the board mainly comprises the following modules:

1. reset module: resetting/resetting, wherein the peripheral device can perform resetting/resetting operation on the DSP chip through the pin, so as to control the starting of the DSP;

2. SPI Boot module: an SPI Boot mode is realized, and in the SPI Boot mode, an Image is read from Flash through the SPI, and a program is operated after the Image is loaded into a memory;

3. sysupdate upgrade module: the system upgrading module is mainly used for realizing firmware upgrading of the DSP, writing external Image into Flash through a series of operations (commonly, upgrading commands of corresponding upper computers and then obtaining the commands from a PC or other host computers through a network), and realizing the updating and upgrading functions of the program;

According to the system shown in fig. 1, the current upgrade schemes are of two types: serial and parallel, are explained in detail as follows:

a) Serial: the method comprises the steps of sequentially upgrading the board cards to be upgraded according to the board card numbers during upgrading;

b) Parallel: and during upgrading, a plurality of tasks are directly created, and all the boards needing to be upgraded are simultaneously upgraded in parallel.

The parallel upgrade can improve upgrade efficiency to a certain extent compared with serial upgrade, but it is unavoidable that individual boards fail to upgrade, so that it is also necessary to calibrate and re-upgrade the failed boards according to upgrade results.

As shown in fig. 2, the flow of serial upgrade is given generally as follows: after receiving the upgrade command of the user, the upper computer firstly obtains the total number N of the boards needed to be upgraded in the current equipment, numbers the DSP components of each board, executes the same upgrade operation according to a certain sequence (supposing that the upgrade is started from DSP_0 to DSP_N in sequence), and then gathers and presents the upgrade result fed back by each DSP to the user. And the user decides whether to re-upgrade the failed board card and other operations according to the summarized result.

Another common parallel upgrade scheme is relatively optimized, namely: on the basis of serial upgrade, a plurality of same tasks are created at the same time, and upgrade operations are performed on all boards needing to be upgraded at the same time, which is not described herein.

Based on the system of fig. 1, the current Boot loading procedure (SPI Boot) is as shown in fig. 3:

After the DSP chip is powered on and reset by PLD, the RBL loading flow of the DSP is entered. In the RBL loading flow of the DSP, the RBL first reads the loading mode of the GPIO, then acquires Image from the corresponding source according to the loading mode configured by the hardware GPIO, then loads it into the RAM (some of them involve loading it into the DDR as well, and the effect is the same) and runs the program.

The loading mode of the boards is SPI Boot, in the mode, an SPI interface is initialized, and then Image files are read from Flash correspondingly mounted on each board through the SPI interface and stored in RAM/DDR. Then the address of c_int00 is analyzed from the address, and finally the address is jumped to c_int00 to start executing the DSP program, so that the whole Boot flow is completed.

However, with the above system connection and upgrade loading method, the following problems may occur:

1) Under the condition that the same Image is used for all the boards, as each board has respective Flash, the upgrade needs to distribute the Image for each board and write the respective Flash, which is troublesome in operation and long in time consumption (especially serial upgrade);

2) Each board card needs to be provided with independent Flash, and the hardware cost is high;

Based on this, the present application proposes the following scheme:

Example 1

As shown in fig. 4, the embodiment provides a device for optimizing upgrading of board card firmware of a frame-type device, which comprises an upper computer and a plurality of SLOTs (slot_0, …, slot_n) for placing board cards, wherein the board cards comprise a plurality of board cards to be upgraded and a common board card; the upper computer is only connected with the public board card;

Wherein, the functions of each device are:

The upper computer is used for acquiring the slot number of the public board card in the current machine frame type equipment, establishing communication connection with the DSP component of the public board card, sending Sysupdate signals to the public board card and sending the Image file to the DSP component of the public board card;

The public FLASH is used for storing Image files of all the boards.

the public FLASH is used for storing Image files of all the boards;

and the SPI Boot module is used for reading the Image file from the public FLASH through the SPI SWITCHER module and starting loading.

It can be understood that, the common board card is selected from all boards as a common board card, and the SLOT number corresponding to the common board card is sent to the host computer, for example, in this embodiment, the slot_0 SLOT is selected as the SLOT where the common board card is located, and the SLOT number is consistent with the board card number, so, according to the foregoing scheme, the DSP component number of the common board card slot_0 is dsp_0, and the programmable logic component number is pld_0, and the components of the DSP component are:

1. Reset module: reset/reset-off input for DSP chips, controlled by external PLD to reset and start;

2. SPI Boot module (DSP_0): the SPI starting function of the DSP_0 is connected to the SPI SWITCHER module of the PLD_0;

3. public Flash: saving Image files of all board SLOTs, and connecting to SPI SWITCHER modules of PLD_0;

4. The upgrade module (Sysupdate) is in charge of responding to an upgrade command of the upper computer, receiving an Image file issued by the upper computer and writing the Image file into the public Flash through the SPI SWITCHER module;

the components in PLD_0 of SLOT_0 are:

1. Reset Controller Reset control module: controlling reset/de-reset of the DSP;

2. SPI SWITCHER module: SPI buses of all DSPs in the interconnected frame are connected with a common Flash at the same time. The main function is to realize the time-sharing multiplexing of SPI buses of DSPs with different slots and common Flash, and the realization is relatively simple: and responding to Reset notes of all the boards and Write instructions of the common board, and switching the SPI bus to a corresponding DSP SPI bus in a corresponding mode.

The different working modes can be divided into:

a) Sysupdate mode: in the upgrade mode, after responding to the Write message of Sysupdate modules of the DSP_0, the SPI bus is switched to the DSP_0, so that the DSP_0 can be connected to Flash through SPI SWITCHER, and the Image is written into the Flash to finish the upgrade function;

b) SPI Boot mode: in the power-on starting process of the device, after the PLD of each board resets the corresponding DSP, a Reset message is announced to SPI SWITCHER. And sequentially switching the SPI bus to different DSPs (digital signal processors) in SPI SWITCHER according to a specific sequence (the card slot number can be a card slot number or other established sequences), and then enabling the DSPs to be connected to Flash through SPI SWITCHER in sequence and reading Image data from the Flash, so that the flow of the SPI Boot is realized, and the loading starting function is completed.

Example 2

As shown in fig. 5, based on the apparatus in embodiment 1, this embodiment provides a method for optimizing upgrading of board card firmware of a frame-type device, because all board cards time-share multiplex public FLASH, it is no longer necessary to distribute Image files to all board cards and write them into FLASH of each board card, only the Image files need to be written into public FLASH for the board card, and for DSP components and PLD components in an upper computer and each board card, each component executes the following steps:

1. For the upper computer, the following steps are specifically executed:

s1, responding to a user upgrading command, and acquiring a SLOT number X of a common board card in current frame equipment, wherein the embodiment takes SLOT_0 as an example;

s2, establishing communication connection with a public board card X (SLOT_0), generating Sysupdate signals, transmitting the Sysupdate signals to a public assembly, transmitting an Image file to the public board card, and upgrading the public board card;

S3, receiving the upgrade result of the public board card, judging whether the upgrade of the public board card is successful, if so, outputting the upgrade result, if not, judging whether the retry times are exceeded, if not, repeating the steps S2-S3 until the upgrade is successful,

2. For the DSP component of the common board, dsp_0 performs the following process at the time of upgrade:

S22, performing validity check on the Image file, and if the verification is passed, generating a Write instruction and sending the Write instruction to the SPI SWITCHER module, so that the SPI SWITCHER module executes the Write instruction to switch the access right of the public FLASH; if the verification is not passed, writing the file receiving verification failure into an upgrading result;

S24, judging whether the read-back verification is passed after the read-back verification is written into the public FLASH, writing the read-back verification result into the upgrading result and sending the upgrading result to the upper computer, if the read-back verification is passed, writing the write-back verification into the upgrading result successfully, if the read-back verification is not passed, writing the write-back verification failure into the upgrading result, and summarizing all the upgrading results and sending the upgrading result to the upper computer.

3. For PLD components of a common board, the SPI SWITCHER modules in PLD_0 at upgrade perform the following process:

It can be seen that after receiving the upgrade command of the user, the upper computer will first obtain the SLOT number (slot_0 is taken as an example here) of the common board card in the current device, then establish network connection with dsp_0 of the common SLOT, and send the Image file to dsp_0 through the network.

After receiving the Image file, the DSP_0 firstly checks the validity of the file, and after the validity passes, the PLD_0 is informed to switch the SPI bus of the SPI SWITCHER module to the DSP_0; the notification may be achieved by writing a specific flag into a specific register of the PLD by the DSP, for example, a register (denoted by mode_reg) for recording an operation MODE is defined inside the PLD, and when the MODE recorded by mode_reg is Sysupdate (upgrade MODE), the SPI bus may be directly switched to the channel of dsp_0. Then the DSP_0 writes the Image into Flash through an SPI bus, and finally reads the Image back and checks, and if the check is successful, the updated result is fed back to the upper computer; if the verification fails, after the result is fed back to the upper computer, the process of re-upgrading can be automatically executed. A register (denoted as MODE_REG) for recording the working MODE is defined inside the PLD, and when the MODE recorded by MODE_REG is Sysupdate (upgrade MODE), the SPI bus is directly switched to the channel of DSP_0.

Example 3

The embodiment provides a method for optimizing the boot loading of the board card firmware of the frame type equipment based on the device in embodiment 1, and because the device in the embodiment no longer configures an independent FLASH for each board card, the boot loading of each board card only needs to multiplex the public FLASH of the public board card SLOT_0.

When each board card is started to load, the states of a first register and a second register are inquired, when the working mode recorded in the first register is an SPI Boot mode and the board card number recorded in the second register is a public board card, FLASH access right is switched to an SPI Boot module in the public board card, an Image file is read from the public FLASH to start to load, and the starting and the loading of the public board card are completed;

Specifically, since the start-up loading of the common board slot_0 does not need to participate in other boards SLOTs, and the start-up of the other boards slot_n to be upgraded needs to rely on the PLD and the common Flash of the slot_0 of the common board, the start-up loading flows of the board slot_0 and the boards in other SLOTs will be separately described herein for convenience of description.

1. Public board card boot loading

For the start loading flow of the common board slot_0, as shown in fig. 6, for loading of the slot_0, the pld_0 is powered up first and other devices 1 on the slot_0 are powered up according to the power-up sequence, then the SPI bus is switched to the dsp_0 through SPI SWITCHER, and then the dsp_0 is RESET through the RESET pin of the dsp_0.

After the reset of dsp_0, the subsequent loading process is the same as the existing scheme, and details are not described here (see SPI Boot process in the prior art).

As shown in FIG. 6, the SPI SWITCHER bus switching flow in the PLD defines a first register for recording the working MODE and a second register for recording the bus number to be switched by the SPI (the first register and the second register can be respectively represented by MODE_REG and SPI_CHNL_REG), and when the MODE_REG records the SPI Boot MODE, the SPI bus is switched to the SPI bus channel recorded by the SPI_CHNL_REG.

Specifically, for pld_0 component, the following procedure is performed:

Step 1, each device in PLD_0 is powered on in turn according to a power-on time sequence, and after power-on, a Reset control module of the board SLOT_0 generates Reset Notice information Notice to a SPI SWITCHER module;

Step 2, SPI SWITCHER module responds to Reset Notice information, records the current working mode in the first register as SPI Boot mode, and writes the corresponding board card number of the public board card (the board card number is the same as the SLOT number, is SLOT_0) in the second register,

Step 3, when the working mode recorded in the first register is SPI Boot mode and the board card number in the second register is SLOT_0, switching the public FLASH access right to DSP_0 in SPI SWITCHER module;

Step 4, after the SLOT_0 obtains the public FLASH access right, the reset control module of the SLOT_0 generates a reset-solution signal to the reset module of the SLOT_0 for reset-solution;

And 5, after the reset module of the SLOT_0 is reset, sending a starting signal to the SPI Boot module of the SLOT_0, connecting the SPIBoot module of the SLOT_0 to the public Flash through the SPI SWITCHER module, and reading Image data from the Flash to start loading the public board card. And the loading process of the DSP_0 is consistent with the prior art and is not repeated.

2. Starting and loading process of other board cards to be upgraded

For each board to be upgraded, the PLD_N powers up other devices 1 of the SLOT_N according to a power-up time sequence, and then switches SPI buses to the DSP_N of the SLOT position through SPI SWITCHER before resetting the DSP_N, and then resets the DSP_N.

Specifically, for the PLD_N component, as shown in FIG. 7, the boot loader performs the following process:

step 1, each device in PLD_N is powered on in turn according to a power-on time sequence, and after power-on, a Reset control module of a board SLOT_N generates Reset Notice information Notice to a SPI SWITCHER module;

Step 2, SPI SWITCHER modules respond to Reset note information in sequence according to a starting loading sequence, and overwrite a board card number SLOT_N corresponding to a current board card to be upgraded in a second register, wherein the starting loading sequence can be that the board card numbers of the public board card and other board cards to be upgraded respond in sequence from low to high;

Step 3, switching the public FLASH access right to the DSP_N in a SPI SWITCHER module;

Step 4, after the SLOT_N obtains the public FLASH access right, the reset control module of the SLOT_N generates a reset-solution signal to the reset module of the SLOT_N for reset-solution;

And 5, after the reset module of the SLOT_N is reset, sending a starting signal to the SPI Boot module of the SLOT_N, connecting the SPIBoot module of the SLOT_N to the public Flash through the SPI SWITCHER module, and reading Image data from the Flash to start loading the public board card. And the loading process of the DSP_N is consistent with the prior art and is not repeated.

It can be understood that on the existing architecture, the application selects one slot board card from all board cards as a common board card, a piece of common Flash is arranged on the common board card, the common Flash of the common board card is used as the Image storage position of all other slot board cards, and the other board cards cancel the corresponding Flash. Meanwhile, a SPI SWITCHER module is added in the PLD of the public board card, and is connected with Flash and SPI buses of DSPs on all the board cards. The method comprises two processes of upgrading and starting loading, wherein:

a) When upgrading (Sysupdate modes), only the SPI SWITCHER module of the public board PLD_0 needs to be switched to the SPI bus of the DSP_0, and then the Image is written into the public Flash;

b) When SPI Boot is carried out (SPI Boot mode), SPI SWITCHER modules sequentially switch SPI buses to DSP_0, DSP_1 and DSP_ … … DSP_N according to the sequence, so that all Slot DSPs acquire Image data from a common Flash and operate in respective RAM/DDR.

Therefore, each board card shares the same Flash, so that when the firmware version is upgraded, the image file is only required to be written into the Flash once, and the program upgrading of all the board cards can be realized, thereby reducing the upgrading complexity, reducing the probability of upgrading misoperation and improving the upgrading efficiency;

And the programmable logic device (FPGA, CPLD, PLD and the like) is utilized to realize the switching of SPI connection relation between a plurality of boards and the same Flash, so that the plurality of boards can multiplex the curing program on the same Flash in a time-sharing way, and the hardware cost is saved.

The foregoing description of the preferred embodiment of the invention is not intended to limit the invention in any way, but rather to cover all modifications, equivalents, improvements and alternatives falling within the spirit and principles of the invention.

Claims

1. The device for optimizing the upgrading of the board card firmware of the frame type equipment is characterized by comprising an upper computer and a frame provided with a plurality of board card slots for placing the board cards, wherein the board cards comprise a plurality of board cards to be upgraded and a public board card; the upper computer is only connected with the public board card;

2. The apparatus for optimizing a machine frame type device board card firmware upgrade of claim 1, wherein the programmable logic assembly of the common board card further comprises a first register and a second register, the first register is used for recording SPI SWITCHER a current working mode of the module, and the second register is used for recording SPI SWITCHER a board card number that the module currently needs to switch.

3. The device for optimizing the upgrading of the board card firmware of the frame-type equipment according to claim 2, wherein the upper computer is used for acquiring the slot number of the public board card in the current frame-type equipment, establishing communication connection with the DSP component of the public board card, sending Sysupdate signals to the public board card and sending the Image file to the DSP component of the public board card;

And the public FLASH is used for storing the Image files of all the boards.

4. The device for optimizing upgrading of board card firmware of a frame-type equipment according to claim 2, wherein the Reset control module is configured to send a Reset/unset control signal to the Reset module, generate Reset note information and send the Reset note information to the SPI SWITCHER module;

the resetting module is used for resetting/de-resetting according to the control signal and triggering the SPI Boot module to start;

the public FLASH is used for storing Image files of all the boards;

5. The method for optimizing the upgrading of the board card firmware of the machine frame type equipment is characterized by being applied to the device for optimizing the upgrading of the board card firmware of the machine frame type equipment according to claim 1, and specifically comprising the following steps:

6. The method for optimizing board card firmware upgrade of a frame type device according to claim 5, wherein the specific process of the common board card upgrade in step S2 is:

7. The method for optimizing upgrading of board card firmware of a frame-type device according to claim 6, wherein the specific process of switching SPI SWITCHER modules in step S22 is as follows:

8. The method for optimizing the boot loading of the board card firmware of the machine frame type equipment is characterized by being applied to the device for optimizing the upgrade of the board card firmware of the machine frame type equipment according to claim 1, and comprises the following specific processes:

9. The method for optimizing boot loading of a subrack type device board card firmware according to claim 8, wherein the specific process of step 2 is as follows:

10. The method for optimizing boot loading of a subrack type device board card firmware of claim 9, wherein the process of step 2.2 is: