CN103605542A - Online updater of FPGA configuration files - Google Patents
Online updater of FPGA configuration files Download PDFInfo
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- CN103605542A CN103605542A CN201310581145.0A CN201310581145A CN103605542A CN 103605542 A CN103605542 A CN 103605542A CN 201310581145 A CN201310581145 A CN 201310581145A CN 103605542 A CN103605542 A CN 103605542A
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Abstract
The invention discloses an online updater of FPGA configuration files. The online updater of FPGA configuration files comprises a storage processing module, a bus switching module, an FPGA and a clock provision module. The storage processing module comprises a storage unit and a control unit. The bus switching unit is used for making or breaking a first path and a second path under control of the control unit, respectively. The FPGA is used for writing latest configuration files into the storage unit and reloading updated configuration files in the storage unit for configuration under control of the control unit. The clock provision module is used for providing the storage processing module and the FPGA with clock frequency which is used for allowing the storage processing module and the FPGA to operate in rhythm. The FPGA configuration files are updated online with few devices, the need for extra physical resources during online updating of FPGA configuration files is avoided, and the input cost for the online updating of the FPGA configuration files is reduced.
Description
Technical field
The present invention relates to network safety filed, specifically, relate to a kind of FPGA(Field-Programmable Gate Array, field programmable gate array) the online upgrading device of configuration file.
Background technology
At present, existing FPGA equipment is when upgrading finished product logical block, generally by JTAG(Joint Test Action Group, joint test behavior tissue) downloading wire carries out programming plate and carries upgrading, and in actual use, generally having many environment is not allow to use JTAG downloading wire, and can not make equipment carry out system cut-off, now just need to design a kind of online upgrading method of the JTAG of disengaging downloading wire, by software or Long-distance Control, realize the logical renewal of the chip on FPGA board.
In the prior art, industry has proposed to solve the method for FPGA online upgrading, for example, at application number, be 201110060484.5, name is called in the patent of remote upgrade method of a kind of server and programmable logic device (PLD) thereof, proposed to utilize the BMC of server by Ethernet, to encapsulate the data layout of JTAG agreement, and the method for the GPIO Interface realization burning FPGA by CPLD device, yet, the method need to be used CPLD, PLD, the devices such as BMC coordinate the upgrading realizing FPGA, and bus is JTAG agreement, the required physical resource of implementation method is more, design more complicated.
In existing correlation technique, when carrying out FPGA online upgrading, required physical resource is more, designs more complicated problem, not yet proposes at present effective solution.
Summary of the invention
In existing correlation technique, when carrying out FPGA online upgrading, required physical resource is more, design more complicated problem, the present invention proposes a kind of online upgrading device of FPGA configuration file, can realize and carry out online upgrading to the configuration file of FPGA with less components and parts, required physical resource while having reduced FPGA online upgrading.
Technical scheme of the present invention is achieved in that
A kind of online upgrading device of FPGA configuration file is provided according to an aspect of the present invention.
The online upgrading device of this FPGA configuration file comprises:
Stores processor module, has storage unit and control module, wherein, storage unit is for receiving and store FPGA configuration file, control module is for before configuration file upgrading, control bus handover module is communicated with FPGA with the first path between stores processor module, alternate path between FPGA and stores processor module is disconnected, and the original configuration file in the latest configuration file update storage unit receiving according to storage unit, and after configuration file upgrades, control bus handover module disconnects the first path, alternate path is communicated with, and, the configuration file that triggering FPGA is again written into after renewal from storage unit is configured.
Bus switch module, under the control of control module, is communicated with respectively or disconnects the first path and alternate path;
FPGA, for up-to-date configuration file is written to storage unit, and under the control of control module, the configuration file being again written into from storage unit after renewal is first, is configured;
Clock module, for when carrying out online upgrading, for stores processor module and FPGA provide clock frequency, wherein, clock frequency is used to the work of stores processor module and FPGA that work tempo is provided.
Wherein, FPGA also, for when up-to-date configuration file is written to storage unit, backs up in realtime to the configuration file writing.
In addition, FPGA is also for being written to up-to-date configuration file after described storage unit, the configuration file writing in reading cells, and the configuration file of the configuration file reading and backup is compared, at comparative result be consistent in the situation that, to control module, send more newer command, impel control module according to the original configuration file in the latest configuration file update storage unit writing.
Alternatively, stores processor module comprise following one of at least: NorFlash chip, NandFlash chip.
Alternatively, clock module comprise following one of at least: fixed crystal oscillator, crystal oscillator able to programme frequently.
Alternatively, the fixed frequency of crystal oscillator is frequently 50MHz.
The storage unit that the present invention self possesses by stores processor module is stored the configuration file of FPGA, and the control module self possessing by stores processor module is controlled the upgrading that FPGA is configured file, thereby realized, utilize less components and parts to complete the online updating to PFGA configuration file, while having avoided FPGA configuration file online upgrading, need the situation of extra physical resource to occur, the input cost while having reduced FPGA configuration file online upgrading.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is according to the theory diagram of the online upgrading device of the FPGA configuration file of the embodiment of the present invention;
Fig. 2 is according to the structural representation of the online upgrading device of the FPGA configuration file of the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, the every other embodiment that those of ordinary skills obtain, belongs to the scope of protection of the invention.
According to embodiments of the invention, provide a kind of online upgrading device of FPGA configuration file.
As shown in Figure 1, according to the present invention, the online upgrading device of the FPGA configuration file of example comprises:
FPGA13, for up-to-date configuration file is written to storage unit 111, and under the control at control module 112, the configuration file being again written into from storage unit 111 after renewal is first, is configured;
Wherein, FPGA13 also, for when up-to-date configuration file is written to storage unit 111, backs up in realtime to the configuration file writing.
In addition, FPGA13 is also for being written to up-to-date configuration file after described storage unit 111, the configuration file writing in reading cells 111, and the configuration file of the configuration file reading and backup is compared, at comparative result be consistent in the situation that, to control module 112, send more newer command, impel control module 112 according to the original configuration file in the latest configuration file update storage unit writing.
In addition, when reality is implemented, writing logical renewal or reading the speed that logic loads FPGA when FPGA configuration file online upgrading is provided, stores processor module can adopt NorFlash chip, and if control proper, and when less demanding to data integrity, also can adopt the NandFlash chip that cost is lower, certainly, except above-mentioned two kinds of chips, also can select other similar chip, as long as the chip of selecting possesses storage and controls function simultaneously.
Same, writing logical renewal or reading the speed that logic loads FPGA when FPGA configuration file online upgrading is provided, clock module can adopt determines frequency crystal oscillator, for example, frequency is 50MHz determines frequency crystal oscillator, certainly, also can, according to actual demand, select crystal oscillator able to programme to replace.
By instantiation, technique scheme of the present invention is elaborated below.
Fig. 2 is the structural representation of the online upgrading device of FPGA configuration file, as can be seen from Figure 2, crystal oscillator is that NorFlash chip and FPGA (logical program downloads to FPGA from FLASH) when program loads provide reference clock, this crystal oscillator frequency can reach 50MHz, than traditional JTAG, download first frequency (2～6MHz) high a lot, the dedicated control signal that NorFLASH chip is connected with FPGA and data-signal are used when program normal load, these signals have been connected on the common IO pin of FPGA simultaneously, when program loads, these common IO pins can not affect normal record process, when program has loaded and after FPGA works, these common IO have just obtained the access rights to control line and data line, if now do not initiate loading command, on the operation of NorFLASH chip, can not affect the function (being that FPGA program loads dedicated pin through just enabling after the order of acquisition start-up loading) of the dedicated pin of FPGA, FPGA internal logic is controlled each operational order of NorFLASH chip by these external common IO pins, comprise and wipe, read, write etc., and these orders all adopt the mode of asynchronous control, the generation of control command is all ns level, so more faster than traditional mode of passing through JTAG downloading wire control PROM, the logical program of FPGA inside is controlled the interface bus of NorFLASH chip, its logical file to be upgraded by main frame by passing under PCIE bus, the steering logic of FPGA inside is writing NorFLASH chip by logical file to be upgraded, and after checking correctly, can initiate to load the order of FPGA, and discharge control and data bus between FPGA and NorFLASH chip, very fast of the speed that loads FPGA, generally can reach ms level, and after having loaded, host side can be carried out reset operation, completes whole upgrade jobs.
Therefore, the present invention uses NorFlash chip rather than EPROM chip as storage and the loading of fpga logic, during storage, use asynchronous parallel interface, during loading, use synchronous parallel interface, and interface protocol is simply more a lot of than traditional JTAG agreement, thereby no matter make be when writing logic to be updated, while still loading new logic to FPGA, speed is very fast all
In sum, by means of technique scheme of the present invention, the storage unit self possessing by stores processor module is stored the configuration file of FPGA, and the control module self possessing by stores processor module is controlled the upgrading that FPGA is configured file, thereby realized, utilize less components and parts to complete the online updating to PFGA configuration file, while having avoided FPGA configuration file online upgrading, need the situation of extra physical resource to occur, the input cost while having reduced FPGA configuration file online upgrading.
In addition, the control module control bus handover module that the present invention also possesses by stores processor module switches the Reconfigurations that different paths is realized FPGA configuration file, thereby guaranteed that FPGA configuration file is when upgrading and configure, all can realize by corresponding private access, and then effectively raise that FPGA configuration file upgrades and speed during configuration, the work efficiency while having guaranteed FPGA configuration file online upgrading.
The foregoing is only preferred embodiment of the present invention, in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (6)
1. an online upgrading device for on-site programmable gate array FPGA configuration file, is characterized in that, comprising:
Stores processor module, has storage unit and control module; Wherein,
Described storage unit is for receiving and store FPGA configuration file;
Described control module is for before described configuration file upgrading, control bus handover module is communicated with described FPGA with the first path between described stores processor module, alternate path between described FPGA and described stores processor module is disconnected, and the original configuration file described in the latest configuration file update receiving according to described storage unit in storage unit, and after described configuration file upgrades, controlling described bus switch module disconnects described the first path, described alternate path is communicated with, and, trigger described FPGA and from described storage unit, be again written into the described configuration file after renewal, be configured,
Bus switch module, under the control of described control module, is communicated with respectively or disconnects described the first path and described alternate path;
FPGA for up-to-date configuration file is written to described storage unit, and under the control of described control module, is again written into the described configuration file after renewal from described storage unit, is configured;
Clock module, for when carrying out online upgrading, for described stores processor module and described FPGA provide clock frequency, wherein, described clock frequency is used to the work of described stores processor module and described FPGA that work tempo is provided.
2. online upgrading device according to claim 1, is characterized in that, described FPGA also, for when up-to-date configuration file is written to described storage unit, backs up in realtime to the described configuration file writing.
3. online upgrading device according to claim 2, it is characterized in that, described FPGA is also for being written to up-to-date configuration file after described storage unit, read the described configuration file writing in described storage unit, and the described configuration file of the described configuration file reading and backup is compared, at comparative result be consistent in the situation that, to described control module, send more newer command, impel described control module according to the original configuration file in storage unit described in the latest configuration file update writing.
4. according to the online upgrading device described in any one in claims 1 to 3, it is characterized in that, institute's stores processor module comprise following one of at least:
NorFlash chip, NandFlash chip.
5. according to the online upgrading device described in any one in claims 1 to 3, it is characterized in that, described clock module comprise following one of at least:
Fixed crystal oscillator, crystal oscillator able to programme frequently.
6. online upgrading device according to claim 5, is characterized in that, the described fixed frequency of crystal oscillator is frequently 50MHz.
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103970565A (en) * | 2014-04-24 | 2014-08-06 | 浪潮电子信息产业股份有限公司 | Method for implementing FPGA multi-path downloading configuration in server system |
| CN104050006A (en) * | 2014-07-02 | 2014-09-17 | 曙光信息产业(北京)有限公司 | Updating system and updating method of FPGA |
| CN104636168A (en) * | 2015-02-09 | 2015-05-20 | 南京国电南自美卓控制系统有限公司 | SOC FPGA online upgrading method based on MLVDS buses |
| CN106201590A (en) * | 2016-06-29 | 2016-12-07 | 瑞斯康达科技发展股份有限公司 | A kind of FPGA configuration file loading method and system |
| CN106528244A (en) * | 2016-11-25 | 2017-03-22 | 迈普通信技术股份有限公司 | Automatic loading system and method of FPGA (Field-Programmable Gate Array) configuration file |
| CN106528234A (en) * | 2016-11-10 | 2017-03-22 | 深圳市紫光同创电子有限公司 | Remote upgrading method and apparatus |
| CN107357619A (en) * | 2017-07-07 | 2017-11-17 | 广州视源电子科技股份有限公司 | A kind of generation method, device, equipment and the storage medium of board configuration file |
| CN108572835A (en) * | 2018-04-26 | 2018-09-25 | 南京国电南自维美德自动化有限公司 | A kind of FPGA configuration file online upgrade system |
| WO2019084916A1 (en) * | 2017-11-03 | 2019-05-09 | 华为技术有限公司 | Method and system for recovering logic in fpga chip, and fpga apparatus |
| CN110909394A (en) * | 2019-11-24 | 2020-03-24 | 苏州浪潮智能科技有限公司 | Configuration file monitoring method of server |
| CN111104362A (en) * | 2019-12-24 | 2020-05-05 | 海光信息技术有限公司 | Device and method for configuring field programmable gate array and field programmable gate array |
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Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103970565A (en) * | 2014-04-24 | 2014-08-06 | 浪潮电子信息产业股份有限公司 | Method for implementing FPGA multi-path downloading configuration in server system |
| CN104050006A (en) * | 2014-07-02 | 2014-09-17 | 曙光信息产业(北京)有限公司 | Updating system and updating method of FPGA |
| CN104636168A (en) * | 2015-02-09 | 2015-05-20 | 南京国电南自美卓控制系统有限公司 | SOC FPGA online upgrading method based on MLVDS buses |
| CN106201590B (en) * | 2016-06-29 | 2019-06-11 | 瑞斯康达科技发展股份有限公司 | A kind of FPGA configuration file loading method and system |
| CN106201590A (en) * | 2016-06-29 | 2016-12-07 | 瑞斯康达科技发展股份有限公司 | A kind of FPGA configuration file loading method and system |
| CN106528234A (en) * | 2016-11-10 | 2017-03-22 | 深圳市紫光同创电子有限公司 | Remote upgrading method and apparatus |
| CN106528234B (en) * | 2016-11-10 | 2019-09-13 | 深圳市紫光同创电子有限公司 | A kind of remote upgrade method and device |
| CN106528244A (en) * | 2016-11-25 | 2017-03-22 | 迈普通信技术股份有限公司 | Automatic loading system and method of FPGA (Field-Programmable Gate Array) configuration file |
| CN106528244B (en) * | 2016-11-25 | 2019-05-03 | 迈普通信技术股份有限公司 | FPGA configuration file auto-loading system and method |
| CN107357619A (en) * | 2017-07-07 | 2017-11-17 | 广州视源电子科技股份有限公司 | A kind of generation method, device, equipment and the storage medium of board configuration file |
| CN107357619B (en) * | 2017-07-07 | 2020-06-26 | 广州视源电子科技股份有限公司 | Method, device, equipment and storage medium for generating card configuration file |
| WO2019084916A1 (en) * | 2017-11-03 | 2019-05-09 | 华为技术有限公司 | Method and system for recovering logic in fpga chip, and fpga apparatus |
| CN108572835A (en) * | 2018-04-26 | 2018-09-25 | 南京国电南自维美德自动化有限公司 | A kind of FPGA configuration file online upgrade system |
| CN110909394A (en) * | 2019-11-24 | 2020-03-24 | 苏州浪潮智能科技有限公司 | Configuration file monitoring method of server |
| CN111104362A (en) * | 2019-12-24 | 2020-05-05 | 海光信息技术有限公司 | Device and method for configuring field programmable gate array and field programmable gate array |
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