CN113127302A - Method and device for monitoring GPIO (general purpose input/output) of board card - Google Patents
Method and device for monitoring GPIO (general purpose input/output) of board card Download PDFInfo
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- CN113127302A CN113127302A CN202110412788.7A CN202110412788A CN113127302A CN 113127302 A CN113127302 A CN 113127302A CN 202110412788 A CN202110412788 A CN 202110412788A CN 113127302 A CN113127302 A CN 113127302A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3027—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention discloses a method and a device for monitoring GPIO of a board, wherein the method comprises the following steps: the GPIO bus is connected to a GPIO pin of the board card to acquire and monitor the GPIO state; responding to the obtained or monitored GPIO state change, and caching the GPIO state into a register corresponding to the GPIO pin; in response to receiving the I2C read command of the baseboard management controller, the GPIO state in the register is fed back to the I2C interface of the baseboard management controller through the I2C bus. The invention can reduce the monitoring pin requirement of BMC, release the mainboard space and reduce the hardware cost.
Description
Technical Field
The invention relates to the field of computers, in particular to a method and a device for monitoring a GPIO (general purpose input/output) of a board card.
Background
The hardware board of the server often has many GPIO (general purpose input output) pins to be used for controlling logic and monitoring the system status, and these GPIO pins are almost individually used for monitoring whether the system status is the whole system status, between ICs (integrated circuit chips), between system boards, or between ICs and system boards, and even the BMC (baseboard management controller) is used for monitoring the status of each IC and system board. However, the general BMC needs to manage all information on the monitor board and control system logic, etc., which may cause insufficient use of the pins in the server.
In the prior art, to solve the problem, a plurality of IO expanders (input/output expansion chips) are often added, and the BMC controls the plurality of input/output expansion chips through an I2C (internal integrated circuit bus) mode to complement GPIO pins insufficient by the BMC. Meanwhile, some similar monitoring states can be removed, for example, if there are many small system boards on the board, each system board has its own multiple monitoring signals, so that when there are insufficient pins to be used, and when there is insufficient space on the board to place the input/output expansion chip, there is often a trade-off. Another way is to change the design on the simplified system board, assuming that a certain signal on the system board occupies 10 pins, but if the 10 pins need to be monitored individually, the BMC needs 10 pins of GPIO. The design on the system board is simplified, and one of the 10 pins is pulled to the BMC in a wired and mode for monitoring, so that when a signal changes, the BMC can only know that a problem exists in a system card and cannot know which pin is the problem.
Aiming at the problems that the GPIO pins of the BMC in the prior art are insufficient in number and the input/output expansion chip occupies too large mainboard space, no effective solution is available at present.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide a method and a device for monitoring a board GPIO, which can reduce the requirement of a BMC monitoring pin, release the board space, and reduce the hardware cost.
Based on the above purpose, a first aspect of the embodiments of the present invention provides a method for monitoring a board GPIO, which includes using a complex programmable logic device to perform the following steps:
the GPIO bus is connected to a GPIO pin of the board card to acquire and monitor the GPIO state;
responding to the obtained or monitored GPIO state change, and caching the GPIO state into a register corresponding to the GPIO pin;
in response to receiving the I2C read command of the baseboard management controller, the GPIO state in the register is fed back to the I2C interface of the baseboard management controller through the I2C bus.
In some embodiments, the complex programmable logic device includes a plurality of local GPIO pins; the GPIO pin connected to the board through the GPIO bus comprises: and respectively connecting a plurality of local GPIO pins of the complex programmable logic device to a plurality of GPIO pins of a plurality of boards to be monitored by the substrate management controller.
In some embodiments, after buffering the GPIO state into a register corresponding to the GPIO pin, the complex programmable logic device also performs logic-based preprocessing of the GPIO state to obtain a preprocessing result.
In some embodiments, the pre-processing result is fed back together with the GPIO state in the register through the I2C bus to the I2C interface of the baseboard management controller.
In some embodiments, the I2C interface for feeding back GPIO states in registers to the baseboard management controller via the I2C bus comprises: the I2C read instruction is converted to a GPIO read instruction using firmware within the complex programmable logic device and the register is accessed using the GPIO read instruction to read the GPIO state.
A second aspect of an embodiment of the present invention provides an apparatus, including:
a substrate management controller and a board card; and
the complex programmable logic device is connected to the substrate management controller and the board card and stores executable program codes, and when the complex programmable logic device runs the program codes, the complex programmable logic device executes the following steps:
the GPIO bus is connected to a GPIO pin of the board card to acquire and monitor the GPIO state;
responding to the obtained or monitored GPIO state change, and caching the GPIO state into a register corresponding to the GPIO pin;
in response to receiving the I2C read command of the baseboard management controller, the GPIO state in the register is fed back to the I2C interface of the baseboard management controller through the I2C bus.
In some embodiments, the complex programmable logic device includes a plurality of local GPIO pins; the GPIO pin connected to the board through the GPIO bus comprises: and respectively connecting a plurality of local GPIO pins of the complex programmable logic device to a plurality of GPIO pins of a plurality of boards to be monitored by the substrate management controller.
In some embodiments, after buffering the GPIO state into a register corresponding to the GPIO pin, the complex programmable logic device also performs logic-based preprocessing of the GPIO state to obtain a preprocessing result.
In some embodiments, the pre-processing result is fed back together with the GPIO state in the register through the I2C bus to the I2C interface of the baseboard management controller.
In some embodiments, the I2C interface for feeding back GPIO states in registers to the baseboard management controller via the I2C bus comprises: the I2C read instruction is converted to a GPIO read instruction using firmware within the complex programmable logic device and the register is accessed using the GPIO read instruction to read the GPIO state.
The invention has the following beneficial technical effects: the method and the device for monitoring the GPIO of the board card provided by the embodiment of the invention are connected to the GPIO pin of the board card through the GPIO bus so as to acquire and monitor the GPIO state; responding to the obtained or monitored GPIO state change, and caching the GPIO state into a register corresponding to the GPIO pin; in response to the I2C reading instruction received by the baseboard management controller, the GPIO state in the register is fed back to the I2C interface of the baseboard management controller through the I2C bus, so that the monitoring pin requirement of BMC can be reduced, the mainboard space is released, and the hardware cost is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic flow diagram of a monitoring method for a board GPIO provided by the present invention;
fig. 2 is a schematic connection relationship diagram of the board GPIO monitoring method provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
Based on the above purpose, a first aspect of the embodiments of the present invention provides an embodiment of a board GPIO monitoring method that reduces the monitoring pin requirement of the BMC, releases the motherboard space, and reduces the hardware cost. Fig. 1 is a schematic flow diagram illustrating a monitoring method for a board GPIO provided by the present invention.
The monitoring method of the board GPIO, as shown in FIG. 1, includes using a complex programmable logic device to execute the following steps:
step S101, connecting to a GPIO pin of a board card through a GPIO bus to acquire and monitor a GPIO state;
step S103, responding to the obtained or monitored GPIO state change, and caching the GPIO state into a register corresponding to the GPIO pin;
in step S105, in response to receiving the I2C read command of the bmc, the GPIO status in the register is fed back to the I2C interface of the bmc through the I2C bus.
The invention does not use a plurality of IO expanders, but the GPIO pin of the System card is connected to the GPIO of the CPLD (complex programmable logic device), and the BMC monitors the GPIO of the card in a mode of I2C. After the GPIOs of the boards are pulled to the CPLD, the CPLD can also analyze and preprocess the signals, for example, determine that the GPIOs of the boards are triggered several times or be used for other logic control in the CPLD, and so on, which not only saves space and cost, but also can utilize the CPLD to preprocess and monitor the status.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like. Embodiments of the computer program may achieve the same or similar effects as any of the preceding method embodiments to which it corresponds.
In some embodiments, the complex programmable logic device includes a plurality of local GPIO pins; the GPIO pin connected to the board through the GPIO bus comprises: and respectively connecting a plurality of local GPIO pins of the complex programmable logic device to a plurality of GPIO pins of a plurality of boards to be monitored by the substrate management controller.
In some embodiments, after buffering the GPIO state into a register corresponding to the GPIO pin, the complex programmable logic device also performs logic-based preprocessing of the GPIO state to obtain a preprocessing result.
In some embodiments, the pre-processing result is fed back together with the GPIO state in the register through the I2C bus to the I2C interface of the baseboard management controller.
In some embodiments, the I2C interface for feeding back GPIO states in registers to the baseboard management controller via the I2C bus comprises: the I2C read instruction is converted to a GPIO read instruction using firmware within the complex programmable logic device and the register is accessed using the GPIO read instruction to read the GPIO state.
The following further illustrates embodiments of the invention in accordance with the specific example shown in fig. 2. Referring to fig. 2, wherein 1 is BMC for monitoring, 4 is CPLD for switching GPIO pin, and BMC and CPLD are connected through I2C bus. 2 and 3 are cards (not limited to two but more) that are all connected to the same CPLD using a GPIO bus, the CPLD having enough GPIO pins and having a much smaller volume than the multiple input-output expansion chips.
After the power-on time sequence of the BMC and the board is completed, the BMC starts to monitor the CPLD in an I2C mode, the GPIO state of the board can be changed at any time and is transmitted to the CPLD, the BMC can know the GPIO state of the board through an I2C mode, in addition, the CPLD can also analyze the situation of the GPIO additionally, for example, the GPIO of the board is triggered for several times, and the BMC can also know the GPIO state of the board after the CPLD is processed. In the CPLD modes, GPIO of the board can be stored in a register, and I2C to GPIO is generated by using firmware of the CPLD, so that the BMC can know the state of the register in the CPLD directly through an I2C mode and then can know the state of the GPIO of the board.
It can be seen from the foregoing embodiment that, in the monitoring method for the board GPIO provided in the embodiment of the present invention, the GPIO bus is connected to the GPIO pin of the board by using the complex programmable logic device, so as to acquire and monitor the GPIO state; responding to the obtained or monitored GPIO state change, and caching the GPIO state into a register corresponding to the GPIO pin; in response to the I2C reading instruction received by the baseboard management controller, the GPIO state in the register is fed back to the I2C interface of the baseboard management controller through the I2C bus, so that the monitoring pin requirement of BMC can be reduced, the mainboard space is released, and the hardware cost is reduced.
It should be particularly noted that, in each embodiment of the monitoring method for the board GPIO, each step may be intersected, replaced, added, or deleted, and therefore, the monitoring method for the board GPIO based on the reasonable permutation and combination conversion shall also belong to the protection scope of the present invention, and shall not limit the protection scope of the present invention to the embodiment.
Based on the above purpose, a second aspect of the embodiment of the present invention provides an embodiment of a board GPIO monitoring device that reduces the monitoring pin requirement of the BMC, frees up the motherboard space, and reduces the hardware cost. The device comprises:
a substrate management controller and a board card; and
the complex programmable logic device is connected to the substrate management controller and the board card and stores executable program codes, and when the complex programmable logic device runs the program codes, the complex programmable logic device executes the following steps:
the GPIO bus is connected to a GPIO pin of the board card to acquire and monitor the GPIO state;
responding to the obtained or monitored GPIO state change, and caching the GPIO state into a register corresponding to the GPIO pin;
in response to receiving the I2C read command of the baseboard management controller, the GPIO state in the register is fed back to the I2C interface of the baseboard management controller through the I2C bus.
In some embodiments, the complex programmable logic device includes a plurality of local GPIO pins; the GPIO pin connected to the board through the GPIO bus comprises: and respectively connecting a plurality of local GPIO pins of the complex programmable logic device to a plurality of GPIO pins of a plurality of boards to be monitored by the substrate management controller.
In some embodiments, after buffering the GPIO state into a register corresponding to the GPIO pin, the complex programmable logic device also performs logic-based preprocessing of the GPIO state to obtain a preprocessing result.
In some embodiments, the pre-processing result is fed back together with the GPIO state in the register through the I2C bus to the I2C interface of the baseboard management controller.
In some embodiments, the I2C interface for feeding back GPIO states in registers to the baseboard management controller via the I2C bus comprises: the I2C read instruction is converted to a GPIO read instruction using firmware within the complex programmable logic device and the register is accessed using the GPIO read instruction to read the GPIO state.
It can be seen from the foregoing embodiments that, in the monitoring device for the board GPIO provided in the embodiments of the present invention, the GPIO bus is connected to the GPIO pin of the board by using the complex programmable logic device, so as to acquire and monitor the GPIO state; responding to the obtained or monitored GPIO state change, and caching the GPIO state into a register corresponding to the GPIO pin; in response to the I2C reading instruction received by the baseboard management controller, the GPIO state in the register is fed back to the I2C interface of the baseboard management controller through the I2C bus, so that the monitoring pin requirement of BMC can be reduced, the mainboard space is released, and the hardware cost is reduced.
It should be particularly noted that, the above-mentioned embodiment of the apparatus adopts the embodiment of the monitoring method for the board GPIO to specifically describe the working process of each module, and those skilled in the art can easily think that these modules are applied to other embodiments of the monitoring method for the board GPIO. Of course, since the steps in the embodiment of the method for monitoring the GPIO board may be mutually intersected, replaced, added, or deleted, these reasonable permutations and combinations should also belong to the scope of the present invention, and should not limit the scope of the present invention to the embodiment.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of an embodiment of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. The monitoring method of the GPIO of the board is characterized by comprising the following steps of using a complex programmable logic device to execute:
connecting the complex programmable logic device to a GPIO pin of a board card through a GPIO bus to acquire and monitor the GPIO state;
in response to obtaining or monitoring that the GPIO state changes, caching the GPIO state into a register corresponding to the GPIO pin;
and in response to receiving an I2C read command of a baseboard management controller, feeding back the GPIO state in the register to an I2C interface of the baseboard management controller through an I2C bus.
2. The method of claim 1, wherein the complex programmable logic device comprises a plurality of local GPIO pins; the GPIO pin connected to the board through the GPIO bus comprises: and respectively connecting the plurality of local GPIO pins of the complex programmable logic device to a plurality of GPIO pins of a plurality of boards to be monitored by the substrate management controller.
3. The method of claim 1, wherein after buffering the GPIO state into a register corresponding to the GPIO pin, the complex programmable logic device further performs logic-based preprocessing of the GPIO state to obtain a preprocessing result.
4. The method of claim 3, wherein the GPIO status in the register is fed back to the I2C interface of the baseboard management controller via an I2C bus, and the pre-processing result is fed back together.
5. The method of claim 1, wherein feeding back the GPIO states in the registers to an I2C interface of the baseboard management controller via an I2C bus comprises: converting the I2C read instruction to a GPIO read instruction using firmware within the complex programmable logic device and accessing the register to read the GPIO state using the GPIO read instruction.
6. The utility model provides a monitoring device of board GPIO which characterized in that includes:
the substrate management controller and the board card; and
a complex programmable logic device connected to the baseboard management controller and the board, and storing executable program code, wherein the complex programmable logic device executes the following steps when executing the program code:
the GPIO bus is connected to a GPIO pin of the board card to acquire and monitor the GPIO state;
in response to obtaining or monitoring that the GPIO state changes, caching the GPIO state into a register corresponding to the GPIO pin;
and in response to receiving an I2C read command of a baseboard management controller, feeding back the GPIO state in the register to an I2C interface of the baseboard management controller through an I2C bus.
7. The apparatus of claim 6, wherein the complex programmable logic device comprises a plurality of local GPIO pins; the GPIO pin connected to the board through the GPIO bus comprises: and respectively connecting the plurality of local GPIO pins of the complex programmable logic device to a plurality of GPIO pins of a plurality of boards to be monitored by the substrate management controller.
8. The apparatus of claim 6, wherein after buffering the GPIO state into a register corresponding to the GPIO pin, the complex programmable logic device further performs logic-based preprocessing of the GPIO state to obtain a preprocessing result.
9. The apparatus of claim 8, wherein the pre-processing result is fed back together with the GPIO status in the register via an I2C bus to an I2C interface of the baseboard management controller.
10. The apparatus of claim 6, wherein the I2C interface to feed back the GPIO states in the registers to the baseboard management controller through an I2C bus comprises: converting the I2C read instruction to a GPIO read instruction using firmware within the complex programmable logic device and accessing the register to read the GPIO state using the GPIO read instruction.
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| CN114562473A (en) * | 2022-01-28 | 2022-05-31 | 山东云海国创云计算装备产业创新中心有限公司 | Fan control method, device, equipment and medium |
| CN114721900A (en) * | 2022-03-18 | 2022-07-08 | 北京百度网讯科技有限公司 | Connection relation establishing method, mainboard, device, equipment and storage medium |
| CN114860635A (en) * | 2022-07-07 | 2022-08-05 | 北京智芯半导体科技有限公司 | General input/output interface control method, device, storage medium and circuit board |
| CN116149957A (en) * | 2023-04-19 | 2023-05-23 | 湖南博匠信息科技有限公司 | Method for saving server power-on and power-off records through BMC |
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