CN110780932A - Working mode switching method and device of PCIE switching chip - Google Patents
Working mode switching method and device of PCIE switching chip Download PDFInfo
- Publication number
- CN110780932A CN110780932A CN201910919324.8A CN201910919324A CN110780932A CN 110780932 A CN110780932 A CN 110780932A CN 201910919324 A CN201910919324 A CN 201910919324A CN 110780932 A CN110780932 A CN 110780932A
- Authority
- CN
- China
- Prior art keywords
- working mode
- mode
- chip
- pcie
- pcie switching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4403—Processor initialisation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Stored Programmes (AREA)
Abstract
The invention discloses a method and a device for switching working modes of a PCIE switching chip, which respond to the received working mode switching instruction and sequentially execute the following steps: the input/output expander is used for latching the configuration information of the old working mode and outputting a high level to a corresponding configuration pin of the PCIE switching chip; sending firmware data of a new working mode to the PCIE switching chip, and writing the firmware data of the new working mode into the nonvolatile memory through the serial external equipment interface; restarting all the devices in case of power failure, latching the configuration information of the new working mode by using the input-output expander and outputting a high level to a corresponding configuration pin of the new working mode of the PCIE switching chip; and reading and loading the solid data of the new working mode from the nonvolatile memory through the serial external device interface by using the PCIE switching chip so as to work in the new working mode. The invention can lock the working mode in the BMC initialization process to improve the working stability of the equipment, and simultaneously reduces the interface occupation of the BMC to optimize BMC resources and board layout space.
Description
Technical Field
The present invention relates to the field of computers, and in particular, to a method and an apparatus for switching operating modes of a PCIE switch chip.
Background
With the rapid development of the field of Artificial Intelligence (AI), the market demand for GPU (graphics processor) servers is also increasing. At present, it is a trend to integrate multiple GPU devices in a system, and the number of PCIE (peripheral component interconnect express) ports of host is limited, direct host interconnection cannot be extended to more devices, and the application scenario has no flexibility. In order to expand more GPU devices and meet the working requirements of different scenes, the prior art uses a PCIE switch chip to solve the problem.
In the prior art, a GPIO (general purpose input/output) of a BMC (substrate controller) is used for directly controlling a high level and a low level of a strap pin (configuration pin) of a PCIE switching chip, and the GPIO of the BMC is required for controlling again after the system is restarted after power failure; and the initialization time of the BMC lasts about tens of seconds, and if the system is started up in this period, the BMC is not initialized successfully, the GPIO of the BMC is in an uncontrolled state, so that the strap pin of the PCIE switching chip is also in an indefinite state, and the BMC cannot work in a preset working mode. In addition, BMC directly configures strap pins of a PCIE switching chip through GPIO and updates firmware to occupy more IO interfaces, and some board cards do not have BMC chips, the IO interfaces need to be introduced from other external board cards through a connector, more IO interfaces occupy more resources of BMC, the connector also needs to have more strap pins, and the connector is large in size, so that more board card space is occupied.
Aiming at the problems that the PCIE switching chip is out of control and the BMC interface is tense when the BMC is restarted in the prior art, no effective solution is available at present.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide a method and an apparatus for switching a working mode of a PCIE switch chip, which can lock the working mode in a BMC initialization process to improve the working stability of a device, and reduce the interface occupation of the BMC to optimize BMC resources and board layout space.
Based on the above object, a first aspect of the embodiments of the present invention provides a method for switching operating modes of a PCIE switch chip, including the following steps executed in sequence in response to receiving an operating mode switching instruction:
the method comprises the steps that an input/output expander is used for latching configuration information of an old working mode sent by a substrate controller through an internal integrated circuit bus, and high level is continuously output to a corresponding configuration pin of the old working mode of a PCIE switching chip working in the old working mode;
sending firmware data of a new working mode to a PCIE switching chip by using a substrate controller through an internal integrated circuit bus, and writing the firmware data of the new working mode into a nonvolatile memory through a serial external equipment interface by using the PCIE switching chip;
restarting all the devices in case of power failure, latching the configuration information of the new working mode by using the input-output expander and outputting a high level to a corresponding configuration pin of the new working mode of the PCIE switching chip;
and reading and loading the solid data of the new working mode from the nonvolatile memory through the serial external device interface by using the PCIE switching chip so as to work in the new working mode.
In some embodiments, the input/output expander has four general-purpose input/output ports, and the four general-purpose input/output ports are electrically connected to the four operation mode configuration pins of the PCIE switch chip in a one-to-one correspondence.
In some embodiments, the PCIE switch chip has three operation modes, i.e., a basic mode, a virtual switch mode, and a fiber mode; the four working mode configuration pins correspond to the three working modes and an additional retention mode respectively.
In some embodiments, the input/output expander has a nonvolatile internal memory, and the configuration information of the old operation mode and the configuration information of the new operation mode are both latched in the nonvolatile internal memory.
In some embodiments, the PCIE switch chip is a PEX9797 chip or a PEX8749 chip provided by boston.
A second aspect of the present invention provides a device for switching operating modes of a PCIE switch chip, including:
a processor; and
a memory storing program code executable by the processor, the program code when executed in response to receiving an operating mode switch instruction sequentially performing the steps of:
the method comprises the steps that an input/output expander is used for latching configuration information of an old working mode sent by a substrate controller through an internal integrated circuit bus, and high level is continuously output to a corresponding configuration pin of the old working mode of a PCIE switching chip working in the old working mode;
sending firmware data of a new working mode to a PCIE switching chip by using a substrate controller through an internal integrated circuit bus, and writing the firmware data of the new working mode into a nonvolatile memory through a serial external equipment interface by using the PCIE switching chip;
restarting all the devices in case of power failure, latching the configuration information of the new working mode by using the input-output expander and outputting a high level to a corresponding configuration pin of the new working mode of the PCIE switching chip;
and reading and loading the solid data of the new working mode from the nonvolatile memory through the serial external device interface by using the PCIE switching chip so as to work in the new working mode.
In some embodiments, the input/output expander has four general-purpose input/output ports, and the four general-purpose input/output ports are electrically connected to the four operation mode configuration pins of the PCIE switch chip in a one-to-one correspondence.
In some embodiments, the PCIE switch chip has three operation modes, i.e., a basic mode, a virtual switch mode, and a fiber mode; the four working mode configuration pins correspond to the three working modes and an additional retention mode respectively.
In some embodiments, the input/output expander has a nonvolatile internal memory, and the configuration information of the old operation mode and the configuration information of the new operation mode are both latched in the nonvolatile internal memory.
In some embodiments, the PCIE switch chip is a PEX9797 chip or a PEX8749 chip provided by boston.
The invention has the following beneficial technical effects: according to the method and the device for switching the working modes of the PCIE switching chip provided by the embodiment of the invention, the configuration information of the old working mode sent by the substrate controller through the internal integrated circuit bus is latched by using the input/output expander, and a high level is continuously output to the corresponding configuration pin of the old working mode of the PCIE switching chip working in the old working mode; sending firmware data of a new working mode to a PCIE switching chip by using a substrate controller through an internal integrated circuit bus, and writing the firmware data of the new working mode into a nonvolatile memory through a serial external equipment interface by using the PCIE switching chip; restarting all the devices in case of power failure, latching the configuration information of the new working mode by using the input-output expander and outputting a high level to a corresponding configuration pin of the new working mode of the PCIE switching chip; according to the technical scheme, the PCIE switching chip is used for reading and loading the solid data of the new working mode from the nonvolatile memory through the serial external device interface so as to work in the new working mode, the working mode can be locked in the BMC initialization process so as to improve the working stability of the device, and meanwhile, the interface occupation of the BMC is reduced so as to optimize BMC resources and board layout space.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic flow chart of a working mode switching method of a PCIE switch chip provided in the present invention;
FIG. 2 is a schematic diagram of a prior art operating mode switching circuit;
fig. 3 is a schematic circuit diagram of an embodiment of a method for switching operating modes of a PCIE switch chip provided in the present invention;
fig. 4 is a schematic view of a working mode of a PEX9797 chip according to an embodiment of a method for switching a working mode of a PCIE switch chip provided in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
Based on the foregoing objective, a first aspect of the embodiments of the present invention provides an embodiment of a method for switching a working mode of a PCIE switch chip, where the method can improve the working stability of a device. Fig. 1 is a schematic flow chart illustrating a method for switching operating modes of a PCIE switch chip provided in the present invention.
As shown in fig. 1, the method for switching the operating mode of the PCIE switch chip includes, in response to receiving an operating mode switching instruction, sequentially performing the following steps:
step S101, an input/output expander is used for latching configuration information of an old working mode sent by a substrate controller through an internal integrated circuit bus, and high level is continuously output to a corresponding configuration pin of the old working mode of a PCIE switching chip working in the old working mode;
step S103, sending firmware data of a new working mode to the PCIE switching chip by using the substrate controller through the internal integrated circuit bus, and writing the firmware data of the new working mode into the nonvolatile memory through the serial external equipment interface by using the PCIE switching chip;
step S105, restarting all the devices in case of power failure, latching configuration information of a new working mode by using an input/output expander, and outputting a high level to a corresponding configuration pin of the new working mode of the PCIE switching chip;
step S107, using the PCIE switch chip to read and load the firmware data of the new operating mode from the nonvolatile memory through the serial external device interface to operate in the new operating mode.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like. Embodiments of the computer program may achieve the same or similar effects as any of the preceding method embodiments to which it corresponds.
In some embodiments, the input/output expander has four general-purpose input/output ports, and the four general-purpose input/output ports are electrically connected to the four operation mode configuration pins of the PCIE switch chip in a one-to-one correspondence.
In some embodiments, the PCIE switch chip has three operation modes, namely a basic mode, a virtual switch mode, and a fabric mode (fabric mode); the four working mode configuration pins correspond to the three working modes and an additional retention mode respectively.
In some embodiments, the input/output expander has a nonvolatile internal memory, and the configuration information of the old operation mode and the configuration information of the new operation mode are both latched in the nonvolatile internal memory.
In some embodiments, the PCIE switch chip is a PEX9797 chip or a PEX8749 chip provided by boston.
The method disclosed according to an embodiment of the present invention may also be implemented as a computer program executed by a CPU, which may be stored in a computer-readable storage medium. The computer program, when executed by the CPU, performs the above-described functions defined in the method disclosed in the embodiments of the present invention. The above-described method steps and system elements may also be implemented using a controller and a computer-readable storage medium for storing a computer program for causing the controller to implement the functions of the above-described steps or elements.
The following further illustrates embodiments of the invention in terms of specific examples.
The method used in the prior art is shown in fig. 2: the high and low levels of the trap pin are realized by controlling the MOS tube through the GPIO of the BMC, when the GPIO0 of the BMC is high level, the MOS tube Q0 is opened, and the strap0 is grounded through the Q0 and is low level; when GPIO0 is low, MOS transistor Q0 is turned off, and strap0 is pulled up to VCC through resistor R0, which is high. 9797 when the firmware needs to be updated, the BMC controls the MUX chip to switch the EEPROM to the SPI interface of the BMC through the GPIO4, and the BMC refreshes the firmware of the corresponding working mode to the EERPOM; after the refreshing is finished, the BMC controls the MUX chip to return the EEPROM to the SPI interface of 9797, and 9797 works in a new mode after the power is turned on again. According to the scheme, in the BMC initialization process, when the system is started, the 9797 chip cannot work in a set mode, and more BMC IO resources and board layout space are occupied.
In the embodiment of the invention, an IO expander (input/output expander) chip is added between the BMC and the 9797, and the I2C interface of the 9797 is connected to the BMC. The IO expander chip is used for converting an I2C serial signal into a plurality of IO parallel signals, and internally integrating a power-down nonvolatile ROM, so that I2C information can be latched. When 9797strap pins need to be configured, the BMC sends strap pin configuration information to the IO expander chip through the I2C interface, the IO expander converts the information into parallel signals to drive high and low levels of corresponding GPIOs, and therefore the 9797strap pins connected with the IO expander chip are pulled to the state of corresponding levels to achieve the configuration of a 9797 working mode. When the firmware of the 9797 needs to be updated, the BMC can transparently transmit the firmware information to the SPI interface of the EEPROM hook through the I2C interface of the 9797 chip, so as to update the content in the EEPROM by controlling the 9797 chip. The 9797 chip and the IO expander of the embodiment of the invention are both hung under the BMC through the same group of I2C interfaces, so that IO resources of the BMC and board connector space are saved.
As shown in fig. 3, when the operation mode of 9797 needs to be updated, the operation mode to be switched is issued to the BMC through the web interface. The BMC sends 9797strap pin configuration information to the IO expander chip through an I2C interface; the IO expander chip converts the configuration information into parallel signals to control the corresponding GPIO, so that the strap pin level state of 9797 is controlled. The BMC transmits the firmware information corresponding to the working mode to the SPI interface through the 9797I2C interface inside the chip so as to update the firmware content in the EERPOM. After waiting for the system to restart, the 9797 chip samples the level state of the Strap pin and loads the firmware information from the EERPOM, thereby operating in the new mode. If power failure occurs, the BMC does not need to control the strap pin of 9797, the configuration information is latched into the IO expander chip, and the BMC does not need to update the IO expander chip until the next time the BMC needs to switch to another working mode.
As shown in FIG. 4, a PCIE switch chip employs a PEX9797 of broadcom. The 9797 chip has 6 device interfaces P0-P5 and 1 management interface P6. The chip has 3 working modes which respectively correspond to different working scenes, when a single host (any one of host0-host 2) works under a heavy load, more GPU equipment is needed to provide calculation support, all 3 GPU equipment under 9797 can be hung under the host, and the working mode is a base mode; when multiple hosts work under light load and have no information interaction with each other, a GPU device can be allocated to each host, that is, a 9797 chip is divided into 3 completely independent modules, and the mode is vs (virtual switch) mode; when multiple hosts exist in the system and need information interaction among the hosts, the port6 of 9797 can be externally connected with an MCU to manage the whole system, so as to realize full interconnection between the multiple hosts and the GPU, and the mode is a fabric mode. The use efficiency of the GPU equipment can be improved by adopting different modes in different application scenes, and the switching of the different modes requires the configuration of the high and low levels of a strap pin of a 9797 chip and the updating of firmware.
It can be seen from the foregoing embodiments that, in the method for switching operating modes of a PCIE switch chip provided in the embodiments of the present invention, the configuration information of the old operating mode sent by the substrate controller through the internal integrated circuit bus is latched by using the input/output expander, and a high level is continuously output to the corresponding configuration pin of the old operating mode of the PCIE switch chip operating in the old operating mode; sending firmware data of a new working mode to a PCIE switching chip by using a substrate controller through an internal integrated circuit bus, and writing the firmware data of the new working mode into a nonvolatile memory through a serial external equipment interface by using the PCIE switching chip; restarting all the devices in case of power failure, latching the configuration information of the new working mode by using the input-output expander and outputting a high level to a corresponding configuration pin of the new working mode of the PCIE switching chip; according to the technical scheme, the PCIE switching chip is used for reading and loading the solid data of the new working mode from the nonvolatile memory through the serial external device interface so as to work in the new working mode, the working mode can be locked in the BMC initialization process so as to improve the working stability of the device, and meanwhile, the interface occupation of the BMC is reduced so as to optimize BMC resources and board layout space.
It should be particularly noted that, in each embodiment of the method for switching the working mode of the PCIE switch chip, each step may be intersected, replaced, added, or deleted, so that the method for switching the working mode of the PCIE switch chip, which is transformed by reasonable permutation and combination, also belongs to the protection scope of the present invention, and the protection scope of the present invention should not be limited to the embodiment.
In view of the foregoing, a second aspect of the embodiments of the present invention provides an embodiment of a device for switching operating modes of a PCIE switch chip, where the device can improve the operating stability. The working mode switching device of the PCIE switching chip comprises:
a processor; and
a memory storing program code executable by the processor, the program code when executed in response to receiving an operating mode switch instruction sequentially performing the steps of:
the method comprises the steps that an input/output expander is used for latching configuration information of an old working mode sent by a substrate controller through an internal integrated circuit bus, and high level is continuously output to a corresponding configuration pin of the old working mode of a PCIE switching chip working in the old working mode;
sending firmware data of a new working mode to a PCIE switching chip by using a substrate controller through an internal integrated circuit bus, and writing the firmware data of the new working mode into a nonvolatile memory through a serial external equipment interface by using the PCIE switching chip;
restarting all the devices in case of power failure, latching the configuration information of the new working mode by using the input-output expander and outputting a high level to a corresponding configuration pin of the new working mode of the PCIE switching chip;
and reading and loading the solid data of the new working mode from the nonvolatile memory through the serial external device interface by using the PCIE switching chip so as to work in the new working mode.
In some embodiments, the input/output expander has four general-purpose input/output ports, and the four general-purpose input/output ports are electrically connected to the four operation mode configuration pins of the PCIE switch chip in a one-to-one correspondence.
In some embodiments, the PCIE switch chip has three operation modes, i.e., a basic mode, a virtual switch mode, and a fiber mode; the four working mode configuration pins correspond to the three working modes and an additional retention mode respectively.
In some embodiments, the input/output expander has a nonvolatile internal memory, and the configuration information of the old operation mode and the configuration information of the new operation mode are both latched in the nonvolatile internal memory.
In some embodiments, the PCIE switch chip is a PEX9797 chip or a PEX8749 chip provided by boston.
The various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
It can be seen from the foregoing embodiments that, in the working mode switching apparatus for a PCIE switch chip provided in the embodiments of the present invention, the configuration information of the old working mode sent by the substrate controller through the internal integrated circuit bus is latched by using the input/output expander, and a high level is continuously output to the corresponding configuration pin of the old working mode of the PCIE switch chip working in the old working mode; sending firmware data of a new working mode to a PCIE switching chip by using a substrate controller through an internal integrated circuit bus, and writing the firmware data of the new working mode into a nonvolatile memory through a serial external equipment interface by using the PCIE switching chip; restarting all the devices in case of power failure, latching the configuration information of the new working mode by using the input-output expander and outputting a high level to a corresponding configuration pin of the new working mode of the PCIE switching chip; according to the technical scheme, the PCIE switching chip is used for reading and loading the solid data of the new working mode from the nonvolatile memory through the serial external device interface so as to work in the new working mode, the working mode can be locked in the BMC initialization process so as to improve the working stability of the device, and meanwhile, the interface occupation of the BMC is reduced so as to optimize BMC resources and board layout space.
It is to be particularly noted that, in the embodiment of the device for switching operating modes of a PCIE switch chip, the embodiment of the method for switching operating modes of a PCIE switch chip is used to specifically describe the operating process of each module, and those skilled in the art can easily think that these modules are applied to other embodiments of the method for switching operating modes of a PCIE switch chip. Of course, since each step in the embodiment of the method for switching the working mode of the PCIE switch chip may be intersected, replaced, added, or deleted, these working mode switching devices that are reasonably arranged, combined, and transformed in the PCIE switch chip also belong to the protection scope of the present invention, and the protection scope of the present invention should not be limited to the embodiment.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items. The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, where the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of an embodiment of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A working mode switching method of a PCIE switching chip is characterized by comprising the following steps of responding to the received working mode switching instruction and executing the following steps in sequence:
the input/output expander is used for latching the configuration information of the old working mode sent by the substrate controller through an internal integrated circuit bus, and continuously outputting a high level to a corresponding configuration pin of the old working mode of the PCIE switching chip working in the old working mode;
sending firmware data of a new working mode to the PCIE switching chip by using the substrate controller through the internal integrated circuit bus, and writing the firmware data of the new working mode into a nonvolatile memory through a serial external device interface by using the PCIE switching chip;
restarting all the devices after power failure, latching the configuration information of the new working mode by using the input-output expander and outputting a high level to a corresponding configuration pin of the new working mode of the PCIE switching chip;
and reading and loading the solid-state data of the new working mode from the nonvolatile memory through the serial external device interface by using the PCIE switching chip so as to work in the new working mode.
2. The method of claim 1, wherein the input/output expander has four general purpose input/output ports, and the four general purpose input/output ports are electrically connected to four operation mode configuration pins of the PCIE switch chip in a one-to-one correspondence.
3. The method according to claim 2, wherein the PCIE switch chip has three operation modes, namely a basic mode, a virtual switch mode, and a fiber mode; the four working mode configuration pins correspond to the three working modes and an additional retention mode respectively.
4. The method of claim 1, wherein the input-output extender has a non-volatile internal memory, and wherein the configuration information of the old operating mode and the configuration information of the new operating mode are both latched in the non-volatile internal memory.
5. The method of claim 1, wherein the PCIE switching chip is a PEX9797 chip or a PEX8749 chip provided by Botong corporation.
6. A device for switching operating modes of a PCIE switching chip is characterized by comprising:
a processor; and
a memory storing program code executable by the processor, the program code when executed in response to receiving an operating mode switching instruction performing the following steps in sequence:
the input/output expander is used for latching the configuration information of the old working mode sent by the substrate controller through an internal integrated circuit bus, and continuously outputting a high level to a corresponding configuration pin of the old working mode of the PCIE switching chip working in the old working mode;
sending firmware data of a new working mode to the PCIE switching chip by using the substrate controller through the internal integrated circuit bus, and writing the firmware data of the new working mode into a nonvolatile memory through a serial external device interface by using the PCIE switching chip;
restarting all the devices after power failure, latching the configuration information of the new working mode by using the input-output expander and outputting a high level to a corresponding configuration pin of the new working mode of the PCIE switching chip;
and reading and loading the solid-state data of the new working mode from the nonvolatile memory through the serial external device interface by using the PCIE switching chip so as to work in the new working mode.
7. The apparatus of claim 6, wherein the input/output expander has four general purpose input/output ports, and the four general purpose input/output ports are electrically connected to the four operation mode configuration pins of the PCIE switching chip in a one-to-one correspondence.
8. The apparatus of claim 7, wherein the PCIE switch chip has three operation modes, a basic mode, a virtual switch mode, and a fiber mode; the four working mode configuration pins correspond to the three working modes and an additional retention mode respectively.
9. The apparatus of claim 6, wherein the input-output expander has a non-volatile internal memory, and wherein the configuration information of the old operating mode and the configuration information of the new operating mode are both latched in the non-volatile internal memory.
10. The apparatus of claim 6, wherein the PCIE switching chip is a PEX9797 chip or a PEX8749 chip provided by Botong corporation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910919324.8A CN110780932A (en) | 2019-09-26 | 2019-09-26 | Working mode switching method and device of PCIE switching chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910919324.8A CN110780932A (en) | 2019-09-26 | 2019-09-26 | Working mode switching method and device of PCIE switching chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110780932A true CN110780932A (en) | 2020-02-11 |
Family
ID=69384372
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910919324.8A Withdrawn CN110780932A (en) | 2019-09-26 | 2019-09-26 | Working mode switching method and device of PCIE switching chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110780932A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113064722A (en) * | 2021-03-12 | 2021-07-02 | 山东英信计算机技术有限公司 | Display card resource allocation switching method and system |
| CN114020682A (en) * | 2021-10-18 | 2022-02-08 | 爱芯元智半导体(上海)有限公司 | Chip working mode control method and device, chip and storage medium |
| CN114185603A (en) * | 2021-11-08 | 2022-03-15 | 深圳云天励飞技术股份有限公司 | Control method of intelligent accelerator card, server and intelligent accelerator card |
| CN114253625A (en) * | 2021-11-29 | 2022-03-29 | 山东云海国创云计算装备产业创新中心有限公司 | PCIe Switch chip working mode switching method, system, storage medium and device |
| WO2022148072A1 (en) * | 2021-01-07 | 2022-07-14 | 苏州浪潮智能科技有限公司 | Pcie switch working mode updating method and related assembly |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108108324A (en) * | 2018-03-02 | 2018-06-01 | 山东超越数控电子股份有限公司 | A kind of PCIE extended methods and device |
| CN109032062A (en) * | 2018-08-29 | 2018-12-18 | 郑州云海信息技术有限公司 | A kind of PCIE switching chip |
| CN109766221A (en) * | 2019-01-09 | 2019-05-17 | 郑州云海信息技术有限公司 | A kind of BMC mirror image switch method and apparatus |
-
2019
- 2019-09-26 CN CN201910919324.8A patent/CN110780932A/en not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108108324A (en) * | 2018-03-02 | 2018-06-01 | 山东超越数控电子股份有限公司 | A kind of PCIE extended methods and device |
| CN109032062A (en) * | 2018-08-29 | 2018-12-18 | 郑州云海信息技术有限公司 | A kind of PCIE switching chip |
| CN109766221A (en) * | 2019-01-09 | 2019-05-17 | 郑州云海信息技术有限公司 | A kind of BMC mirror image switch method and apparatus |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022148072A1 (en) * | 2021-01-07 | 2022-07-14 | 苏州浪潮智能科技有限公司 | Pcie switch working mode updating method and related assembly |
| US11940941B2 (en) | 2021-01-07 | 2024-03-26 | Inspur Suzhou Intelligent Technology Co., Ltd. | PCIe switch working mode updating method and related assembly |
| CN113064722A (en) * | 2021-03-12 | 2021-07-02 | 山东英信计算机技术有限公司 | Display card resource allocation switching method and system |
| CN114020682A (en) * | 2021-10-18 | 2022-02-08 | 爱芯元智半导体(上海)有限公司 | Chip working mode control method and device, chip and storage medium |
| CN114185603A (en) * | 2021-11-08 | 2022-03-15 | 深圳云天励飞技术股份有限公司 | Control method of intelligent accelerator card, server and intelligent accelerator card |
| CN114185603B (en) * | 2021-11-08 | 2024-01-05 | 深圳云天励飞技术股份有限公司 | Control method of intelligent accelerator card, server and intelligent accelerator card |
| CN114253625A (en) * | 2021-11-29 | 2022-03-29 | 山东云海国创云计算装备产业创新中心有限公司 | PCIe Switch chip working mode switching method, system, storage medium and device |
| CN114253625B (en) * | 2021-11-29 | 2023-07-14 | 山东云海国创云计算装备产业创新中心有限公司 | PCIe Switch chip working mode switching method, system, storage medium and device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110780932A (en) | Working mode switching method and device of PCIE switching chip | |
| US9304788B2 (en) | Electronic device, configurable component and configuration information storage method thereof | |
| US10901927B2 (en) | Adaptive interface storage device with multiple storage protocols including NVME and NVME over fabrics storage devices | |
| US7836293B1 (en) | Accelerated deserialized boot implementation for a multiprocessor system | |
| CN106227683B (en) | Electronic equipment and information processing method | |
| US20120023320A1 (en) | Bios chip recovery system and computer thereof | |
| CN110083380A (en) | Firmware update and the electronic device for using the method | |
| CN105808290A (en) | Remote dynamic updating system and method for multi-FPGA complete machine systems | |
| GB2463809A (en) | Peripheral device operation method, peripheral device and host | |
| CN115562738B (en) | Port configuration method, component and hard disk expansion device | |
| CN110704365A (en) | Reconstruction device based on FPGA | |
| CN116737244A (en) | Method and device for starting multiple hardware domains of chip | |
| CN110399328B (en) | Control method and device for board-mounted graphics processor | |
| CN111813432A (en) | FPGA configuration upgrading method and FPGA platform | |
| CN113656076A (en) | BIOS starting method and device based on hardware multiplexing channel | |
| US20210089486A1 (en) | Information processing system and information processing method | |
| CN109725940A (en) | Method and computing system for computing system starting | |
| CN112667544A (en) | Method, device, system and medium for controlling mainboard slot enabling | |
| CN112564924B (en) | Computer expansion card and block chain terminal equipment | |
| CN211044232U (en) | IIC extension mode-based server data monitoring device and server | |
| CN110096366B (en) | Configuration method and device of heterogeneous memory system and server | |
| CN111176902A (en) | Device and method for backing up Controller Device firmware by using BMC Flash | |
| CN220829661U (en) | Baseboard management controller | |
| CN116431534B (en) | Data access method, switch and storage medium | |
| CN115422110B (en) | Port configuration method of electronic equipment and PCIE Switch chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20200211 |
|
| WW01 | Invention patent application withdrawn after publication |