CN108108324A - A kind of PCIE extended methods and device - Google Patents
A kind of PCIE extended methods and device Download PDFInfo
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- CN108108324A CN108108324A CN201810174592.7A CN201810174592A CN108108324A CN 108108324 A CN108108324 A CN 108108324A CN 201810174592 A CN201810174592 A CN 201810174592A CN 108108324 A CN108108324 A CN 108108324A
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- pcie
- bridge pieces
- slots
- signals
- speed bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
Abstract
The invention discloses a kind of PCIE extended methods and device, including：Switch is respectively connected to high-speed bus switching chip and embedded controller, and high-speed bus switching chip is connected to the x8 slots of PCIE；When switch is set as connecting using single x16 buses, embedded controller controls PCIE bridge pieces transfer out x16 signals to be sent by x16 slots, and high-speed bus switching chip does not work；When switch is set as connecting using two x8 buses, x16 signals to be sent are configured to two groups of x8 signals by embedded controller controls PCIE bridge pieces, and PCIE bridge pieces transfer out one group of x8 signal by x16 slots, another group of x8 signal is sent to high-speed bus switching chip by PCIE bridge pieces simultaneously, and high-speed bus switching chip is gone out another group of x8 signal transmission by x8 slots.The present invention can be directed to PCIE slots or different types of PCIE slots are extended switching on demand, and with relatively low cost.
Description
Technical field
The present invention relates to computer realm, and more particularly, to a kind of PCIE extended methods and device.
Background technology
In universal computing platform, the particularly design of home brewed computer platform, PCIE slots and bus LINE resources
In distribution in use, being present with the situation of resource anxiety.For example, platform uses an x16 slot sometimes, and use sometimes
The slot of two x8.If it needs two mainboards for two kinds of situations or introduces PCIE conversion chips, but the two cost is all very high.
For the problem of hot-swap PCIE is of high cost in the prior art, there has been no effective solutions at present.
The content of the invention
In view of this, the purpose of the embodiment of the present invention is to propose a kind of PCIE extended methods and device, can be directed to
PCIE slots or different types of PCIE slots are extended switching on demand, and with relatively low cost.
Based on above-mentioned purpose, the one side of the embodiment of the present invention provides a kind of PCIE extended methods, comprises the following steps：
Switch is respectively connected to high-speed bus switching chip and embedded controller, and high-speed bus switching chip is connected
It is connected to the x8 slots of PCIE；
When switch is set as connecting using single x16 buses, embedded controller controls PCIE bridge pieces will be to be sent
X16 signals are transferred out by x16 slots, and high-speed bus switching chip does not work；
When switch is set as connecting using two x8 buses, embedded controller controls PCIE bridge pieces will be to be sent
X16 signals are configured to two groups of x8 signals, and PCIE bridge pieces transfer out one group of x8 signal by x16 slots, while PCIE
Another group of x8 signal is sent to high-speed bus switching chip by bridge piece, and high-speed bus switches chip by x8 slots by another group of x8
Signal transmission is gone out.
In some embodiments, x16 signals to be sent are configured to two groups of x8 signals by PCIE bridge pieces, are PCIE bridge pieces
The x0-7 positions of x16 signals to be sent are configured to one group of x8 signal, the x8-15 positions of x16 signals to be sent are configured to separately
One group of x8 signal；Or the x8-15 positions of x16 signals to be sent are configured to one group of x8 signal by PCIE bridge pieces, by x16 to be sent
The x0-7 positions of signal are configured to another group of x8 signal.
In some embodiments, PCIE bridge pieces transfer out one group of x8 signal by x16 slots, are that PCIE bridge pieces will
The x8- that one group of x8 signal is transferred out by the x0-7 positions of x16 slots or one group of x8 signal is passed through x16 slots by PCIE bridge pieces
15 transfer out
In some embodiments, when switch is set as using two x8 buses, PCIE bridge pieces switch with high-speed bus
Chip synchronizes transmission or asynchronous transmission.
In some embodiments, switch is connected in the GPIO pin of embedded controller, when switch is set as using
High level is exported during single x16 buses, low level is exported when switch is set as using two x8 buses；Embedded controller connects
It is connected on the STRIP pins of PCIE bridge pieces.
In some embodiments, x0-7 with x8-15 can be slot or pin logic just sequentially ranking, logic
Opposite sequence ranks or preassigned NOT logic order ranks.
The another aspect of the embodiment of the present invention additionally provides a kind of PCIE expanding units, including：
High-speed bus switches chip, is connected to x8 slots；
PCIE bridge pieces are connected to high-speed bus switching chip and x16 slots；
Embedded controller is connected to PCIE bridge pieces；
Switch is connected to high-speed bus switching chip and embedded controller, is connected for configuring using single x16 buses
Or it is connected using two x8 buses；
Wherein, PCIE expanding units have used the above method.
The another aspect of the embodiment of the present invention additionally provides a kind of computer equipment, including memory, at least one processing
On a memory and the computer program that can run on a processor, when processor execution program, performs above-mentioned for device and storage
Method.
The another aspect of the embodiment of the present invention additionally provides a kind of computer readable storage medium, computer-readable storage
Media storage has computer program, and above-mentioned method is performed when computer program is executed by processor.
The another aspect of the embodiment of the present invention, additionally provides a kind of computer program product, and computer program product includes
The calculation procedure being stored on computer readable storage medium, calculation procedure include instruction, when executed by the processor, make
Computer performs the above method.
The present invention has following advantageous effects：PCIE extended methods and device provided in an embodiment of the present invention, pass through
Switch is respectively connected to high-speed bus switching chip and embedded controller, and high-speed bus switching chip is connected to PCIE
X8 slots, it is embedded when switch being set as connecting using single x16 buses with being set as connecting using two x8 buses
Controller is worked using different control mode control PCIE bridge pieces and transmits out signal by x8 slots or x16 slots respectively
The technological means gone can be directed to PCIE slots or different types of PCIE slots are extended switching on demand, and effectively drop
Low cost.
Description of the drawings
It in order to illustrate the technical solution of the embodiments of the present invention more clearly, below will be to the required attached drawing of embodiment
It is briefly described, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the present invention, general for this field
For logical technical staff, without creative efforts, other attached drawings are can also be obtained according to these attached drawings.
Fig. 1 is the flow diagram of PCIE extended methods provided by the invention；
Fig. 2 is the structure diagram of PCIE expanding units provided by the invention；
Fig. 3 is the hardware knot of one embodiment of the computer equipment provided by the invention for performing the PCIE extended methods
Structure schematic diagram.
Specific embodiment
Understand to make the object, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference
The embodiment of the present invention is further described in attached drawing.
It should be noted that all statements for using " first " and " second " are for differentiation two in the embodiment of the present invention
The non-equal entity of a same names or non-equal parameter, it is seen that " first " " second " should not only for the convenience of statement
The restriction to the embodiment of the present invention is interpreted as, following embodiment no longer illustrates this one by one.
Based on above-mentioned purpose, the first aspect of the embodiment of the present invention, it is proposed that a kind of PCIE extended methods.Fig. 1 is shown
Be PCIE extended methods provided by the invention flow diagram.
The PCIE extended methods, comprise the following steps：
Switch is respectively connected to high-speed bus switching chip and embedded controller by step S101, and by high-speed bus
Switching chip is connected to the x8 slots of PCIE；
Step S103, when switch is set as connecting using single x16 buses, embedded controller controls PCIE bridge pieces will
X16 signals to be sent are transferred out by x16 slots, and high-speed bus switching chip does not work；
Step S105, when switch is set as connecting using two x8 buses, embedded controller controls PCIE bridge pieces will
X16 signals to be sent are configured to two groups of x8 signals, and PCIE bridge pieces transfer out one group of x8 signal by x16 slots,
Another group of x8 signal is sent to high-speed bus switching chip by PCIE bridge pieces simultaneously, and high-speed bus switches chip will by x8 slots
Another group of x8 signal transmission is gone out.
In some embodiments, x16 signals to be sent are configured to two groups of x8 signals by PCIE bridge pieces, are PCIE bridge pieces
The x0-7 positions of x16 signals to be sent are configured to one group of x8 signal, the x8-15 positions of x16 signals to be sent are configured to separately
One group of x8 signal；Or the x8-15 positions of x16 signals to be sent are configured to one group of x8 signal by PCIE bridge pieces, by x16 to be sent
The x0-7 positions of signal are configured to another group of x8 signal.
Former x16 slots can emit x0-7 or x8-15 on demand, to improve the flexibility of PCIE extended methods in itself,
And compatible more specific demands.
In some embodiments, PCIE bridge pieces transfer out one group of x8 signal by x16 slots, are that PCIE bridge pieces will
The x8- that one group of x8 signal is transferred out by the x0-7 positions of x16 slots or one group of x8 signal is passed through x16 slots by PCIE bridge pieces
15 transfer out
Former x16 slots can be on demand in x0-7 or x8-15 transmittings, to improve PCIE extended methods flexible in itself
Property, and compatible more specific demands.
In some embodiments, when switch is set as using two x8 buses, PCIE bridge pieces switch with high-speed bus
Chip synchronizes transmission or asynchronous transmission.
In some embodiments, switch is connected in the GPIO pin of embedded controller, when switch is set as using
High level is exported during single x16 buses, low level is exported when switch is set as using two x8 buses；Embedded controller connects
It is connected on the STRIP pins of PCIE bridge pieces.
Wherein, optionally, low and high level can also be represented with the state of toggle switch, such as toggle switch is in the shape for 1
High level is exported under state, and low level is exported in the state of for 0.
In some embodiments, x0-7 with x8-15 can be slot or pin logic just sequentially ranking, logic
Opposite sequence ranks or preassigned NOT logic order ranks.
From above-described embodiment as can be seen that PCIE extended methods provided in an embodiment of the present invention, are connected respectively by that will switch
High-speed bus switching chip and embedded controller are connected to, and high-speed bus switching chip is connected to the x8 slots of PCIE, when
When switch being set as connecting using single x16 buses with being set as connecting using two x8 buses, embedded controller difference
The technology hand for working using different control mode control PCIE bridge pieces and transferring out signal by x8 slots or x16 slots
Section can be directed to PCIE slots or different types of PCIE slots are extended switching on demand, and effectively reduce cost.
It is important to note that each step in each embodiment of above-mentioned PCIE extended methods can be handed over mutually
It pitches, replace, increase, delete, therefore, these rational permutation and combination, which become, alternatively should also be as belonging to the present invention in PCIE extended methods
Protection domain, and protection scope of the present invention should not be confined on the embodiment.
Based on above-mentioned purpose, the second aspect of the embodiment of the present invention, it is proposed that a kind of PCIE expanding units.Fig. 2 is shown
Be PCIE expanding units provided by the invention module diagram.
The PCIE expanding units, including：
High-speed bus switches chip, is connected to x8 slots；
PCIE bridge pieces are connected to high-speed bus switching chip and x16 slots；
Embedded controller is connected to PCIE bridge pieces；
Switch is connected to high-speed bus switching chip and embedded controller, is connected for configuring using single x16 buses
Or it is connected using two x8 buses；
The PCIE expanding units have used above-mentioned PCIE extended methods.
From above-described embodiment as can be seen that PCIE expanding units provided in an embodiment of the present invention, are connected respectively by that will switch
High-speed bus switching chip and embedded controller are connected to, and high-speed bus switching chip is connected to the x8 slots of PCIE, when
When switch being set as connecting using single x16 buses with being set as connecting using two x8 buses, embedded controller difference
The technology hand for working using different control mode control PCIE bridge pieces and transferring out signal by x8 slots or x16 slots
Section can be directed to PCIE slots or different types of PCIE slots are extended switching on demand, and effectively reduce cost.
It is important to note that the embodiment of above-mentioned PCIE expanding units employs the implementation of the PCIE extended methods
Example illustrates the course of work of each module, and those skilled in the art can be it is readily conceivable that by these module applications to institute
In the other embodiment for stating PCIE extended methods.Certainly, due to each step in the PCIE extended methods embodiment
Intersecting, replacing, increasing, deleting, therefore, these rational permutation and combination become alternatively also should in the PCIE expanding units
When belonging to the scope of protection of the present invention, and protection scope of the present invention should not be confined on the embodiment.
Based on above-mentioned purpose, the 3rd aspect of the embodiment of the present invention, it is proposed that a kind of to perform the PCIE extended methods
Computer equipment one embodiment.
The computer equipment for performing the PCIE extended methods includes memory, at least one processor and storage
On a memory and the computer program that can run on a processor, processor perform any one above-mentioned side when performing program
Method.
As shown in figure 3, one embodiment for the computer equipment provided by the invention for performing the PCIE extended methods
Hardware architecture diagram.
By taking computer equipment as shown in Figure 3 as an example, include a processor 301 and one in the computer equipment
Memory 302, and can also include：Input unit 303 and output device 304.
Processor 301, memory 302, input unit 303 and output device 304 can pass through bus or other modes
It connects, in Fig. 3 exemplified by being connected by bus.
Memory 302 is used as a kind of non-volatile computer readable storage medium storing program for executing, available for storage non-volatile software journey
Sequence, non-volatile computer executable program and module, as the PCIE extended methods in the embodiment of the present application are corresponding
Program instruction/module.Processor 301 is by running non-volatile software program, instruction and the mould of storage in the memory 302
Block, the PCIE extension sides of various function application and data processing so as to execute server, i.e. realization above method embodiment
Method.
Memory 302 can include storing program area and storage data field, wherein, storing program area can store operation system
System, the required application program of at least one function；Storage data field can be stored to be created according to using for PCIE expanding units
Data etc..In addition, memory 302 can include high-speed random access memory, nonvolatile memory, example can also be included
Such as at least one disk memory, flush memory device or other non-volatile solid state memory parts.In some embodiments, deposit
Reservoir 302 is optional including compared with the remotely located memory of processor 301, these remote memories can pass through network connection
To local module.The example of above-mentioned network include but not limited to internet, intranet, LAN, mobile radio communication and its
Combination.
Input unit 303 can receive the number of input or character information and generate and the users of PCIE expanding units sets
It puts and the input of key signals that function control is related.Output device 304 may include the display devices such as display screen.
Corresponding program instruction/the module of one or more of PCIE extended methods is stored in the memory 302,
When being performed by the processor 301, the PCIE extended methods in above-mentioned any means embodiment are performed.
Any one embodiment of the computer equipment for performing the PCIE extended methods, can reach corresponding therewith
The identical or similar effect of foregoing any means embodiment.
Based on above-mentioned purpose, the 4th aspect of the embodiment of the present invention, it is proposed that a kind of computer readable storage medium, institute
Stating computer-readable recording medium storage has computer program, which can perform above-mentioned arbitrary when being executed by processor
PCIE extended methods in embodiment of the method are with realizing PCIE expanding units/system in above-mentioned any device/system embodiment.
The embodiment of the computer readable storage medium can reach corresponding foregoing any means and implement with device/system
The identical or similar effect of example.
Based on above-mentioned purpose, the 5th aspect of the embodiment of the present invention, it is proposed that a kind of computer program product, the calculating
Machine program product includes the calculation procedure being stored on computer readable storage medium, which includes instruction, when this
When instruction is computer-executed, the computer is made to perform the PCIE extended methods in above-mentioned any means embodiment above-mentioned with realizing
PCIE expanding units/system in any device/system embodiment.The embodiment of the computer program product can reach
The corresponding foregoing any means effect identical or similar with device/system embodiment.
Finally it should be noted that one of ordinary skill in the art will appreciate that realizing the whole in above-described embodiment method
Or part flow, it can be completed by computer program to instruct related hardware, the program can be stored in a computer
In read/write memory medium, the program is upon execution, it may include such as the flow of the embodiment of above-mentioned each method.Wherein, it is described
Storage medium can be magnetic disc, CD, read-only memory (Read-Only Memory, ROM) or random access memory
(Random Access Memory, RAM) etc..The embodiment of the computer program can reach corresponding foregoing
The identical or similar effect of embodiment of the method for anticipating.
In addition, typically, it can be various electric terminal equipments that the embodiment of the present invention, which discloses described device, equipment etc., example
Such as mobile phone, personal digital assistant (PDA), tablet computer (PAD), smart television or large-scale terminal device, such as service
Device etc., therefore protection domain disclosed by the embodiments of the present invention should not limit as certain certain types of device, equipment.It is of the invention real
It can be applied to above-mentioned arbitrary with the combining form of electronic hardware, computer software or both to apply example and disclose the client
In a kind of electric terminal equipment.
In addition, disclosed method is also implemented as the computer program performed by CPU according to embodiments of the present invention, it should
Computer program can store in a computer-readable storage medium.When the computer program is performed by CPU, the present invention is performed
The above-mentioned function of being limited in method disclosed in embodiment.
In addition, above method step and system unit can also utilize controller and for storing so that controller is real
The computer readable storage medium of the computer program of existing above-mentioned steps or Elementary Function is realized.
In addition, it should be appreciated that computer readable storage medium (for example, memory) as described herein can be volatile
Property memory or nonvolatile memory can include both volatile memory and nonvolatile memory.As example
And not restrictive, nonvolatile memory can include read-only memory (ROM), programming ROM (PROM), electrically programmable to son
ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory.Volatile memory can include arbitrary access
Memory (RAM), the RAM can serve as external cache.As an example and not restrictive, RAM can be with more
Kind form obtains, such as synchronous random access memory (DRAM), dynamic ram (DRAM), synchronous dram (SDRAM), double data rate SDRAM
(DDR SDRAM), enhancing SDRAM (ESDRAM), synchronization link DRAM (SLDRAM) and directly Rambus RAM (DRRAM).
The storage device of disclosed aspect is intended to the memory of including but not limited to these and other suitable type.
Those skilled in the art will also understand is that, with reference to the described various illustrative logical blocks of disclosure herein, mould
Block, circuit and algorithm steps may be implemented as the combination of electronic hardware, computer software or both.It is hard in order to clearly demonstrate
This interchangeability of part and software, with regard to various exemplary components, square, module, circuit and step function to its into
General description is gone.This function is implemented as software and is also implemented as hardware depending on concrete application and application
To the design constraint of whole system.Those skilled in the art can in various ways realize described for each concrete application
Function, but this realize determines to should not be interpreted as causing a departure from scope disclosed by the embodiments of the present invention.
It can utilize and be designed to reference to the described various illustrative logical blocks of disclosure herein, module and circuit
The following component of function described here is performed to realize or perform：General processor, digital signal processor (DSP), special collection
Into circuit (ASIC), field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, divide
Any combinations of vertical nextport hardware component NextPort or these components.General processor can be microprocessor, but alternatively, processing
Device can be any conventional processors, controller, microcontroller or state machine.Processor can also be implemented as computing device
Combination, for example, the combination of DSP and microprocessor, multi-microprocessor, one or more microprocessors combination DSP and/or any
Other this configurations.
It can be directly contained in hardware with reference to the step of described method of disclosure herein or algorithm, be held by processor
In capable software module or in combination of the two.Software module may reside within RAM memory, flash memory, ROM storages
Device, eprom memory, eeprom memory, register, hard disk, removable disk, CD-ROM or known in the art it is any its
In the storage medium of its form.Illustrative storage medium is coupled to processor so that processor can be from the storage medium
Middle reading information writes information to the storage medium.In an alternative, the storage medium can be with processor collection
Into together.Pocessor and storage media may reside in ASIC.ASIC may reside in user terminal.In a replacement
In scheme, pocessor and storage media can be resident in the user terminal as discrete assembly.
In one or more exemplary designs, the function can be real in hardware, software, firmware or its any combination
It is existing.If realized in software, can be stored in using the function as one or more instruction or code computer-readable
It is transmitted on medium or by computer-readable medium.Computer-readable medium includes computer storage media and communication media,
The communication media includes helping for computer program to be transmitted to any medium of another position from a position.Storage medium
It can be any usable medium that can be accessed by a general purpose or special purpose computer.As an example and not restrictive, the computer
Readable medium can include RAM, ROM, EEPROM, CD-ROM or other optical disc memory apparatus, disk storage equipment or other magnetic
Property storage device or can be used for carry storage form for instruction or data structure required program code and can
Any other medium accessed by universal or special computer or universal or special processor.In addition, any connection can
It is properly termed as computer-readable medium.If for example, use coaxial cable, optical fiber cable, twisted-pair feeder, digital subscriber line
(DSL) or such as wireless technology of infrared ray, radio and microwave to send software from website, server or other remote sources,
Then above-mentioned coaxial cable, optical fiber cable, twisted-pair feeder, DSL or such as wireless technology of infrared ray, radio and microwave are included in
The definition of medium.As used herein, disk and CD include compact disk (CD), laser disk, CD, digital versatile disc
(DVD), floppy disk, Blu-ray disc, wherein disk usually magnetically reproduce data, and CD reproduce data using laser optics.On
The combination for stating content should also be as being included in the range of computer-readable medium.
The above are exemplary embodiment disclosed by the invention, it should be noted that in the sheet limited without departing substantially from claim
On the premise of inventive embodiments scope of disclosure, it may be many modifications and change.According to open embodiment described herein
The function of claim to a method, step and/or action be not required to perform with any particular order.In addition, although the present invention is implemented
Element disclosed in example can be described or required in the form of individual, but be odd number unless explicitly limited, it is understood that be multiple.
It should be appreciated that it is used in the present context, unless context clearly supports exception, singulative " one
It is a " (" a ", " an ", " the ") be intended to also include plural form.It is to be further understood that "and/or" used herein is
Finger includes one or the arbitrary and all possible combinations of more than one project listed in association.
The embodiments of the present invention disclose that embodiment sequence number is for illustration only, do not represent the quality of embodiment.
One of ordinary skill in the art will appreciate that hardware can be passed through by realizing all or part of step of above-described embodiment
It completes, relevant hardware can also be instructed to complete by program, the program can be stored in a kind of computer-readable
In storage medium, storage medium mentioned above can be read-only memory, disk or CD etc..
Those of ordinary skills in the art should understand that：The discussion of any of the above embodiment is exemplary only, not
It is intended to imply that scope disclosed by the embodiments of the present invention is limited to these examples (including claim)；In the think of of the embodiment of the present invention
Under road, it can also be combined, and exist as described above between the technical characteristic in above example or different embodiments
Many other variations of the different aspect of the embodiment of the present invention, for simplicity, they are not provided in details.Therefore, it is all at this
Spiritual and any omission within principle, made, modification, equivalent substitution, improvement of inventive embodiments etc., should be included in this hair
Within the protection domain of bright embodiment.
Claims (10)
1. a kind of PCIE extended methods, which is characterized in that comprise the following steps：
Switch is respectively connected to high-speed bus switching chip and embedded controller, and high-speed bus switching chip is connected
It is connected to the x8 slots of PCIE；
When the switch is set as connecting using single x16 buses, the embedded controller controls PCIE bridge pieces will be pending
The x16 signals sent are transferred out by x16 slots, and high-speed bus switching chip does not work；
When the switch is set as connecting using two x8 buses, PCIE bridge pieces described in the embedded controller controls are by institute
It states x16 signals to be sent and is configured to two groups of x8 signals, and x8 signals described in one group are passed through the x16 by the PCIE bridge pieces
Slot transfers out, while x8 signals described in another group are sent to the high-speed bus and switch chip, institute by the PCIE bridge pieces
High-speed bus switching chip is stated x8 signal transmissions described in another group are gone out by the x8 slots.
2. according to the method described in claim 1, it is characterized in that, the PCIE bridge pieces match somebody with somebody the x16 signals to be sent
Two groups of x8 signals are set to, the x0-7 positions of the x16 signals to be sent are configured to one group of x8 for the PCIE bridge pieces believes
Number, the x8-15 positions of the x16 signals to be sent are configured to another group of x8 signal；Or the PCIE bridge pieces are by described in
The x8-15 positions of x16 signals to be sent are configured to one group of x8 signal, and the x0-7 positions of the x16 signals to be sent are matched somebody with somebody
It is set to another group of x8 signal.
3. according to the method described in claim 1, it is characterized in that, one group of x8 signal is passed through x16 by the PCIE bridge pieces
Slot transfers out, and transfers out one group of x8 signal or described by the x0-7 positions of x16 slots for the PCIE bridge pieces
PCIE bridge pieces transfer out one group of x8 signal by the x8-15 positions of x16 slots.
4. according to the method described in claim 1, it is characterized in that, when it is described switch be set as using two x8 buses when, institute
It states PCIE bridge pieces and synchronizes transmission or asynchronous transmission with high-speed bus switching chip.
5. according to the method described in any one in claim 1-4, which is characterized in that the switch is connected to described embedded
In the GPIO pin of controller, high level is exported when the switch is set as using single x16 buses, when the switch setting
To use low level is exported during two x8 buses；The embedded controller is connected on the STRIP pins of the PCIE bridge pieces.
6. according to the method described in any one in claim 2-4, which is characterized in that described x0-7 with it is x8-15 described
Can be logic just sequentially ranking, the ranking of logic opposite sequence or the order ranking of preassigned NOT logic of slot or pin.
7. a kind of PCIE expanding units, which is characterized in that including：
High-speed bus switches chip, is connected to x8 slots；
PCIE bridge pieces are connected to the high-speed bus switching chip and x16 slots；
Embedded controller is connected to the PCIE bridge pieces；
Switch is connected to the high-speed bus switching chip and the embedded controller, single x16 buses is used for configuring
Connection is connected using two x8 buses；
Wherein, the PCIE expanding units use method as claimed in any one of claims 1 to 6.
8. a kind of computer equipment, including memory, at least one processor and it is stored on the memory and can be in institute
State the computer program run on processor, which is characterized in that the processor performs such as claim when performing described program
Method described in 1-6 any one.
9. a kind of computer readable storage medium, the computer-readable recording medium storage has computer program, and feature exists
In the method when computer program is executed by processor described in perform claim requirement 1-6 any one.
10. a kind of computer program product, which is characterized in that the computer program product includes being stored in computer-readable deposit
Calculation procedure on storage media, the calculation procedure include instruction, when described instruction is computer-executed, make the computer
Method described in perform claim requirement 1-6 any one.
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| CN201810174592.7A CN108108324B (en) | 2018-03-02 | 2018-03-02 | PCIE (peripheral component interface express) expansion method and device |
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| CN201810174592.7A CN108108324B (en) | 2018-03-02 | 2018-03-02 | PCIE (peripheral component interface express) expansion method and device |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108897710A (en) * | 2018-07-06 | 2018-11-27 | 郑州云海信息技术有限公司 | A kind of system of automatic switchover system management bus |
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| CN108897710A (en) * | 2018-07-06 | 2018-11-27 | 郑州云海信息技术有限公司 | A kind of system of automatic switchover system management bus |
| CN108897710B (en) * | 2018-07-06 | 2021-04-06 | 郑州云海信息技术有限公司 | System for automatically switching system management bus |
| CN110780932A (en) * | 2019-09-26 | 2020-02-11 | 苏州浪潮智能科技有限公司 | Working mode switching method and device of PCIE switching chip |
| CN113342714A (en) * | 2020-03-02 | 2021-09-03 | 群联电子股份有限公司 | Memory storage device and management method thereof |
| CN113342714B (en) * | 2020-03-02 | 2023-07-25 | 群联电子股份有限公司 | Memory storage device and management method thereof |
| CN111858431A (en) * | 2020-07-09 | 2020-10-30 | 苏州浪潮智能科技有限公司 | PCIE (peripheral component interface express) -based extension cabinet hot plug method, device, equipment and medium |
| CN111858431B (en) * | 2020-07-09 | 2022-08-02 | 苏州浪潮智能科技有限公司 | PCIE (peripheral component interface express) -based extension cabinet hot plug method, device, equipment and medium |
| CN111935707A (en) * | 2020-07-29 | 2020-11-13 | 北京三未信安科技发展有限公司 | Cipher device and cipher equipment |
| CN112416828A (en) * | 2020-11-20 | 2021-02-26 | 苏州浪潮智能科技有限公司 | Method, system, device and medium for maintaining PCIE signal connection by using in-place signal |
| CN114281732A (en) * | 2021-11-26 | 2022-04-05 | 苏州浪潮智能科技有限公司 | UPI-PCIE conversion method and device and electronic equipment |
| CN114281732B (en) * | 2021-11-26 | 2023-08-04 | 苏州浪潮智能科技有限公司 | UPI-PCIE conversion method and device and electronic equipment |
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