CN117882178A - 带有在两个电路载体之间的功率半导体结构元件的电子布置结构及制造电子布置结构的方法 - Google Patents
带有在两个电路载体之间的功率半导体结构元件的电子布置结构及制造电子布置结构的方法 Download PDFInfo
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- CN117882178A CN117882178A CN202280058880.0A CN202280058880A CN117882178A CN 117882178 A CN117882178 A CN 117882178A CN 202280058880 A CN202280058880 A CN 202280058880A CN 117882178 A CN117882178 A CN 117882178A
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- 238000010168 coupling process Methods 0.000 claims description 6
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- 229910000679 solder Inorganic materials 0.000 claims description 2
- 230000000930 thermomechanical effect Effects 0.000 abstract description 5
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- 238000011161 development Methods 0.000 description 2
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- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000010309 melting process Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
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Abstract
本发明涉及一种带有功率半导体结构元件(10)和电路载体(14)的电子布置结构(100),其中,功率半导体结构元件(10)在对置的侧面上分别具有至少一个接触区域(22、24、26),并且其中,面向电路载体(14)的至少一个接触区域(22、24)与电路载体(14)的联接区域(28、30)电接触,其中,功率半导体结构元件(10)在背离电路载体(14)的侧面上在至少一个接触区域(26)的区域中与另外的电路载体(18)电接触,其中,在至少一个接触区域(22、24、26)上和/或电路载体(14、18)的联接区域(28、30、32)上布置有以增材式工艺所产生的连接层(36、38、40),并且其中,至少一个连接层(36、38、40)借助于钎焊连接部与联接区域(28、30、32)和/或接触区域(22、24、26)连接。连接层(36、38、40)能够在垂直于功率半导体结构元件(10)的表面延伸的方向或平面中尤其由于连接层(36、38、40)具有人字型图案(44)的构造方式而具有比在平行于功率半导体结构元件(10)的表面延伸的方向或平面中更小的弹性模量。由此,沿双箭头(45)的方向延伸的热机械的应力被弹簧元件意义上的连接层(36、38、40)至少部分地吸收或抵消,并且减少了相应的应力到功率半导体结构元件(10)或电路载体(14、18)处的传递。连接层(36、38、40)能够由金属原材料的多个层形成,其中,所述层中的至少一些层在平行于功率半导体结构元件(10)的表面延伸的平面中能够具有缺口(42)或空隙,并且其中,所述连接层(36、38、40)的至少一个构造在接触区域(22、24、26)或联接区域(28、30、32)上的第一层能够构造成全面状的层。电路载体(14)和另外的电路载体(18)能够在必要时中间放置接触元件(46)的情况下在功率半导体结构元件(10)外的区域中与彼此电接触,其中,在接触的区域中布置有至少一个以增材式工艺所产生的连接层(54、56)。
Description
技术领域
本发明涉及一种在功率半导体结构元件与两个电路载体之间的电子布置结构,该电子布置结构突出之处尤其在于良好的热机械性能和有利的生产。此外,本发明涉及一种用于构造按照本发明的电子布置结构的方法。
背景技术
由本申请人的DE 10 2015 205 704 A1已知一种带有权利要求1的前序部分的特征的电子布置结构。已知的电子布置结构具有形式为DBC(直接键合铜(Direct-Bonded-Copper))的电路载体,该电路载体通过钎焊连接部来与构造为晶体管的功率半导体结构元件的下侧连接。功率半导体结构元件的上侧与电路载体的电接触通过键合引线连接部来实现。
发明内容
带有权利要求1的特征的包括功率半导体结构元件和电路载体的、在功率半导体结构元件与电路载体之间的按照本发明的电子布置结构具有的优点是,该电子布置结构能够在同时良好的热机械性能的情况下实现布置在两个电路载体之间的功率半导体结构元件的特别紧凑的布置方式。
在带有权利要求1的特征的按照本发明的电子布置结构中通过下述方式来实现所述优点,即:功率半导体结构元件在背离电路载体的侧面上在至少一个接触区域的区域中与另外的电路载体电接触,在至少一个接触区域和/或联接区域上布置有以增材式工艺所产生的连接层,并且借助于钎焊连接部将连接层与联接区域和/或接触区域连接起来。
在从属权利要求中阐述了按照本发明的电子布置结构的有利的改进方案。
为了尤其在垂直于功率半导体结构元件或电路载体的平面延伸的方向上减小作用到功率半导体结构元件或电路载体上的热机械的负荷,特别优选规定了,连接层在垂直于功率半导体结构元件的表面延伸的方向上具有比在平行于功率半导体结构元件的表面延伸的方向上更小的弹性模量。换句话说这意味着,生成了连接层的与方向相关的不同的弹性模量。
优选此外还规定了,连接层由金属的原材料的多个层构成,并且所述层中的至少一些层在平行于功率半导体结构元件的表面延伸的方向上具有缺口或空隙。所述缺口或空隙尤其用于实现在所提到的两个垂直于功率半导体结构元件的表面延伸的方向上的不同的弹性模量并且必要时实现改善的冷却或改善的散热。对连接层的制造在实践中尤其通过下述方式来实现,即:通过施加金属粉末来逐渐地产生连接层的层,所述层在施加之后选择性地通过激光束(或光子束)熔化。所熔化的材料紧接着在构成连接层的一部分的情况下硬化,而未熔化的材料则在之后的处理流程中被从连接层的区域中移除。优选金属粉末由铜和/或铝和/或铜合金和/或铝合金构成或者包含铜和/或铝和/或铜合金和/或铝合金。替代地或附加地,金属粉末包含包括碳的复合材料。以特别有利的方式,增材式构建能够实现将所提及的材料混合成粉末混合物,以便于是通过熔化过程来产生不同的合金。补充地阐释的是,除了所提及的增材式工艺外,当然也能够使用其他由现有技术本身已知的增材式加工工艺,以便制造连接层。
在优选的改进方案中规定了,连接层在垂直于功率半导体结构元件的表面延伸的平面中尤其由于连接层的具有人字型图案的构造方式而具有比在平行于功率半导体结构元件的平面延伸的平面中更小的弹性模量。这种人字型图案能够实现连接层的所提及的不同的与方向相关的弹性。然而,连接层的其他的几何形状也是可行的,以便实现不同的(与方向相关的)弹性。
为了优化连接层的连接而能够规定,将连接层的至少一个构造在接触区域或接触区域上的第一层构造成全面状的层。
用于改进钎焊连接部的另一种优选的设计方案规定了,连接层的至少一个在面向联接区域的侧面上的另外的层具有缺口或空隙。
本发明的另一种设计方案规定了,电路载体和另外的电路载体在功率半导体结构元件外的区域中必要时在中间放置接触元件的情况下与彼此电接触,并且在接触的区域中布置有至少一个以增材式工艺所产生的连接层。
到目前为止所说明的电子布置结构尤其规定了,功率半导体结构元件是晶体管,并且电路载体和另外的电路载体分别是基板。
此外,本发明也包括一种用于构造电子布置结构、尤其到目前为止所说明的按照本发明的电子布置结构的方法,其中,按照本发明的方法具有至少下述步骤:首先,以增材式工艺在功率半导体结构元件的接触区域之上和/或之中、并且/或者在电路载体的和/或另外的电路载体的联接区域上构建连接层。紧接着,在中间放置功率半导体结构元件的情况下使电路载体和另外的电路载体接触。最后,在连接层与联接区域或接触区域之间构造钎焊连接部。
所述方法的一种优选的改进方案规定了,通过分配将钎料施加在连接层上。
附图说明
本发明的进一步的优点、特征和细节由接下来对本发明的优选的实施方式的说明以及借助于附图得出。其中:
图1以简化的纵剖面图示出了在构造成晶体管的功率半导体结构元件与布置在功率半导体结构元件的对置的侧面上的形式分别为基板的电路载体之间的电子布置结构。
具体实施方式
在图1中示出了电子布置结构100,该电子布置结构包括形式为晶体管12的功率半导体结构元件10、形式为基板16的电路载体14以及同样形式为基板20的另外的电路载体18,其中,功率半导体结构元件10与两个电路载体14和18电接触。此外,功率半导体结构元件10的平面和两个电路载体14和18的平面相对于彼此平行地延伸。
功率半导体结构元件10在面向电路载体14的侧面上具有两个彼此分离布置的、通过金属化部所构造的接触区域22、24,并且在面向另外的电路载体18的侧面上具有唯一的同样通过金属化部所构造的接触区域26。此外,在分配有相应的接触区域22、24和26的两个电路载体14和18上设置了形式为印制导线区段34的联接区域28、30、32。
在联接区域28、30和32与接触区域22、24和26之间布置有以增材式工艺所制造的连接层36、38和40。优选通过逐层地构建金属的原材料(金属粉末)且紧接着通过电子束(激光束)选择性地熔化原材料所产生的连接层36、38和40尤其产生在联接区域28、30或32上、替代地或附加地产生在功率半导体结构元件10的接触区域22、24和26上。
此外,通过图1中未被示出的钎焊连接部来实现连接层36、38和40与电路载体14和18以及功率半导体结构元件10之间的连接。钎焊连接部始终构造在其上没有构建连接层36、38、40的侧面或元件上。
如借助于图1能够看到的那样,在垂直于功率半导体结构元件10的以及电路载体14和18的平面延伸的平面中或者平行于图1的图纸平面地在连接层36、38和40中构造有缺口42或空隙。连接层36、38和40尤其由此分别如此构造人字型图案44,使得根据双箭头45在垂直于功率半导体结构元件10的和电路载体14和18的平面延伸的方向上,连接层36、38和40具有比在功率半导体结构元件10或电路载体14和18的平面的方向上更小的刚性或更小的弹性模量。因此,沿双箭头45的方向延伸的热机械的应力被弹簧元件意义上的连接层36、38、40至少部分地吸收或抵消,并且减少了相应的应力到功率结构元件10或电路载体14、18处的传递。
此外还能够规定,两个电路载体14和18在功率半导体结构元件10外的区域中与彼此电接触。在所示实施例中,附加地在两个电路载体14和18之间设置了形式为钎焊连接器48的接触元件46。在接触元件46与电路载体14和18的印制导线区段50、52之间构造有以增材式工艺所构造的连接层54和56,该连接层布置在印制导线区段48和50与接触元件46之间。
到目前为止所说明的电子布置结构100能够以多种多样的方式和方法加以改变或修正,而不会偏离本发明构思。
Claims (10)
1.在功率半导体结构元件(10)与电路载体(14)之间的电子布置结构(100),其中,所述功率半导体结构元件(10)在对置的侧面上分别具有至少一个接触区域(22、24、26),并且其中,面向所述电路载体(14)的至少一个接触区域(22、24)与所述电路载体(14)的联接区域(28、30)电接触,
其特征在于,
所述功率半导体结构元件(10)在背离所述电路载体(14)的侧面上在至少一个接触区域(26)的区域中与另外的电路载体(18)电接触,在所述至少一个接触区域(22、24、26)上和/或所述电路载体(14、18)的联接区域(28、30、32)上布置有以增材式工艺所产生的连接层(36、38、40),并且至少一个连接层(36、38、40)借助于钎焊连接部与所述联接区域(28、30、32)和/或所述接触区域(22、34、26)连接。
2.根据权利要求1所述的电子布置结构,
其特征在于,
所述连接层(36、38、40)在垂直于所述功率半导体结构元件(10)的表面延伸的方向上具有比在平行于所述功率半导体结构元件(10)的表面延伸的方向上更小的弹性模量。
3.根据权利要求1或2所述的电子布置结构,
其特征在于,
所述连接层(36、38、40)由金属原材料的多个层形成,并且所述层中的至少一些层在平行于所述功率半导体结构元件(10)的表面延伸的平面中具有缺口(42)或空隙。
4.根据权利要求1至3中任一项所述的电子布置结构,
其特征在于,
所述连接层(36、38、40)在垂直于所述功率半导体结构元件(10)的表面延伸的平面中尤其由于所述连接层(36、38、40)的带有人字型图案(44)的构造方式而具有比在平行于所述功率半导体结构元件(10)的平面延伸的平面中更小的弹性模量。
5.根据权利要求3或4所述的电子布置结构,
其特征在于,
所述连接层(36、38、40)的至少一个构造在所述接触区域(22、24、26)或所述联接区域(28、30、32)上的第一层构造成全面状的层。
6.根据权利要求3至5中任一项所述的电子布置结构,
其特征在于,
所述连接层(36、38、40)的至少一个布置在面向所述联接区域(28、30、32)的侧面上的层具有缺口(42)或空隙。
7.根据权利要求1至6中任一项所述的电子布置结构,
其特征在于,
所述电路载体(14)和所述另外的电路载体(18)在所述功率半导体结构元件(10)外的区域中必要时在中间放置接触元件(46)的情况下与彼此电接触,并且在接触的区域中布置有至少一个以增材式工艺所产生的连接层(54、56)。
8.根据权利要求1至7中任一项所述的电子布置结构,
其特征在于,
所述功率半导体结构元件(10)是晶体管(12),并且所述电路载体(14)和所述另外的电路载体(18)分别是基板(16、20)。
9.用于构造尤其根据权利要求1至8中任一项所构造的电子布置结构(100)的方法,该方法包括至少下述步骤:
-以增材式工艺在所述功率半导体结构元件(10)的接触区域(22、24、26)的区域之上和/或之中、并且/或者在所述电路载体(14)的和/或所述另外的电路载体(18)的联接区域(28、30、32)上构建连接层(36、38、40),
-在中间放置所述功率半导体结构元件(10)的情况下使所述电路载体(14)和所述另外的电路载体(18)接触,
-在所述连接层(36、38、40)与所述联接区域(28、30、32)或所述接触区域(22、24、26)之间构造钎焊连接部。
10.根据权利要求9所述的方法,
其特征在于,
通过分配将钎料施加到所述连接层(36、38、40)上。
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US6812553B2 (en) * | 2002-01-16 | 2004-11-02 | Delphi Technologies, Inc. | Electrically isolated and thermally conductive double-sided pre-packaged component |
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EP2871675A1 (en) * | 2013-11-06 | 2015-05-13 | Mitsubishi Electric R & D Centre Europe B.V. | Pressure connection for a semiconductor die using flexible nanowires and corresponding manufacturing method |
US9508667B2 (en) * | 2014-12-23 | 2016-11-29 | Intel Corporation | Formation of solder and copper interconnect structures and associated techniques and configurations |
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ITTO20150229A1 (it) * | 2015-04-24 | 2016-10-24 | St Microelectronics Srl | Procedimento per produrre bump in componenti elettronici, componente e prodotto informatico corrispondenti |
US11437298B2 (en) * | 2017-09-14 | 2022-09-06 | Shindengen Electric Manufacturing Co., Ltd. | Electronic module and method for manufacturing electronic module |
EP3739624A1 (en) * | 2019-05-13 | 2020-11-18 | Infineon Technologies Austria AG | Semiconductor arrangement with a compressible contact element encapsulated between two carriers and corresponding manufacturing method |
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