CN117060875A - Bulk acoustic wave filter, manufacturing method thereof and electronic device - Google Patents

Bulk acoustic wave filter, manufacturing method thereof and electronic device Download PDF

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Publication number
CN117060875A
CN117060875A CN202310966972.5A CN202310966972A CN117060875A CN 117060875 A CN117060875 A CN 117060875A CN 202310966972 A CN202310966972 A CN 202310966972A CN 117060875 A CN117060875 A CN 117060875A
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China
Prior art keywords
layer
electrode
substrate
sub
device substrate
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CN202310966972.5A
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Chinese (zh)
Inventor
冯雪丽
蔡敏豪
王冲
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Semiconductor Manufacturing Electronics Shaoxing Corp SMEC
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Semiconductor Manufacturing Electronics Shaoxing Corp SMEC
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Priority to CN202310966972.5A priority Critical patent/CN117060875A/en
Publication of CN117060875A publication Critical patent/CN117060875A/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/02007—Details of bulk acoustic wave devices
    • H03H9/02015—Characteristics of piezoelectric layers, e.g. cutting angles
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/02007—Details of bulk acoustic wave devices
    • H03H9/02047—Treatment of substrates
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/02007—Details of bulk acoustic wave devices
    • H03H9/02086—Means for compensation or elimination of undesirable effects
    • H03H9/02102—Means for compensation or elimination of undesirable effects of temperature influence
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/125—Driving means, e.g. electrodes, coils
    • H03H9/13—Driving means, e.g. electrodes, coils for networks consisting of piezoelectric or electrostrictive materials
    • H03H9/131—Driving means, e.g. electrodes, coils for networks consisting of piezoelectric or electrostrictive materials consisting of a multilayered structure

Abstract

The application provides a bulk acoustic wave filter, a manufacturing method thereof and an electronic device, wherein the bulk acoustic wave filter comprises: a device substrate; the semiconductor cap substrate is provided with a cap metal layer formed on the first surface, a bonding part is formed on the cap metal layer, the cap metal layer is connected with the device substrate through the bonding part, a plurality of holes penetrating through the semiconductor cap substrate are formed in the semiconductor cap substrate, and the cap metal layer is filled with the holes. According to the bulk acoustic wave filter, the metal heat dissipation layer is added on the semiconductor cap substrate, so that heat dissipation of a device is improved, warping generated after the semiconductor cap substrate and the device substrate are bonded is avoided, and difficulty of subsequent processes is reduced.

Description

Bulk acoustic wave filter, manufacturing method thereof and electronic device
Technical Field
The application relates to the technical field of semiconductors, in particular to a bulk acoustic wave filter, a manufacturing method thereof and an electronic device.
Background
Radio frequency filters are one of the important devices in the field of wireless communications. With the advent of the age of big data and internet of things, filters assembled in radio frequency front ends must develop towards high frequency, low loss, miniaturization, integration, etc. The bulk acoustic wave (Bulk Acoustic Wave, BAW) filter based on piezoelectric material is a better solution of the radio frequency filter, and the technical index of the radio frequency filter with the center frequency as high as several GHz can be realized by cascading a plurality of BAW filters according to a certain topological structure. Compared with the traditional ceramic filter and the acoustic surface wave filter based on piezoelectric materials, the BAW filter has the advantages of high working frequency, large power capacity, low loss, small volume, good temperature stability and the like.
Conventional BAW filters employ semiconductor cap wafers bonded to device wafers to form cavities to protect the devices; however, warpage is easily generated after the cap substrate and the device substrate are bonded, increasing the difficulty of the subsequent process.
In view of the above-described problems, there is a need to provide a new bulk acoustic wave filter and a method of manufacturing the same.
Disclosure of Invention
In the summary, a series of concepts in a simplified form are introduced, which will be further described in detail in the detailed description. The summary of the application is not intended to define the key features and essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
In view of the problems existing at present, the present application provides a bulk acoustic wave filter, comprising: a device substrate; the semiconductor cap substrate, the first surface of semiconductor cap substrate is formed with the block metal layer, be formed with the bonding portion on the block metal layer, the block metal layer with the device function layer is passed through the bonding portion and is connected, wherein, semiconductor cap substrate still is formed with a plurality of holes that run through semiconductor cap substrate, the block metal layer still packs the hole.
Illustratively, the device substrate further comprises: a device substrate having a first surface and a second surface opposite the first surface of the device substrate; a device functional layer, the device functional layer comprising: a first electrode connected to the first surface of the device substrate, a piezoelectric layer covering the first electrode, and a second electrode covering the piezoelectric layer, the cap metal layer facing the second electrode; the first extraction electrode is electrically connected with the first electrode, and the second extraction electrode is electrically connected with the second electrode.
Illustratively, a re-wiring layer is formed on the second surface of the device substrate, the re-wiring layer including a first sub-wiring layer and a second sub-wiring layer isolated from the first sub-wiring layer, the first extraction electrode including the first sub-wiring layer and a first solder ball formed on the first sub-wiring layer, the second extraction electrode including the second sub-wiring layer and a second solder ball formed on the second sub-wiring layer.
The device substrate is further provided with a plurality of first conductive material layers and second conductive material layers penetrating through the device substrate, wherein the bottoms of the first conductive material layers are connected with the first electrode, the bottoms of the second conductive material layers are connected with the lead layers, the lead layers are located on the outer sides of the first electrode and isolated from the first electrode, and the lead layers are electrically connected with the second electrode.
Illustratively, the device substrate further forms a first trench and a second trench penetrating the device substrate, at least a portion of the first electrode is exposed at the bottom of the first trench, the first sub-wiring layer further covers the sidewall and the bottom of the first trench, at least a portion of the lead layer is exposed at the bottom of the second trench, the lead layer is located outside the first electrode and isolated from the first electrode, the lead layer is electrically connected to the second electrode, and the second sub-wiring layer further covers the sidewall and the bottom of the second trench.
Illustratively, a first bonding metal part is further formed on the first electrode, a second bonding metal part is further formed outside the first bonding metal part, the second bonding metal part is electrically connected with the second electrode, the first bonding metal part is electrically connected with the first sub-wiring layer, the second bonding metal part is electrically connected with the second sub-wiring layer, and the first surface of the device substrate is connected with the device functional layer through the first bonding metal part and the second bonding metal part.
The application also provides a manufacturing method of the bulk acoustic wave filter, which comprises the following steps: providing a device substrate; providing a semiconductor cap substrate, wherein a cap metal layer is formed on the first surface of the semiconductor cap substrate, and a bonding part is formed on the cap metal layer, wherein a plurality of holes are further formed in the semiconductor cap substrate, and the cap metal layer is further filled in the holes; the cap metal layer is bonded to the device substrate through the bonding portion.
Illustratively, the device substrate includes: a device substrate having a first surface and a second surface opposite the first surface of the device substrate; a device functional layer, the device functional layer comprising: a first electrode connected to the first surface of the device substrate, a piezoelectric layer covering the first electrode, and a second electrode covering the piezoelectric layer, wherein the cap metal layer faces the second electrode; the manufacturing method further comprises the steps of: and forming a first extraction electrode and a second extraction electrode on the second surface of the device substrate, wherein the second surface of the device substrate is opposite to the first surface of the device substrate, the first extraction electrode is electrically connected with the first electrode, and the second extraction electrode is electrically connected with the second electrode.
Illustratively, the method of forming the plurality of holes and the cap metal layer comprises: forming a patterned photoresist layer on a first surface of the semiconductor cap substrate; etching the semiconductor cap substrate by taking the patterned photoresist layer as a mask to form a plurality of holes; and forming the cap metal layer to cover the first surface of the semiconductor cap substrate and fill the holes.
Illustratively, after forming the cap metal layer, the method of manufacturing further comprises: planarizing the cap metal layer.
Illustratively, forming a first extraction electrode and a second extraction electrode on a second surface of the device substrate includes: forming a plurality of first through holes and second through holes penetrating through the device substrate; forming a metal material filling the first and second through holes to form first and second conductive material layers, wherein the metal material also covers the second surface of the device substrate to form a re-wiring layer including a first sub-wiring layer and a second sub-wiring layer isolated from the first sub-wiring layer; and forming a first solder ball on the first sub-wiring layer and forming a second solder ball on the second sub-wiring layer.
Illustratively, after forming the redistribution layer on the second surface of the device substrate, the method of fabricating further comprises: forming a rewiring protective layer on the rewiring layer, wherein the rewiring protective layer exposes a first welding area of the first sub-wiring layer and a second welding area of the second sub-wiring layer; forming a first solder ball on the first sub-wiring layer and a second solder ball on the second sub-wiring layer, comprising: and forming the first solder balls in the first welding areas and forming the second solder balls in the second welding areas.
Illustratively, the method of manufacturing further comprises: a thinning process is performed on the semiconductor cap substrate from a second surface of the semiconductor cap substrate and/or the device substrate is performed from the second surface of the device substrate before the first electrode and the second electrode are formed.
The application also provides an electronic device comprising the bulk acoustic wave filter.
According to the bulk acoustic wave filter provided by the application, the cap metal layer is formed on the first surface of the semiconductor cap substrate, and the cap metal layer is provided with the metal grid-shaped structure embedded into the semiconductor cap substrate, so that the heat dissipation of the device is improved.
Drawings
The following drawings are included to provide an understanding of the application and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the application and their description to explain the principles of the application.
In the accompanying drawings:
fig. 1 shows a schematic cross-sectional view of a bulk acoustic wave filter according to the related art;
fig. 2 shows a schematic cross-sectional view of a bulk acoustic wave filter according to an embodiment of the present application;
fig. 3 shows a schematic cross-sectional view of a bulk acoustic wave filter according to a further embodiment of the present application;
Fig. 4 shows a schematic cross-sectional view of a bulk acoustic wave filter according to a further embodiment of the present application;
fig. 5 shows a flowchart of a method of manufacturing a bulk acoustic wave filter according to an embodiment of the present application;
fig. 6A to 6J are schematic cross-sectional views showing the structures obtained by sequentially carrying out a method of manufacturing a bulk acoustic wave filter according to an embodiment of the present application;
FIG. 7 shows a schematic diagram of an electronic device according to an embodiment of the application;
in the drawings of which there are shown,
bulk acoustic wave filter 100, device base 110, semiconductor cap substrate 130, rewiring layer 141, solder balls 142;
bulk acoustic wave filter 200, bulk acoustic wave filter 300, bulk acoustic wave filter 400, device substrate 201, device substrate 210, device functional layer 220, first electrode 221, second electrode 222, piezoelectric layer 223, semiconductor cap substrate 231, cap metal layer 232, bonding portion 233, bond metal bump 2331, bond mating portion 2332, first sub-wiring layer 2431, second sub-wiring layer 2432, first solder ball 2411, second solder ball 2412, first conductive material layer 251, second conductive material layer 252, first trench 351, second trench 352, first bond metal portion 461, second bond metal portion 462, conductive plug 463;
A mobile phone handset 700, a housing 701, a display portion 702, an operation button 703, an external connection port 704, a speaker 705, and a microphone 706.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present application. It will be apparent, however, to one skilled in the art that the application may be practiced without one or more of these details. In other instances, well-known features have not been described in detail in order to avoid obscuring the application.
It should be understood that the present application may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art. In the drawings, the size of layers and regions, as well as the relative sizes, may be exaggerated for clarity. Like numbers refer to like elements throughout.
It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application.
Spatially relative terms, such as "under," "below," "beneath," "under," "above," "over," and the like, may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "under" or "beneath" other elements would then be oriented "on" the other elements or features. Thus, the exemplary terms "below" and "under" may include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
In the following description, for a thorough understanding of the present application, detailed steps and structures will be presented in order to illustrate the technical solution presented by the present application. Preferred embodiments of the present application are described in detail below, however, the present application may have other embodiments in addition to these detailed descriptions.
Fig. 1 shows a schematic cross-sectional view of a bulk acoustic wave filter 100 according to the related art, as shown in fig. 1, the bulk acoustic wave filter 100 includes a device base 110 and a semiconductor cap substrate 130, wherein a first surface of the semiconductor cap substrate 130 is bonded to the device base 110, a second surface of the semiconductor cap substrate 130 is formed with an extraction electrode, the extraction electrode includes a re-wiring layer 141 and solder balls 142, and the solder balls 142 are formed on the re-wiring layer 141; the bulk acoustic wave filter 100 employs the semiconductor cap substrate 130 and the device substrate 110 to be bonded to form a cavity to protect the device, however, the material of the semiconductor cap substrate 130 is typically silicon, and the thermal conductivity of the silicon is 191W/(k×m), compared with that of metal, so that the heat dissipation of the semiconductor cap substrate 130 is slow, and the thermal expansion coefficients of the silicon and the metal are greatly different, which causes warpage after the semiconductor cap substrate 130 and the device substrate 110 are bonded, and increases the difficulty of the subsequent process.
Therefore, in view of the foregoing technical problems, the present application provides a bulk acoustic wave filter, in which a metal heat dissipation layer is added to a semiconductor cap substrate, so that heat dissipation of the device is improved, and warpage is avoided. Hereinafter, a bulk acoustic wave filter according to an embodiment of the present application will be described and illustrated in detail with reference to fig. 2, 3 and 4; wherein fig. 2 shows a schematic cross-sectional view of a bulk acoustic wave filter according to an embodiment of the present application; fig. 3 shows a schematic cross-sectional view of a bulk acoustic wave filter according to a further embodiment of the present application; fig. 4 shows a schematic cross-sectional view of a bulk acoustic wave filter according to a further embodiment of the present application.
In one embodiment, as shown in fig. 2, 3 and 4, the bulk acoustic wave filter 200, the bulk acoustic wave filter 300 and the bulk acoustic wave filter 400 each include a device base 201 and a semiconductor cap substrate 230, wherein the device base 201 includes a device substrate 210 and a device functional layer 220; the device substrate 210 has a first surface and a second surface opposite the first surface of the device substrate 210; the device functional layer 220 includes: a first electrode 221 connected to the first surface of the device substrate 210, a piezoelectric layer 223 covering the first electrode 221, and a second electrode 222 covering the piezoelectric layer 223; the semiconductor cap substrate 230, the first surface of the semiconductor cap substrate 230 is formed with a cap metal layer 232, a bonding portion 233 is formed on the cap metal layer 232, the cap metal layer 232 is connected with the device function layer 220 of the device substrate 201 through the bonding portion 233, the cap metal layer 232 faces the second electrode 222, the semiconductor cap substrate 230 is further formed with a plurality of holes 231 penetrating through the semiconductor cap substrate 230, and the cap metal layer 232 is further filled with the holes 231. Compared with the bulk acoustic wave filter of the related art, the stress difference of the bulk acoustic wave filter provided by the application is remarkably reduced, wherein the cap metal layer 232 forms a metal grid-shaped structure embedded below the first surface of the semiconductor cap substrate 230 by filling the holes 231 of the semiconductor cap substrate 230, so that the cap metal layer 232 becomes a heat dissipation layer and a stress release layer of the semiconductor cap substrate 230, the heat dissipation of the device is remarkably improved through the cap metal layer 232, the internal stress generated by larger difference of thermal expansion coefficients is released, and the warping problem is avoided.
In one embodiment, the cross-sectional shape of the holes of the semiconductor cap substrate includes a shape of a circle, a square, a rectangle, a hexagon, etc., and the holes are arranged in a certain arrangement, for example, when the cross-sectional shape of the holes 231 is a hexagon, the holes are arranged in a honeycomb arrangement, or the holes are arranged in an arrangement around the axis of the semiconductor cap substrate, and those skilled in the art can design the arrangement of the holes on the cap substrate according to actual needs, which is not limited in the present application. In some embodiments, the plurality of holes may also be arranged in a stripe or grid shape, etc. in the semiconductor cap substrate.
Illustratively, the material of the cap metal layer 232 may comprise any suitable metallic material including, but not limited to, at least one of Ag, au, cu, pd, cr, mo, ti, ta, sn, W and Al, preferably the material of the metal layer comprises copper (Cu) or gold (Au). In one example, a passivation layer is also formed on the cap metal layer 232 for protecting the cap metal layer from oxidation.
Illustratively, the materials of the first electrode 221 and the second electrode 222 may use a conductive material or a semiconductor material, wherein the conductive material may be a metal material having conductive properties, and the metal material may use a metal or alloy material such as aluminum (Al), copper (Cu), gold (Au), platinum (Pt), or the like. The thicknesses of the first electrode 221 and the second electrode 222 may be set according to a target resonance frequency, and the thicknesses of the first electrode 221 and the second electrode 222 may each be set to about 1/10 of a wavelength, for example. The resonance frequency of the bulk acoustic wave filter is subject to the influence of the external environment temperature to generate drift, and for the bulk acoustic wave filter, the temperature-frequency drift characteristic can cause the performance of the bulk acoustic wave filter such as the center frequency, the insertion loss, the in-band ripple and the like to change, so that the reliability of the bulk acoustic wave filter in electrical application is reduced. Accordingly, the semiconductor cap substrate is bonded on the device functional layer and a cavity is formed, thereby protecting the device functional layer from the external environment.
As a material of the piezoelectric layer 223, for example, a piezoelectric material having a wurtzite crystal structure such as ZnO, alN, gaN, lead zirconate titanate, lead titanate, or the like, and the doped metal element includes one or more of scandium, zirconium, calcium, titanium, magnesium, or the like.
Illustratively, with continued reference to fig. 2, 3 and 4, the bulk acoustic wave filter 200, the bulk acoustic wave filter 300 and the bulk acoustic wave filter 400 each further comprise: a first extraction electrode and a second extraction electrode are formed on the second surface of the device substrate 210, the first extraction electrode being electrically connected to the first electrode 221, the second extraction electrode being electrically connected to the second electrode 222.
Illustratively, a re-wiring layer is formed on the second surface of the device substrate 210, the re-wiring layer including a first sub-wiring layer 2431 and a second sub-wiring layer 2432 isolated from the first sub-wiring layer 2431, the first extraction electrode including the first sub-wiring layer 2431 and the first solder ball 2411 formed on the first sub-wiring layer 2431, the second extraction electrode including the second sub-wiring layer 2432 and the second solder ball 2412 formed on the second sub-wiring layer 2432. By forming a large area re-wiring layer on the second surface of the device substrate 210, the heat dissipation of the device is further improved.
The electrical connection of the redistribution layer and the corresponding electrodes may be achieved by any suitable means, for example, in some embodiments, as shown in fig. 2, the device substrate 210 is further formed with a plurality of first conductive material layers 251 and second conductive material layers 252 extending through the device substrate 210, the first conductive material layers 251 being for leading out the first electrodes 221, the second conductive material layers 252 being for leading out the second electrodes 222; the bottom of the first conductive material layer 251 is connected to the first electrode 221, and the bottom of the second via 252 is connected to a lead layer, which is located outside the first electrode 221 and isolated from the first electrode 221, i.e., the lead layer is insulated from the first electrode 221, alternatively, the lead layer and the first electrode 221 may be made of the same layer of conductive material, and the lead layer is electrically connected to the second electrode 222; that is, the first extraction electrode is electrically connected to the first electrode 221 through the first conductive material layer 251 and the first sub-wiring layer 2431, and the second extraction electrode is electrically connected to the second electrode 222 through the second conductive material layer 252 and the second sub-wiring layer 2432, and thus the first electrode 221 and the second electrode 222 are extracted, respectively. In some embodiments, the first and second conductive material layers 251 and 252 are the same metal material as the re-routing layers (including the first and second sub-routing layers 2431 and 2432). In some embodiments, the first conductive material layer 251 and the second conductive material layer 252 may also be of a different metal material than the re-routing layers (including the first sub-routing layer 2431 and the second sub-routing layer 2432).
With continued reference to fig. 3, the device substrate 210 is further formed with a first trench 351 and a second trench 352 extending through the device substrate 210, the first trench 351 for leading out the first electrode 221, the second trench 352 for leading out the second electrode 222; at least a portion of the first electrode 221 is exposed at the bottom of the first trench 351, at least a portion of the lead layer is exposed at the bottom of the second trench 352, the lead layer is located outside the first electrode 221 and isolated from the first electrode 221, i.e., the lead layer is insulated from the first electrode 221, the lead layer is electrically connected to the second electrode 222, the first sub-wiring layer 2431 also covers the sidewall and the bottom of the first trench 351, and the second sub-wiring layer 2432 also covers the sidewall and the bottom of the second trench 352; that is, the first extraction electrode is electrically connected to the first electrode 221 through the first trench 351 and the first sub-wiring layer 2431, and the second extraction electrode is electrically connected to the second electrode 222 through the lead layer, the second trench 352, and the second sub-wiring layer 2432, and thus the first electrode 221 and the second electrode 222 are extracted, respectively.
With continued reference to fig. 4, the device substrate 210 is further formed with a first layer 251 of conductive material and a second layer 252 of conductive material extending through the device substrate 210, the first layer 251 of conductive material being for extracting the first electrode 221, the second layer 252 of conductive material being for extracting the second electrode 222; the first electrode 221 further includes a first bonding metal portion 461 formed thereon, and a second bonding metal portion 462 formed outside the first bonding metal portion 461, wherein the first bonding metal portion 461 is electrically connected to the first sub-wiring layer 2431 via the first conductive material layer 251, the second bonding metal portion 462 is electrically connected to the second sub-wiring layer 2432 via the second conductive material layer 252, and the first surface of the device substrate 210 is connected to the device functional layer 220 via the first bonding metal portion 461 and the second bonding metal portion 462. The first extraction electrode is electrically connected to the first electrode 221 via the first conductive material layer 251, the first sub-wiring layer, and the first bond metal 461 to extract the first electrode 221; the piezoelectric layer 223 further includes a conductive plug 463 penetrating the piezoelectric layer 223, wherein one end of the conductive plug 463 is electrically connected to the second electrode 222, and the other end of the conductive plug 463 is electrically connected to the second bonding metal portion 462, that is, the second bonding metal portion 462 is electrically connected to the second electrode 222 through the conductive plug 463, and the second extraction electrode is electrically connected to the second electrode 222 through the second conductive material layer 252, the second sub-wiring layer, the second bonding metal portion 462 and the conductive plug 463, so as to extract the second electrode 222.
According to the bulk acoustic wave filter provided by the application, the metal grid-shaped structure embedded into the first surface of the semiconductor cap substrate is formed by filling the holes of the semiconductor cap substrate, so that the cap metal layer becomes a heat dissipation layer and a stress release layer of the semiconductor cap substrate, the heat dissipation of the device is obviously improved by the cap metal layer, the internal stress generated by larger difference of thermal expansion coefficients is released, the warping problem is avoided, and the difficulty of the subsequent process is reduced.
The present application also proposes a method for manufacturing a bulk acoustic wave filter, which may be manufactured by the method of the present embodiment, but is not limited thereto, as shown in fig. 5, including:
step S1, providing a device substrate;
step S2, providing a semiconductor cap substrate, wherein a cap metal layer is formed on the first surface of the semiconductor cap substrate, and a bonding part is formed on the semiconductor cap substrate, wherein the semiconductor cap substrate is also provided with a plurality of holes penetrating through the semiconductor cap substrate, and the cap metal layer is also filled with a plurality of holes;
and step S3, the cap metal layer is bonded with the device substrate through the bonding part.
Specifically, the device base comprises a device substrate and a device functional layer, wherein the device substrate is provided with a first surface; the device functional layer includes: a first electrode connected to the first surface of the device substrate, a piezoelectric layer covering the first electrode, and a second electrode covering the piezoelectric layer, wherein the cap metal layer faces the second electrode.
In some embodiments, the method of manufacturing further comprises: and forming a first extraction electrode and a second extraction electrode on the second surface of the device substrate, wherein the second surface of the device substrate is opposite to the first surface of the device substrate, the first extraction electrode is electrically connected with the first electrode, and the second extraction electrode is electrically connected with the second electrode. According to the manufacturing method of the bulk acoustic wave filter, the holes are formed in the cap metal layer, and the cap metal layer is used for filling the holes, so that the metal grid-shaped structure embedded into the first surface of the semiconductor cap substrate is formed, the cap metal layer becomes a heat dissipation layer and a stress release layer of the semiconductor cap substrate, the heat dissipation of the device is remarkably improved by the cap metal layer, internal stress generated by large difference of thermal expansion coefficients is reduced, and the warping problem is avoided.
Next, a method of manufacturing the bulk acoustic wave filter 200 shown in fig. 2 in the present application will be described in detail with reference to fig. 6A to 6J; fig. 6A to 6J are schematic cross-sectional views of bulk acoustic wave filters obtained by sequentially implementing a manufacturing method according to an embodiment of the present application. It should be noted that, in order to avoid repetition, only the same components and structures as those in the foregoing embodiment will be described briefly, and a specific explanation and description thereof will be given with reference to the description in the first embodiment.
Illustratively, the method of manufacturing the bulk acoustic wave filter 200 of the present application includes the steps of:
first, as shown in fig. 6A, a semiconductor cap substrate 230 is provided. Specifically, the semiconductor cap substrate 230 may be any suitable semiconductor substrate, such as a bulk silicon substrate, which may also be at least one of the following mentioned materials: si, ge, siGe, siC, siGeC, inAs, gaAs, inP or other III/V compound semiconductors, and also include multilayer structures of these semiconductors, or are silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), and germanium-on-insulator (GeOI), or may be double-sided polished silicon wafers (Double Side Polished Wafers, DSP), or may be ceramic substrates such as alumina, quartz, or glass substrates, or the like.
Next, as shown in fig. 6B, a plurality of holes 231 are formed in the first surface of the semiconductor cap substrate 230. Illustratively, the method of forming the plurality of holes 231 includes: a patterned photoresist layer is formed on the first surface of the semiconductor cap substrate 230, and the semiconductor cap substrate 230 is etched with the patterned photoresist layer as a mask to form a plurality of holes 231, so as to obtain a structure of the semiconductor cap substrate 230 as shown in fig. 6B, wherein the plurality of holes 231 do not penetrate through the semiconductor cap substrate 230.
Next, as shown in fig. 6C, a cap metal layer 232 is formed to cover the first surface of the semiconductor cap substrate 230 and fill the plurality of holes 231. In some embodiments, the cap metal layer 232 may be formed using an electroplating process or other suitable method. In some embodiments, the cap metal layer 232 may be formed using simultaneous electroplating to simultaneously cover the first surface of the semiconductor cap substrate 230 and fill the plurality of holes 231. In some embodiments, the cap metal layer 232 may be formed using step-wise electroplating to cover the first surface of the semiconductor cap substrate 230 and to fill the plurality of holes 231, respectively. The material of the cap metal layer 232 may comprise any suitable metal material including, but not limited to, at least one of Ag, au, cu, pd, cr, mo, ti, ta, sn, W and Al, preferably the material of the metal layer comprises copper (Cu) or gold (Au). The metal cap layer fills the holes on the first surface of the semiconductor cap substrate to form a metal grid structure embedded into the semiconductor cap substrate, so that the heat dissipation of the semiconductor cap substrate is improved, the stress generated by the difference of the thermal expansion coefficients of the metal cap layer material and the semiconductor cap substrate material is released, and the semiconductor cap substrate is prevented from warping.
In one example, after forming the cap metal layer 232, the manufacturing method further includes: the cap metal layer 232 may be planarized, for example, by Chemical Mechanical Polishing (CMP) or any suitable method. In some embodiments, the cap metal layer 232 is electroless plated, for example, a nickel palladium gold plating layer may be formed using a UBM (Under Bump Metallurgy) electroless plating process or any suitable method may be used to treat the surface of the cap metal layer 232 to protect the cap metal layer 232 and/or to assist in the bonding of the cap metal layer 232.
Next, as shown in fig. 6D, a bonding metal bump 2331 is formed as a bonding portion on the cap metal layer 232. Preferably, the material of bond metal bump 2331 includes copper (Cu), nickel (Ni), and/or gold (Au). Illustratively, a bond metal bump 2331 may be formed on the cap metal layer 232 using electroplating or any suitable method, the bond metal bump 2331 being used to bond with the device functional layer. In some embodiments, the bond metal bump is a bond ring that surrounds a portion of the surface of the cap metal layer.
Next, as shown in fig. 6E, a device base 201 is provided, the device base 201 including a device substrate 210 and a device functional layer 220, the device substrate 210 having a first surface; the device functional layer 220 includes: a first electrode 221 connected to the first surface of the device substrate 210, a piezoelectric layer 223 covering the first electrode 221, and a second electrode 222 covering the piezoelectric layer 223, and a bonding engagement portion 2332 corresponding to the bonding metal bump 2331 is further provided on the device functional layer 220; the first electrode 221, the piezoelectric layer 223, and the second electrode 222 form an acoustic wave resonance film of the acoustic wave filter, and the acoustic wave resonance film may further include other film layers besides the above film layers, which may be reasonably arranged according to an actual device, and is not particularly limited herein. In some embodiments, a cavity is also formed in the device substrate, and the device functional layer also covers at least a portion of the opening of the cavity.
For example, the material of the piezoelectric layer 223 may be selected to be ScAlN (i.e., scandium-doped aluminum nitride). The aluminum nitride film has the advantages of high sound velocity, high heat conductivity, good heat stability, compatibility with a CMOS process and the like, and is an ideal piezoelectric material of a Bending (BOW) device. However, the piezoelectric coefficient and the electromechanical coupling coefficient of the aluminum nitride film are low, which is not beneficial to realizing the large bandwidth and low loss of the device, and further application of the aluminum nitride piezoelectric layer 223 is limited to a large extent. Therefore, the piezoelectric response of the aluminum nitride film can be significantly improved by incorporating a metal element such as scandium into the film.
Illustratively, the materials of the first electrode 221 and the second electrode 222 may use a conductive material or a semiconductor material, wherein the conductive material may be a metal material having conductive properties, and the metal material may use a metal such as aluminum (Al), copper (Cu), gold (Au), platinum (Pt), or a copper alloy. As the semiconductor material, si, ge, siGe, siC, siGeC and the like can be used. The thickness of the first electrode 221 may be set according to the target resonance frequency, and may be set to about 1/10 of the wavelength, for example.
With continued reference to fig. 6E, a first groove, a second groove, and a third groove are formed on a side of the device functional layer 220 where the second electrode 222 is formed, wherein the first groove, the second groove, and the third groove extend from a side of the second electrode 222 to a side where the first electrode 221 is located, the first groove exposes the lead layer outside the first electrode 221, and a first conductive layer is further formed on a bottom and a sidewall of the first groove, and the first conductive layer is electrically connected to the second electrode 222 and the lead layer. The second groove exposes part of the first electrode 221, and a second conductive layer is further formed at the bottom and the side wall of the second groove, and is electrically connected with the first electrode 221; wherein the first conductive layer and the second conductive layer are insulated from each other, and the bottom and the side wall of the third groove are formed with a bonding matching part 2332.
Next, as shown in fig. 6F, the cap metal layer 232 is bonded to the device functional layer 220 to form a bonding portion 233 between the cap metal layer 232 and the device functional layer 220. Specifically, the bonding metal bump 2331 is engaged with the bonding fitting portion 2332 to form the bonding portion 233, and the bonding portion 233 includes the bonding metal bump 2331 and the bonding fitting portion 2332. In some embodiments, the bond metal bump is a bond ring that surrounds the surface of the cap metal layer, which, when bonded to the bond mating portion, forms a cavity between the cap metal layer 232 and the device functional layer 220.
Next, as shown in fig. 6G, the manufacturing method further includes: before forming the first electrode 221 and the second electrode 222, a thinning process is performed on the device substrate 210 from the second surface of the device substrate 210, i.e., a partial thickness of the device substrate 210 is removed from the second surface of the device substrate 210. For example, any suitable method such as chemical mechanical polishing, etching, etc. may be used to remove a portion of the thickness of the device substrate 210.
Thereafter, as shown in fig. 6H, a plurality of first and second through holes penetrating the device substrate 210 are formed, a metal material is formed, and the first and second through holes are filled to form a first and second conductive material layers 251 and 252. Specifically, at least a portion of the first electrode 221 is exposed at the bottom of the first via hole, at least a portion of the lead layer is exposed at the bottom of the second via hole 252, the metal material fills the first via hole and the second via hole, so that the first conductive material layer 251 is electrically connected to the first electrode 221, and the second conductive material layer 252 is electrically connected to the lead layer (as described above, the lead layer is electrically connected to the second electrode 222 through the first conductive layer); wherein the metallic material also covers the second surface of the device substrate 210 to form a re-wiring layer comprising a first sub-wiring layer 2431 and a second sub-wiring layer 2432 isolated from the first sub-wiring layer 2431. Illustratively, the first and second vias may be formed using a through silicon via (Through Silicon Via, TSV) process, and the first, second and re-wiring layers 251, 252 may be formed using electroplating or any suitable method. In some embodiments, the metal material filled in the first and second vias is the same metal material as the re-routing layers (including the first and second sub-routing layers 2431, 2432). In some embodiments, the metal material filled in the first via and the second via may also be a different metal material than the re-routing layers (including the first sub-routing layer 2431 and the second sub-routing layer 2432). In one example, after forming the redistribution layer on the second surface of the device substrate 210, the fabrication method further includes: a re-wiring protective layer (not shown) is formed on the re-wiring layer (including the first and second sub-wiring layers 2431 and 2432), and the re-wiring protective layer exposes the first and second lands of the first and second sub-wiring layers 2431 and 2432. For example, a plating treatment of UBM (Under Bump Metallurgy) may be applied to the rewiring layer to form a plating layer, and as the rewiring protective layer, for example, a metal layer of nickel-gold (NiAu/ENIG) or nickel-palladium-gold (NiPdAu/ENEPIG) may be formed by a wet method using electroless plating; or forming a passivation layer on the re-wiring layer as a re-wiring protection layer.
Thereafter, as shown in fig. 6I, a first solder ball 2411 is formed on the first sub-wiring layer 2431, a second solder ball 2412 is formed on the second sub-wiring layer 2432, specifically, the first solder ball 2411 is formed on the first solder pad, the second solder ball 2412 is formed on the second solder pad, the first extraction electrode includes the first sub-wiring layer 2431 and the first solder ball 2411 formed on the first sub-wiring layer 2431, the first extraction electrode is used for extracting the first electrode 221, the second extraction electrode includes the second sub-wiring layer 2432 and the second solder ball 2412 formed on the second sub-wiring layer 2432, and the second extraction electrode is used for extracting the second electrode 222. For example, the first and second solder balls 2411, 2412 may be formed by any suitable method such as ball plating, electroplated or printed solder balls.
Illustratively, as shown in FIG. 6J, the method of manufacture further comprises: a thinning process is performed on the semiconductor cap substrate 230 from the second surface of the semiconductor cap substrate 230, for example, removing a portion of the thickness of the semiconductor cap substrate 230 from the second surface of the semiconductor cap substrate 230, thinning the semiconductor cap substrate 230 to 20 μm-200 μm, for example, removing a portion of the thickness of the semiconductor cap substrate 230 may be performed by any suitable method, such as chemical mechanical polishing, etching, or the like. Optionally, the device base is protected before the thinning process is performed on the second surface of the semiconductor cap substrate 230, for example, a protective film is attached to the second surface of the device substrate 210 to protect the device base from scratches when the thinning process is performed.
It should be noted that the order of the steps is merely an example, and the order of the steps may be exchanged or alternatively performed without conflict.
The key manufacturing method of the bulk acoustic wave filter of the present application is introduced so far, and other preceding steps, intermediate steps or subsequent steps are required for manufacturing the complete device, which are not described herein.
In summary, according to the method for manufacturing the bulk acoustic wave filter provided by the application, the hole is formed in the cap metal layer, and the cap metal layer is used for filling the hole, so that the metal grid structure embedded in the first surface of the semiconductor cap substrate is formed, the cap metal layer becomes the heat dissipation layer and the stress release layer of the semiconductor cap substrate, the heat dissipation of the semiconductor cap substrate is obviously improved by the cap metal layer, the internal stress generated by the larger difference of thermal expansion coefficients is reduced, and the warping problem is avoided.
The application also provides an electronic device comprising the bulk acoustic wave filter, and the bulk acoustic wave filter can be prepared according to the method.
The electronic device of the embodiment may be any electronic product or apparatus such as a mobile phone, a tablet computer, a notebook computer, a netbook, a game console, a television, a VCD, a DVD, a navigator, a digital photo frame, a camera, a video camera, a recording pen, MP3, MP4, PSP, and the like, and may also be any intermediate product including a circuit. The electronic device of the embodiment of the application has better performance due to the adoption of the bulk acoustic wave filter.
Wherein fig. 7 shows an example of a mobile phone handset. The mobile phone handset 700 is provided with a display portion 702, an operation button 703, an external connection port 704, a speaker 705, a microphone 706, and the like, which are included in a housing 701.
The present application has been illustrated by the above-described embodiments, but it should be understood that the above-described embodiments are for purposes of illustration and description only and are not intended to limit the application to the embodiments described. In addition, it will be understood by those skilled in the art that the present application is not limited to the embodiments described above, and that many variations and modifications are possible in light of the teachings of the application, which variations and modifications are within the scope of the application as claimed. The scope of the application is defined by the appended claims and equivalents thereof.

Claims (14)

1. A bulk acoustic wave filter, comprising:
a device substrate;
the semiconductor cap substrate is characterized in that a cap metal layer is formed on the first surface of the semiconductor cap substrate, a bonding portion is formed on the cap metal layer, the cap metal layer is connected with the device substrate through the bonding portion, a plurality of holes penetrating through the semiconductor cap substrate are further formed in the semiconductor cap substrate, and the cap metal layer is further filled with a plurality of holes.
2. The bulk acoustic wave filter of claim 1, wherein the device substrate further comprises:
a device substrate having a first surface and a second surface opposite the first surface of the device substrate;
a device functional layer, the device functional layer comprising: a first electrode connected to the first surface of the device substrate, a piezoelectric layer covering the first electrode, and a second electrode covering the piezoelectric layer, the cap metal layer facing the second electrode;
the first extraction electrode is electrically connected with the first electrode, and the second extraction electrode is electrically connected with the second electrode.
3. The bulk acoustic wave filter of claim 2, wherein a re-wiring layer is formed on the second surface of the device substrate, the re-wiring layer comprising a first sub-wiring layer and a second sub-wiring layer isolated from the first sub-wiring layer, the first extraction electrode comprising the first sub-wiring layer and first solder balls formed on the first sub-wiring layer, the second extraction electrode comprising the second sub-wiring layer and second solder balls formed on the second sub-wiring layer.
4. The bulk acoustic wave filter of claim 3, wherein the device substrate is further formed with a plurality of first and second conductive material layers extending through the device substrate, a bottom of the first conductive material layer being connected to the first electrode, a bottom of the second conductive material layer being connected to a lead layer, the lead layer being located outside of and isolated from the first electrode, the lead layer being electrically connected to the second electrode.
5. The bulk acoustic wave filter of claim 3, wherein the device substrate is further formed with a first trench and a second trench extending through the device substrate, a bottom of the first trench exposing at least a portion of the first electrode, the first sub-wiring layer further covering a sidewall and a bottom of the first trench, a bottom of the second trench exposing at least a portion of a lead layer located outside of and isolated from the first electrode, the lead layer electrically connecting the second electrode, the second sub-wiring layer further covering a sidewall and a bottom of the second trench.
6. The bulk acoustic wave filter of claim 3, wherein a first bond metal is further formed on the first electrode, a second bond metal is further formed outside the first bond metal, the second bond metal is electrically connected to the second electrode, the first bond metal is electrically connected to the first sub-wiring layer, the second bond metal is electrically connected to the second sub-wiring layer, and the first surface of the device substrate is connected to the device functional layer through the first bond metal and the second bond metal.
7. A method of manufacturing a bulk acoustic wave filter, comprising:
providing a device substrate;
providing a semiconductor cap substrate, wherein a cap metal layer is formed on the first surface of the semiconductor cap substrate, and a bonding part is formed on the cap metal layer, wherein a plurality of holes are further formed in the semiconductor cap substrate, and the cap metal layer is further filled in the holes;
the cap metal layer is bonded to the device substrate through the bonding portion.
8. The method of manufacturing a bulk acoustic wave filter according to claim 7, wherein the device substrate comprises:
a device substrate having a first surface and a second surface opposite the first surface of the device substrate;
a device functional layer, the device functional layer comprising: a first electrode connected to the first surface of the device substrate, a piezoelectric layer covering the first electrode, and a second electrode covering the piezoelectric layer, wherein the cap metal layer faces the second electrode;
the manufacturing method further comprises the steps of: and forming a first extraction electrode and a second extraction electrode on the second surface of the device substrate, wherein the second surface of the device substrate is opposite to the first surface of the device substrate, the first extraction electrode is electrically connected with the first electrode, and the second extraction electrode is electrically connected with the second electrode.
9. The method of manufacturing of claim 7, wherein the method of forming the plurality of holes and the cap metal layer comprises:
forming a patterned photoresist layer on a first surface of the semiconductor cap substrate;
etching the semiconductor cap substrate by taking the patterned photoresist layer as a mask to form a plurality of holes;
and forming the cap metal layer to cover the first surface of the semiconductor cap substrate and fill the holes.
10. The method of manufacturing of claim 9, wherein after forming the cap metal layer, the method of manufacturing further comprises:
planarizing the cap metal layer.
11. The method of manufacturing of claim 8, wherein forming a first extraction electrode and a second extraction electrode on the second surface of the device substrate comprises:
forming a plurality of first through holes and second through holes penetrating through the device substrate;
forming a metal material filling the first and second through holes to form first and second conductive material layers, wherein the metal material also covers the second surface of the device substrate to form a re-wiring layer including a first sub-wiring layer and a second sub-wiring layer isolated from the first sub-wiring layer;
And forming a first solder ball on the first sub-wiring layer and forming a second solder ball on the second sub-wiring layer.
12. The method of manufacturing of claim 11, wherein after forming a redistribution layer on the second surface of the device substrate, the method of manufacturing further comprises:
forming a rewiring protective layer on the rewiring layer, wherein the rewiring protective layer exposes a first welding area of the first sub-wiring layer and a second welding area of the second sub-wiring layer;
forming a first solder ball on the first sub-wiring layer and a second solder ball on the second sub-wiring layer, comprising:
and forming the first solder balls in the first welding areas, and forming the second solder balls in the second welding areas.
13. The method of manufacturing of claim 8, further comprising: a thinning process is performed on the semiconductor cap substrate from a second surface of the semiconductor cap substrate and/or the device substrate is performed from the second surface of the device substrate before the first electrode and the second electrode are formed.
14. An electronic device comprising a bulk acoustic wave filter as claimed in any one of claims 1-6.
CN202310966972.5A 2023-08-02 2023-08-02 Bulk acoustic wave filter, manufacturing method thereof and electronic device Pending CN117060875A (en)

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CN202310966972.5A CN117060875A (en) 2023-08-02 2023-08-02 Bulk acoustic wave filter, manufacturing method thereof and electronic device

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Application Number Priority Date Filing Date Title
CN202310966972.5A CN117060875A (en) 2023-08-02 2023-08-02 Bulk acoustic wave filter, manufacturing method thereof and electronic device

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