CN117038494B - Auxiliary intelligent detection system for chip processing industry - Google Patents
Auxiliary intelligent detection system for chip processing industry Download PDFInfo
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- 238000004806 packaging method and process Methods 0.000 claims abstract description 45
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
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- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
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- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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Abstract
The invention discloses an auxiliary intelligent detection system for the chip processing industry, which belongs to the technical field of intelligent detection and comprises a pin installation defect detection module and the like. According to the invention, through calculating the slope of the line segment formed by connecting the middle points of the two short sides of the detection frame of each pin contact part, the pins which are not parallel to other pins are identified according to the difference value of the slope of each line segment and the average slope, so that the accurate detection of the parallelism of the pins is realized, the levelness of the pins is judged through the pixel value in the depth image, the non-horizontal pins are accurately identified, the accurate detection of the levelness of the pins is realized, and the more accurate pin installation quality score is obtained; the mounting defect data of the packaging shell can be accurately obtained, and further, the mounting quality score of the packaging shell can be obtained more accurately; and finally, according to the pin installation quality scores and the package shell installation quality scores, the installation quality of the current chip can be accurately scored.
Description
Technical Field
The invention relates to the technical field of intelligent detection, in particular to an auxiliary intelligent detection system for the chip processing industry.
Background
A chip is a form of package for an integrated circuit, which integrates electronic components, circuits, and systems on a tiny silicon die for implementing the functions of the electronic device. The chip is formed by electronic components such as a transistor, a resistor, a capacitor and the like, and is one of core components of various electronic equipment. The manufacture of chips requires high-precision, high-purity materials and complex process flows, which are important components of modern technology. The chip mainly comprises the following types: 1. digital chip: the digital chip processes data in a binary form and is mainly used in digital equipment such as computers, mobile phones and the like; 2. analog chip: the analog chip is a chip capable of processing, amplifying, converting, etc. continuous signals, and is mainly used for processing analog signals such as audio, video, etc. 3. Mixing chip: the hybrid chip is a combination of a digital chip and an analog chip, can process digital and analog signals at the same time, and is mainly used in the fields of communication, control, measurement and the like. 4. A microprocessor chip: the microprocessor chip is a chip capable of executing instructions and controlling the operation of a computer, and is mainly used in equipment such as computers, mobile phones and intelligent home furnishings. In a broad concept, the chip mainly comprises a package shell, a chip body and pins.
When the chip is mounted on the circuit board, a welding mode is often adopted for mounting, the chip mounting quality is required to be detected and evaluated after welding, the existing detecting and evaluating mode is not comprehensive enough, and comprehensive detecting and evaluating of the chip mounting quality is difficult to realize. For this reason, an auxiliary intelligent detection system for the chip processing industry is proposed.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: how to solve the problems that the existing detection and evaluation mode is not comprehensive enough and the comprehensive detection and evaluation of the chip mounting quality are difficult to realize when the chip mounting quality is required to be detected and evaluated after welding, and provides an auxiliary intelligent detection system for the chip processing industry.
The technical problems are solved by the following technical scheme, the invention comprises a pin installation defect detection module, a pin installation quality grading module, a packaging shell installation defect detection module, a packaging shell installation quality grading module and a comprehensive grading module;
the pin installation defect detection module is used for identifying pin installation defects and acquiring pin installation defect data;
the pin installation quality scoring module is used for scoring the pin installation quality of the current chip by using the acquired pin installation defect data to obtain a pin installation quality score;
the packaging shell installation defect detection module is used for identifying the packaging shell installation defect and acquiring packaging shell installation defect data;
the package shell installation quality grading module is used for grading the package shell installation quality of the current chip by utilizing the obtained package shell installation defect data to obtain package shell installation quality grading;
and the comprehensive scoring module is used for calculating and obtaining the installation quality comprehensive score of the current chip according to the pin installation quality score and the package shell installation quality score.
Further, the pin installation defect detection module comprises an image acquisition unit, a pin parallelism detection unit and a pin levelness detection unit; the image acquisition unit is used for acquiring a color image and a depth image of the chip after welding, namely a chip color image and a chip depth image; the pin parallelism detection unit is used for detecting each pin contact part in the chip color image through the target detection model to obtain each pin contact part detection frame and the position information of the pin contact part detection frame in the image, and acquiring parallelism detection data according to each pin contact part detection frame and the position information of the pin contact part detection frame in the image; the pin levelness detection unit is used for acquiring levelness detection data by utilizing the depth image according to the detection frames of the pin contact parts and the position information of the detection frames in the chip color image.
Furthermore, in the image acquisition unit, after the chip is welded on the circuit board, the color image and the depth image after the chip is welded are respectively acquired at the same position through the industrial camera and the depth camera, the industrial camera/depth camera is positioned above the chip and the circuit board during shooting, the optical axis of the industrial camera/depth camera is vertically arranged and is perpendicular to the plane of the upper end face of the circuit board, and the projection point of the optical axis of the industrial camera/depth camera on the plane of the upper end face of the circuit board is the center point of the chip mounting area, and the size and the resolution of the color image of the chip are the same as those of the depth image of the chip.
Further, the specific processing procedure of the pin parallelism detecting unit is as follows:
s11: detecting each pin contact part in the chip color image through the target detection model to obtain each pin contact part detection frame and the position information of each pin contact part detection frame in the image, and calculating coordinates of four corner points of each pin contact part detection frame;
s12: calculating and obtaining coordinates of points in the two short sides of each pin contact part detection frame in an image according to coordinates of four corner points of each pin contact part detection frame, wherein the points in the two short sides of each pin contact part detection frame are marked as D n1 、D n2 Wherein n in the subscript represents an nth pin contact portion detection frame;
s13: connecting the midpoints of two short sides of each pin contact part detection frame to obtain multiple line segments, denoted as Z n ；
S14: calculating the slope of each line segment, denoted as K Zn And calculating the arithmetic average of the slopes of the line segments, denoted as K avg ；
S15: calculating the slope K of each line segment Zn And the slope arithmetic mean value K avg Difference K between Difference n The difference K Difference n Exceeding a preset slope difference K Presetting The pins in the pin contact part detection frame corresponding to the line segments are marked as non-parallel pins, and the number Y1 of the non-parallel pins is counted and acquired, namely parallelism detection data is acquired.
Further, the specific processing procedure of the pin levelness detection unit is as follows:
s21: according to the detection frames of the pin contact parts and the position information of the detection frames of the pin contact parts in the color image of the chip, calculating coordinates of four corner points of the detection frames of the pin contact parts;
s22: cutting out each pin contact part detection frame area from the chip depth image according to coordinates of four corner points of each pin contact part detection frame to obtain a plurality of pin contact part detection frame depth images;
s23: acquiring pixel values of all pixel points in the depth image of each pin contact part detection frame, calculating the average value of the pixel values of all pixel points in the depth image of each pin contact part detection frame, and marking the average value as I navg ；
S24: calculating pixel values and average value I of all pixel points of depth image of each pin contact part detection frame navg The difference between the two is that for the depth image of the detection frame of each pin contact part, when the pixel value of any pixel point is equal to the average value I navg The difference between them is largeAt a preset pixel difference I Presetting And when the pin contact part detection frame depth image is used, the pins in the pin contact part detection frame depth image are marked as non-horizontal pins, and the number Y2 of the non-horizontal pins is counted and acquired, namely levelness detection data is acquired.
Further, the pin installation quality scoring module comprises a parallelism scoring unit, a levelness scoring unit and a pin installation quality scoring unit; the parallelism scoring unit is used for calculating and obtaining parallelism scoring S according to the number Y1 of non-parallel pins and the total pin number Y P The method comprises the steps of carrying out a first treatment on the surface of the The levelness scoring unit is used for calculating levelness scoring S according to the number Y2 of the non-horizontal pins and the total pin number Y S The method comprises the steps of carrying out a first treatment on the surface of the The pin installation quality scoring unit is used for scoring S according to parallelism P Levelness score S S And calculating to obtain a pin installation quality score A of the current chip, and sending the pin installation quality score A to the comprehensive scoring module.
Further, the parallelism score S P The calculation formula of (2) is as follows:
S P =（Y-Y1）/Y；
the levelness score S S The calculation formula of (2) is as follows:
S S =（Y-Y2）/Y；
the calculation formula of the pin installation quality score A is as follows:
A=W P *S P +W S *S S
wherein W is P Representing the parallelism score S P Installing the weight occupied by the quality score A on the pin, W S Representing the parallelism score S S The weight occupied by the quality score A is installed on the pin.
Furthermore, the package shell installation defect detection module comprises a deflection detection unit, wherein the deflection detection unit is used for detecting the package shell in the chip color image through the target detection model to obtain a package shell detection frame and position information thereof in the image, and acquiring deflection detection data, namely acquiring package shell installation defect data, according to the package shell detection frame and the position information thereof in the image.
Further, the specific processing procedure of the deflection detection unit is as follows:
s31: detecting the packaging shell in the chip color image through the target detection model to obtain a packaging shell detection frame and position information of the packaging shell in the image;
s32: calculating four corner coordinates of the detection frame of the packaging shell, calculating included angles between the upper edge and the lower edge of the detection frame of the packaging shell and the X axis of the color image of the chip, and respectively marking as Z Upper part 、Z Lower part(s) ；
S33: z is the included angle between the upper edge and the lower edge of the detection frame of the packaging shell and the X axis of the chip color image Upper part 、Z Lower part(s) Performing arithmetic average to obtain an included angle mean value Z avg Namely, acquiring the mounting defect data of the package shell;
in the package housing installation quality scoring module, a package housing installation quality scoring formula is as follows:
F=（Z max -Z avg ）/Z max
wherein F represents the packaging shell installation quality score, Z max Representing a preset maximum allowable skew angle threshold.
Further, in the comprehensive scoring module, a calculation formula of the installation quality comprehensive score is as follows:
T=W 1 *A+W 2 *F
wherein T represents the installation quality composite score, W 1 Representing the weight of the pin installation quality score A in the installation quality comprehensive score T, W 2 And the weight of the package shell installation quality score F in the installation quality comprehensive score T is represented.
Compared with the prior art, the invention has the following advantages: according to the auxiliary intelligent detection system for the chip processing industry, slope calculation is carried out on a line segment formed by connecting the middle points of two short sides of each pin contact part detection frame, so that pins which are not parallel to other pins are identified according to the difference value of the slope of each line segment and the average slope, the accurate detection of the parallelism of the pins is realized, the levelness of the pins is judged through the pixel value in the depth image, the non-horizontal pins are accurately identified, the accurate detection of the levelness of the pins is realized, and further, the more accurate pin installation quality score is obtained; the mounting defect data of the packaging shell can be accurately obtained, and further, the mounting quality score of the packaging shell can be obtained more accurately; finally, according to the pin installation quality score and the package shell installation quality score, the current chip installation quality can be accurately scored, and the problems that the existing detection and evaluation mode is not comprehensive enough and comprehensive detection and evaluation of the chip installation quality are difficult to realize are solved.
Drawings
FIG. 1 is a schematic diagram of an auxiliary intelligent detection system for the chip processing industry in accordance with an embodiment of the present invention;
FIG. 2 is a schematic top view of a chip according to an embodiment of the invention;
fig. 3 is a schematic diagram of a partial structure of a pin according to an embodiment of the present invention (side view).
Detailed Description
The following describes in detail the examples of the present invention, which are implemented on the premise of the technical solution of the present invention, and detailed embodiments and specific operation procedures are given, but the scope of protection of the present invention is not limited to the following examples.
As shown in fig. 1-2, the present embodiment provides a technical solution: an auxiliary intelligent detection system for the chip processing industry comprises a pin installation defect detection module, a pin installation quality grading module, a packaging shell installation defect detection module, a packaging shell installation quality grading module and a comprehensive grading module;
in this embodiment, the pin installation defect detection module is configured to identify a pin installation defect, obtain pin installation defect data, and send the pin installation defect data to the pin installation quality scoring module; through the pin installation defect detection module that sets up, can be accurate obtain pin installation defect data, and then obtain more accurate foot installation quality score.
More specifically, the pin installation defect detection module comprises an image acquisition unit, a pin parallelism detection unit and a pin levelness detection unit; the image acquisition unit is used for acquiring a color image and a depth image of the chip after welding, namely a chip color image and a chip depth image; the pin parallelism detection unit is used for detecting each pin contact part in the chip color image through the target detection model to obtain each pin contact part detection frame and position information (upper left corner coordinates and lower right corner coordinates) of the pin contact part detection frame in the image, and acquiring parallelism detection data according to each pin contact part detection frame and the position information of the pin contact part detection frame in the image; the pin levelness detection unit is used for acquiring levelness detection data by utilizing the depth image according to the detection frames of the pin contact parts and the position information of the detection frames in the chip color image.
More specifically, the pin mounting defect data includes parallelism detection data, levelness detection data.
More specifically, in the image acquisition unit, after the chip is welded on the circuit board, the color image and the depth image after the chip is welded are respectively acquired at the same position by the industrial camera and the depth camera, the industrial camera/the depth camera is positioned above the chip and the circuit board during shooting, the optical axis of the industrial camera/the depth camera is vertically arranged and is vertical to the plane of the upper end face of the circuit board, and the projection point of the optical axis of the industrial camera/the depth camera on the plane of the upper end face of the circuit board is the center point of the chip mounting area.
More specifically, the chip color image and the chip depth image are the same in size and resolution.
It should be noted that, in the present embodiment, the assembly formed by the chip body and the chip package housing 1 is in a standard shape, such as a cuboid or a cube, and the number of the pins 2 is plural, and the pins are symmetrically distributed on two sides of the package housing 1 (see fig. 2).
More specifically, the specific processing procedure of the pin parallelism detecting unit is as follows:
s11: detecting each pin contact part in the chip color image through the target detection model to obtain each pin contact part detection frame and the position information of each pin contact part detection frame in the image, and calculating coordinates of four corner points of each pin contact part detection frame;
s12: calculating and obtaining coordinates of points in the two short sides of each pin contact part detection frame in an image according to coordinates of four corner points of each pin contact part detection frame, wherein the points in the two short sides of each pin contact part detection frame are marked as D n1 、D n2 Wherein n in the subscript represents an nth pin contact portion detection frame;
s13: connecting the midpoints of two short sides of each pin contact part detection frame to obtain multiple line segments, denoted as Z n ；
S14: calculating the slope of each line segment, denoted as K Zn And calculating the arithmetic average of the slopes of the line segments, denoted as K avg ；
S15: calculating the slope K of each line segment Zn And the slope arithmetic mean value K avg Difference K between Difference n The difference K Difference n Exceeding a preset slope difference K Presetting The pins in the pin contact part detection frame corresponding to the line segments are marked as non-parallel pins, and the number Y1 of the non-parallel pins is counted and acquired, namely parallelism detection data is acquired.
The method is characterized in that the slope calculation is carried out on the line segment formed by connecting the middle points of the two short sides of the detection frame of each pin contact part, so that the pins which are not parallel to other pins are identified according to the difference value of the slope of each line segment and the average slope, and the accurate detection of the pin parallelism is realized.
More specifically, the specific processing procedure of the pin levelness detection unit is as follows:
s21: according to the detection frames of the pin contact parts and the position information of the detection frames of the pin contact parts in the color image of the chip, calculating coordinates of four corner points of the detection frames of the pin contact parts;
s22: cutting out each pin contact part detection frame area from the chip depth image according to coordinates of four corner points of each pin contact part detection frame to obtain a plurality of pin contact part detection frame depth images;
s23: acquiring pixel values of all pixel points in the depth image of each pin contact part detection frame, and calculating each pin contact part detectionMeasuring the average value of pixel values of all pixel points of the frame depth image, and marking the average value as I navg ；
S24: calculating pixel values and average value I of all pixel points of depth image of each pin contact part detection frame navg The difference between the two is that for the depth image of the detection frame of each pin contact part, when the pixel value of any pixel point is equal to the average value I navg The difference between them is greater than the preset pixel difference I Presetting And when the pin contact part detection frame depth image is used, the pins in the pin contact part detection frame depth image are marked as non-horizontal pins, and the number Y2 of the non-horizontal pins is counted and acquired, namely levelness detection data is acquired.
The pixel value of each pixel point in the depth image reflects the distance from an object in a scene to the depth camera, and the levelness of the pin is judged through the pixel value in the depth image, so that the pin which is not level is accurately identified, and the accurate detection of the levelness of the pin is realized.
In this embodiment, the pin installation quality scoring module is configured to score, by using the obtained pin installation defect data, the pin installation quality of the current chip, and obtain a pin installation quality score.
More specifically, the pin installation quality scoring module comprises a parallelism scoring unit, a levelness scoring unit and a pin installation quality scoring unit; the parallelism scoring unit is used for calculating and obtaining parallelism scoring S according to the number Y1 of non-parallel pins and the total pin number Y P The method comprises the steps of carrying out a first treatment on the surface of the The levelness scoring unit is used for calculating levelness scoring S according to the number Y2 of the non-horizontal pins and the total pin number Y S The method comprises the steps of carrying out a first treatment on the surface of the The pin installation quality scoring unit is used for scoring S according to parallelism P Levelness score S S And calculating to obtain a pin installation quality score A of the current chip, and sending the pin installation quality score A to the comprehensive scoring module.
More specifically, the parallelism score S P The calculation formula of (2) is as follows:
S P =（Y-Y1）/Y。
more specifically, the levelness score S S The calculation formula of (2) is as follows：
S S =（Y-Y2）/Y。
More specifically, the pin installation quality score a is calculated as follows:
A=W P *S P +W S *S S
wherein W is P Representing the parallelism score S P Installing the weight occupied by the quality score A on the pin, W S Representing the parallelism score S S Installing the weight occupied by the quality score A on the pin, W P +W S The specific value of =1 is selected according to the practical application.
In this embodiment, the package housing installation defect detection module is configured to identify a package housing installation defect, obtain package housing installation defect data, and send the package housing installation defect data to the package housing installation quality scoring module; through the encapsulation casing installation defect detection module that sets up, the encapsulation casing installation defect data that acquires that can be accurate, and then acquire more accurate encapsulation casing installation quality grade.
More specifically, the package shell installation defect detection module includes a deflection detection unit, where the deflection detection unit is configured to detect a package shell in a color image of a chip through a target detection model, obtain a package shell detection frame and position information (upper left corner coordinates and lower right corner coordinates) of the package shell detection frame in the image, and obtain deflection detection data according to the package shell detection frame and the position information of the package shell detection frame in the image, that is, obtain package shell installation defect data.
The deflection in the present embodiment refers to a deflection of the package case in the horizontal direction with respect to the optimum position after the package case is mounted.
More specifically, the skew detection unit has the following specific processing procedures:
s31: detecting the packaging shell in the chip color image through the target detection model to obtain a packaging shell detection frame and position information of the packaging shell in the image;
s32: calculating four corner coordinates of the detection frame of the packaging shell, and calculatingCalculating the included angles between the upper edge and the lower edge of the detection frame of the packaging shell and the X axis of the chip color image, and respectively marking as Z Upper part 、Z Lower part(s) ；
S33: z is the included angle between the upper edge and the lower edge of the detection frame of the packaging shell and the X axis of the chip color image Upper part 、Z Lower part(s) Performing arithmetic average to obtain an included angle mean value Z avg And acquiring the mounting defect data of the package shell.
In this embodiment, the package housing installation quality scoring module is configured to score, by using the obtained package housing installation defect data, the package housing installation quality of the current chip, thereby obtaining a package housing installation quality score.
More specifically, in the package housing installation quality scoring module, a package housing installation quality scoring formula is as follows:
F=（Z max -Z avg ）/Z max
wherein F represents the packaging shell installation quality score, Z max Representing a preset maximum allowable skew angle threshold.
In the present embodiment, Z is the value after the actual mounting avg Far less than Z max 。
In this embodiment, the comprehensive scoring module is configured to calculate and obtain a current chip installation quality comprehensive score according to the pin installation quality score and the package shell installation quality score. Through the comprehensive scoring module, the current chip mounting quality can be accurately scored, and the problems that the existing detection and evaluation mode is not comprehensive enough and the comprehensive detection and evaluation of the chip mounting quality are difficult to realize are solved.
More specifically, in the comprehensive scoring module, the calculation formula of the installation quality comprehensive score is as follows:
T=W 1 *A+W 2 *F
wherein T represents the installation quality composite score, W 1 Representing the weight of the pin installation quality score A in the installation quality comprehensive score T, W 2 Representing the occupation of the package shell installation quality score F in the installation quality comprehensive score TWeight, W of (2) 1 +W 2 The specific value of =1 is selected according to the practical application.
More specifically, the target detection model is obtained based on yolov3 network training, during training, a training sample (color image) manually marked with pins and a packaging shell is input into the yolov3 network for training, and when the detection performance of the network reaches a set value, parameters of the network are saved, so that the target detection model is obtained. It should be noted that the yolov3 network classifies the target after detecting it.
As shown in fig. 3, in this embodiment, the pin 2 includes a suspending portion 21, a vertical portion 22, and a contact portion 23, and the pin 2 passes through the package housing 1 to be connected with the chip body.
In summary, in the auxiliary intelligent detection system for chip processing industry in the above embodiment, by calculating the slope of the line segment formed by connecting the midpoints of the two short sides of the detection frame of each pin contact part, further identifying the pin which is not parallel to other pins according to the difference between the slope of each line segment and the average slope, accurate detection of the pin parallelism is realized, the levelness of the pin is judged by the pixel value in the depth image, and further the pin which is not horizontal is accurately identified, so that accurate detection of the levelness of the pin is realized, and further more accurate pin installation quality score is obtained; the mounting defect data of the packaging shell can be accurately obtained, and further, the mounting quality score of the packaging shell can be obtained more accurately; finally, according to the pin installation quality score and the package shell installation quality score, the current chip installation quality can be accurately scored, and the problems that the existing detection and evaluation mode is not comprehensive enough and comprehensive detection and evaluation of the chip installation quality are difficult to realize are solved.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (2)
1. An auxiliary intelligent detection system for the chip processing industry, comprising: the device comprises a pin installation defect detection module, a pin installation quality grading module, a packaging shell installation defect detection module, a packaging shell installation quality grading module and a comprehensive grading module;
the pin installation defect detection module is used for identifying pin installation defects and acquiring pin installation defect data;
the pin installation quality scoring module is used for scoring the pin installation quality of the current chip by using the acquired pin installation defect data to obtain a pin installation quality score;
the packaging shell installation defect detection module is used for identifying the packaging shell installation defect and acquiring packaging shell installation defect data;
the package shell installation quality grading module is used for grading the package shell installation quality of the current chip by utilizing the obtained package shell installation defect data to obtain package shell installation quality grading;
the comprehensive scoring module is used for calculating the installation quality comprehensive score of the current chip according to the pin installation quality score and the package shell installation quality score;
the pin installation defect detection module comprises an image acquisition unit, a pin parallelism detection unit and a pin levelness detection unit; the image acquisition unit is used for acquiring a color image and a depth image of the chip after welding, namely a chip color image and a chip depth image; the pin parallelism detection unit is used for detecting each pin contact part in the chip color image through the target detection model to obtain each pin contact part detection frame and the position information of the pin contact part detection frame in the image, and acquiring parallelism detection data according to each pin contact part detection frame and the position information of the pin contact part detection frame in the image; the pin levelness detection unit is used for acquiring levelness detection data by utilizing a depth image according to the detection frames of the pin contact parts and the position information of the detection frames in the chip color image;
the specific processing procedure of the pin parallelism detecting unit is as follows:
s11: detecting each pin contact part in the chip color image through the target detection model to obtain each pin contact part detection frame and the position information of each pin contact part detection frame in the image, and calculating coordinates of four corner points of each pin contact part detection frame;
s12: calculating and obtaining coordinates of points in the two short sides of each pin contact part detection frame in an image according to coordinates of four corner points of each pin contact part detection frame, wherein the points in the two short sides of each pin contact part detection frame are marked as D n1 、D n2 Wherein n in the subscript represents an nth pin contact portion detection frame;
s13: connecting the midpoints of two short sides of each pin contact part detection frame to obtain multiple line segments, denoted as Z n ；
S14: calculating the slope of each line segment, denoted as K Zn And calculating the arithmetic average of the slopes of the line segments, denoted as K avg ；
S15: calculating the slope K of each line segment Zn And the slope arithmetic mean value K avg Difference K between Difference n The difference K Difference n Exceeding a preset slope difference K Presetting The pins in the pin contact part detection frame corresponding to the line segments are marked as non-parallel pins, and the quantity Y1 of the non-parallel pins is counted and obtained, namely parallelism detection data are obtained;
the specific processing procedure of the pin levelness detection unit is as follows:
s21: according to the detection frames of the pin contact parts and the position information of the detection frames of the pin contact parts in the color image of the chip, calculating coordinates of four corner points of the detection frames of the pin contact parts;
s22: cutting out each pin contact part detection frame area from the chip depth image according to coordinates of four corner points of each pin contact part detection frame to obtain a plurality of pin contact part detection frame depth images;
s23: acquiring pixel values of all pixel points in the depth image of each pin contact part detection frame, calculating the average value of the pixel values of all pixel points in the depth image of each pin contact part detection frame, and marking the average value as I navg ；
S24: calculating pixel values and average value I of all pixel points of depth image of each pin contact part detection frame navg The difference between the two is that for the depth image of the detection frame of each pin contact part, when the pixel value of any pixel point is equal to the average value I navg The difference between them is greater than the preset pixel difference I Presetting The pins in the depth image of the pin contact part detection frame are marked as non-horizontal pins, and the number Y2 of the non-horizontal pins is counted and obtained, namely levelness detection data are obtained;
the pin installation quality scoring module comprises a parallelism scoring unit, a levelness scoring unit and a pin installation quality scoring unit; the parallelism scoring unit is used for calculating and obtaining parallelism scoring S according to the number Y1 of non-parallel pins and the total pin number Y P The method comprises the steps of carrying out a first treatment on the surface of the The levelness scoring unit is used for calculating levelness scoring S according to the number Y2 of the non-horizontal pins and the total pin number Y S The method comprises the steps of carrying out a first treatment on the surface of the The pin installation quality scoring unit is used for the rootAccording to the parallelism score S P Levelness score S S Calculating to obtain a pin installation quality score A of the current chip, and sending the pin installation quality score A to the comprehensive scoring module;
the parallelism score S P The calculation formula of (2) is as follows:
S P =（Y-Y1）/Y；
the levelness score S S The calculation formula of (2) is as follows:
S S =（Y-Y2）/Y；
the calculation formula of the pin installation quality score A is as follows:
A=W P *S P +W S *S S
wherein W is P Representing the parallelism score S P Installing the weight occupied by the quality score A on the pin, W S Representing the parallelism score S S Installing the weight occupied by the quality score A on the pin;
the packaging shell installation defect detection module comprises a deflection detection unit, wherein the deflection detection unit is used for detecting the packaging shell in the chip color image through the target detection model to obtain a packaging shell detection frame and position information thereof in the image, and acquiring deflection detection data according to the packaging shell detection frame and the position information thereof in the image, namely acquiring packaging shell installation defect data;
the specific processing procedure of the deflection detection unit is as follows:
s31: detecting the packaging shell in the chip color image through the target detection model to obtain a packaging shell detection frame and position information of the packaging shell in the image;
s32: calculating four corner coordinates of the detection frame of the packaging shell, calculating included angles between the upper edge and the lower edge of the detection frame of the packaging shell and the X axis of the color image of the chip, and respectively marking as Z Upper part 、Z Lower part(s) ；
S33: z is the included angle between the upper edge and the lower edge of the detection frame of the packaging shell and the X axis of the chip color image Upper part 、Z Lower part(s) Performing arithmetic average to obtain an included angle mean value Z avg I.e. obtaining the mounting gap of the package shellSinking data;
in the package housing installation quality scoring module, a package housing installation quality scoring formula is as follows:
F=（Z max -Z avg ）/Z max
wherein F represents the packaging shell installation quality score, Z max Representing a preset maximum allowable deflection angle threshold;
in the comprehensive scoring module, the calculation formula of the installation quality comprehensive score is as follows:
T=W 1 *A+W 2 *F
wherein T represents the installation quality composite score, W 1 Representing the weight of the pin installation quality score A in the installation quality comprehensive score T, W 2 And the weight of the package shell installation quality score F in the installation quality comprehensive score T is represented.
2. An auxiliary intelligent detection system for chip processing industry as claimed in claim 1, wherein: in the image acquisition unit, after the chip is welded on the circuit board, a color image and a depth image of the chip after welding are respectively acquired at the same position through the industrial camera and the depth camera, the industrial camera/the depth camera is positioned above the chip and the circuit board when shooting, the optical axis of the industrial camera/the depth camera is vertically arranged and is perpendicular to the plane of the upper end face of the circuit board, and the projection point of the optical axis of the industrial camera/the depth camera on the plane of the upper end face of the circuit board is the central point of the chip mounting area, and the size and the resolution of the color image of the chip are the same as those of the depth image of the chip.
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