CN1131816A - Integrated circuit mount checker - Google Patents

Integrated circuit mount checker Download PDF

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Publication number
CN1131816A
CN1131816A CN 95102426 CN95102426A CN1131816A CN 1131816 A CN1131816 A CN 1131816A CN 95102426 CN95102426 CN 95102426 CN 95102426 A CN95102426 A CN 95102426A CN 1131816 A CN1131816 A CN 1131816A
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CN
China
Prior art keywords
integrated circuit
pin
checker
light
symmetry evaluation
Prior art date
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Granted
Application number
CN 95102426
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Chinese (zh)
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CN1067176C (en
Inventor
宋菲君
宋建力
俞蕾
王长生
周汉贤
杨日兴
尹广顺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Daheng Group, Inc.
Singapore National Semiconductors
Original Assignee
Singapore National Semiconductors
China Daheng Co Ltd
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Publication date
Application filed by Singapore National Semiconductors, China Daheng Co Ltd filed Critical Singapore National Semiconductors
Priority to CN 95102426 priority Critical patent/CN1067176C/en
Publication of CN1131816A publication Critical patent/CN1131816A/en
Application granted granted Critical
Publication of CN1067176C publication Critical patent/CN1067176C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

An apparatus for detecting the pin offset of integrated circuit features that parallel light beams are used to irradiate the pins of IC device in two different directions, two rows of pins are divided into four sections which are simultaneously detected by specially designed optical splitting system and lens array, and special symmetry estimation function is defined to measure pin positions correctly. Its advantages include high-capacity parallel processing, and fast and correct detection.

Description

Integrated circuit mount checker
The invention belongs to semiconductor device detecting instrument field, be applicable to quick, the accurately detection of the semiconductor integrated circuit pin deviation of planar package.
Planar package type integrated circuit is the new generation of semiconductor device, it is characterized in that integrated level can do very highly, and number of pins is many, arranges closely.In order to guarantee down together the reliability of welding sequence automatically, very high to the geometric position requirement of pin.The deviation of pin geometric position has three classes: the firstth, and off-design position, pin center claims the lead pin pitch error; The secondth, when device was set level naturally on horizontal plane, some pin lower end and the distance of placing the plane claimed from surface error; The 3rd is pin bottom and the angular error (see figure 1) of placing the plane.Wherein 1 is device, ∑ dBe the horizontal positioned plane, C represents that from surface error, θ represents angular error, and p is the spacing of standard, and Δ p is an interval error.
In the packaging production line and the inspection center of device, requirement is measured these three kinds of errors and is screened by tolerance.Known method of measurement is optical measurement, for example measures with tool microscope, projecting apparatus, and its shortcoming is that speed is slow, is not suitable for streamline.And measuring method is difficult to measure the angular error that is positioned at interim pins.
The objective of the invention is, overcome the slow-footed shortcoming of optical measurement, adopt photoelectric measurement method, design special optical system, set up special data processing model, realize high accuracy, pin deviation measurement fast with new technical characterictic.
Technical scheme and technical characterictic to this invention is illustrated in conjunction with the accompanying drawings below:
Optical system of the present invention is as shown in Figure 2:
Four bromine tungsten filament lamps 2 (only drawing among the figure two) at first become hemistich light through collimating mirror 3, by turning back 45 ° behind half pentagonal prism 4, illuminating device 1.
Four lamps are lighted in turn by system controlled by computer, and every array of pins is only shone by a branch of directional light at synchronization, and the shadow falls of pin being blocked light formation is mapped on the imaging screen 5, forms the perspective view of pin.This figure at first is divided into two passages through Amici prism 6, and a passage is a transmitted light, through lens array 7 and main lens 8, perspective view is imaged on charge coupled device ccd 1Target surface on, convert the signal of telecommunication to and deliver to data handling system.Another passage is a reverberation, after reflective mirror 9 reflections, through the lens arra 7 and the main lens 8 of specification are imaged on CCD equally 2Target surface on, convert the signal of telecommunication to and deliver to data handling system.
Beam splitting system of the present invention is made of Amici prism 6 and reflective mirror 9, and it is divided into transmission and two passages of reflection symmetrically with imaging system, respectively to two groups of device relative pin imagings.
The custom-designed lens array of the present invention is one group 2 or 4 lens, is positioned on the same plane with light shaft positive cross (referring to Fig. 3).By center C 1, C 2, C 3And C 41/4 and 3/4 place of the corresponding pin of one group of opposite side of inferior optical axis alignment device, i.e. O among the figure 1, O 2, O 3And O 4Lens centre C ' 1, C ' 2, C ' 3And C ' 4With respect to C 1, C 2, C 3And C 4The small distance that staggers is called offset delta 1, δ 2, δ 3And δ 4Suitably select side-play amount, just can make the two opposite rows pin be divided into four sections, be imaged on simultaneously on the CCD target surface, in data handling system, in a frame, handle simultaneously.
Above-mentioned design is fully used the target surface of CCD, and resolution is doubled.
Fig. 4 is a pin forms shade under the directional light irradiation of two bundle different directions a schematic diagram.OA is the central shaft of pin front end (being approximately a cuboid) among the figure.
Establish ∑ among Fig. 5 dBe the placement plane of device, i.e. x, y plane, an array of pins is arranged along the x direction.Z axle and x, y planar quadrature.∑ cBe imaging screen.Directional light projects to ∑ with pin cOn.
If two shade centre coordinates are respectively x ', x ", ∑ cAnd ∑ dAt a distance of h, the thickness of pin is b, then the centre coordinate of this pin x = x ′ + x ′ ′ 2 - - - - ( 1 ) Acoplanarity C = z = x ′ ′ - x ′ 2 - ( h + b 2 ) - - - - ( 2 )
Different cross section is measured the z value on the y direction, is designated as { z m, with z mThese values are with the synthetic straight line of linear fitting, and the angle on it and x, y plane is exactly the θ (see figure 6).
Owing to following three reasons:
(1) light line degree is limited, and therefore the light beam that forms not is strict directional light;
(2) optical system exists diffraction and aberration;
(3) noise of imaging screen in scattering process makes the shade grey scale curve (I among Fig. 7 that obtains k) do not have desirable straight flange, but have the easement curve of random noise.Known data processing method is by I kMethods such as the differential maximum of sample value or differential center of gravity at first determine the accurate position at edge, and the center that defines two marginal positions then is the shade center, is called edge-detection algorithm.Because The noise, the decline of light intensity all can cause the variation of grey scale curve under the short term fluctuations of illuminance and long-term the use, thereby forms the error of edge detection.
The present invention does not adopt the edge detection scheme, and has defined the symmetry evaluation function E of grey scale curve k, measure the symmetrical centre of shade.For k sample point, E k = Σ n = N 1 N 2 ( I k - n - I k + n ) - - - - ( 3 ) N in the formula 1And N 2Be the natural number of suitably choosing, N 2>N 1, draw E among Fig. 7 kCurve.Obviously, the symmetrical centre of shade is corresponding to E kZero point, this point can be by E kSample value accurately obtain through linear regression method.
Advantage of the present invention and effect:
Obviously, above-mentioned three factors that influence edge metering, influence to two edges is identical, has same symmetry, they only change the shape of grey scale curve, but do not change the position of its symmetrical centre, the symmetrical centre of calculating according to this scheme has very high accuracy and anti-interference.Therefore, this integrated circuit mount checker is applicable to quick, the accurately detection of the semiconductor integrated circuit pin deviation of planar package.
Embodiments of the invention see that Fig. 1 is to shown in Figure 7.And by the mutual alignment of foregoing each parts and the device of optical system.The actual parameter of the part that adopts is: light source 2 is 12V, 20W bromine tungsten filament lamp; The aperture of lens 3 is 27mm, and focal length is 75mm; The deflection angle of half pentagonal prism 4 is 45 °; The splitting ratio of Amici prism 6 is 1: 1; The reflectivity of reflective mirror 9 〉=98%; The focal length of lens array 7 is 210mm, aperture 15mm; Side-play amount is respectively δ 23=0.5mm, δ 14=1.5mm; The focal length of main lens 8 is 75mm, and relative aperture is 1: 1.7; The pixel count of CCD is 795 * 596.
Description of drawings:
Fig. 1 planar integrated circuit pin deviation schematic diagram
1 planar integrated circuit
dThe horizontal positioned plane
C is from surface error
The θ angular error
The spacing of p standard
Δ p interval error
Fig. 2 optical system diagram
2 light sources (bromine tungsten filament lamp), 3 collimating mirrors
4 half pentagonal prisms, 5 imaging screens
6 Amici prisms, 7 lens arrays
8 main lenss, 9 reflective mirrors
The functional schematic of Fig. 3 lens array
Fig. 4 directional light is to the calculating of the projection action diagram 5 pin deviations of pin
cImaging screen Fig. 6 is by the data { z of z coordinate mCalculate the grey scale curve and the symmetry evaluation function curve of angle Fig. 7 pin projection image
The k sampled point
E kThe symmetry evaluation function
I kThe gray scale function of pin projection image

Claims (6)

1, the integrated circuit mount checker that has light source, collimating mirror, deviation prism, beam splitting system, imaging system, CCD (CCD) and data handling system, it is characterized in that having designed novel beam splitting system, and after the beam split each passage by the checkout gear that lens array constituted of unique design.
2, according to the described integrated circuit mount checker of claim 1, it is characterized in that: adopt directional light the integrated circuit (IC)-components pin to be shone from two different directions, two light beams of projection are directional light, and it is the two bundle directional lights that formed through two collimating lenses 3 and two and half pentagonal prisms 4 by two approximate point-source of lights 2.
3, according to the described integrated circuit mount checker of claim 1, it is characterized in that: beam splitting system is to be made of an Amici prism 6 and a speculum 9, imaging system is divided into two two passages of symmetry fully, respectively to the imaging of tested integrated circuit two opposite groups pin.
4, according to the described integrated circuit mount checker of claim 1, it is characterized in that: the lens array device in each passage of design is one group 2 or 4 lens, and be positioned on the same plane with light shaft positive cross, the skew of scioptics center, select suitable side-play amount, make device two opposite rows pin be divided into four sections, and be imaged on simultaneously on the CCD target surface, promptly in data handling system, can in a frame, handle simultaneously.
5, a kind of data processing method according to the described measurement device of claim 1 is characterized in that: be to have adopted with the symmetry evaluation of programme, definition symmetry evaluation function is accurately measured the symmetrical centre of pin shade, thereby calculates whole parameters of pin deviation.
6, according to the data processing method of the described symmetry evaluation of programme of claim 5, it is characterized in that: the symmetry evaluation of programme is the symmetry evaluation function E that has defined grey scale curve k, measure the symmetrical centre of shade.
CN 95102426 1995-03-17 1995-03-17 Integrated circuit mount checker Expired - Fee Related CN1067176C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 95102426 CN1067176C (en) 1995-03-17 1995-03-17 Integrated circuit mount checker

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 95102426 CN1067176C (en) 1995-03-17 1995-03-17 Integrated circuit mount checker

Publications (2)

Publication Number Publication Date
CN1131816A true CN1131816A (en) 1996-09-25
CN1067176C CN1067176C (en) 2001-06-13

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CN 95102426 Expired - Fee Related CN1067176C (en) 1995-03-17 1995-03-17 Integrated circuit mount checker

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CN (1) CN1067176C (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111065912A (en) * 2019-12-04 2020-04-24 长江存储科技有限责任公司 Inspection system for semiconductor device and related inspection method
CN111090038A (en) * 2018-10-24 2020-05-01 三星电子株式会社 Probe device and test device including the same
CN117038494A (en) * 2023-10-10 2023-11-10 天津芯成半导体有限公司 Auxiliary intelligent detection system for chip processing industry

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111090038A (en) * 2018-10-24 2020-05-01 三星电子株式会社 Probe device and test device including the same
CN111065912A (en) * 2019-12-04 2020-04-24 长江存储科技有限责任公司 Inspection system for semiconductor device and related inspection method
CN117038494A (en) * 2023-10-10 2023-11-10 天津芯成半导体有限公司 Auxiliary intelligent detection system for chip processing industry
CN117038494B (en) * 2023-10-10 2023-12-15 天津芯成半导体有限公司 Auxiliary intelligent detection system for chip processing industry

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