CN108241118B - PCB (printed circuit board) connecting plate paster processing system and method - Google Patents

PCB (printed circuit board) connecting plate paster processing system and method Download PDF

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Publication number
CN108241118B
CN108241118B CN201711101479.8A CN201711101479A CN108241118B CN 108241118 B CN108241118 B CN 108241118B CN 201711101479 A CN201711101479 A CN 201711101479A CN 108241118 B CN108241118 B CN 108241118B
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pcb
connecting plate
coordinate system
daughter board
pcb connecting
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CN108241118A (en
Inventor
李奔奔
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Jinghua Electronic Suzhou Co ltd
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Jinghua Electronic Suzhou Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/281Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/163Monitoring a manufacturing process

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

The embodiment of the invention provides a PCB (printed circuit board) connecting board paster processing system, which is characterized in that an SPI (serial peripheral interface) detection unit is provided for detecting a pad on a PCB connecting board, acquiring position information of a defective pad, comparing the position information of the defective pad with position range information of daughter boards in a database, sending the position range information of the daughter boards containing the position information of the defective pad or the position range information of the daughter boards except the daughter boards containing the defective pad to a paster processing unit, and the paster processing unit carries out paster processing on the daughter boards except the daughter boards containing the defective pad, so that the whole daughter boards with the defective pad cannot be pasted, material waste is avoided, processing time is saved, and efficiency is improved.

Description

PCB (printed circuit board) connecting plate paster processing system and method
Technical Field
The invention relates to a PCB (printed circuit board) chip mounting system, in particular to a chip mounting processing system and method for a PCB connecting plate.
Background
PCB (Printed Circuit Board) is widely used in the electronic industry, in order to improve the production efficiency of PCB, people develop a PCB connecting Board, a plurality of identical daughter boards are arranged on a mother Board, solder paste is arranged on the daughter boards, then the daughter boards are subjected to pasting processing, and a plurality of daughter boards can be produced at one time.
Disclosure of Invention
Therefore, the PCB connecting plate paster processing system is provided to solve the technical problem.
A PCB even board paster system of processing includes:
the SPI detection unit is used for detecting a bonding pad on a PCB connecting plate and acquiring position information of a defective bonding pad, and the PCB connecting plate comprises a plurality of daughter boards;
a database storing daughter board position range information;
the database also comprises a comparison unit, wherein the comparison unit is configured to compare the position information of the defect bonding pad with the position range information of the daughter board in the database, and send the position range information of the daughter board containing the position information of the defect bonding pad or the position range information of the daughter board except the daughter board containing the defect bonding pad to the patch processing unit.
The patch processing unit is used for performing patch processing on the daughter boards except the daughter board containing the defective bonding pad;
further, the position information is a coordinate point in a rectangular coordinate system.
Furthermore, the rectangular coordinate system is a rectangular coordinate system using the surface of the PCB as a reference surface.
Furthermore, the patch processing unit comprises a coordinate setting module for enabling a coordinate origin of the PCB connecting plate on the patch processing unit to coincide with a coordinate origin of the PCB connecting plate on the SPI detector.
Further, the database is arranged on a server, and the server is a cloud server.
The invention also provides a PCB connecting plate paster processing method, which comprises the following steps:
providing a PCB connecting plate, wherein the PCB connecting plate comprises a plurality of sub-plates;
detecting a bonding pad of the PCB connecting plate, and acquiring position information of a defective bonding pad;
comparing the position information of the defective bonding pad with the position range information of the daughter board in the database, and sending the position range information of the daughter board containing the position information of the defective bonding pad or the position range information of the daughter board except the daughter board containing the defective bonding pad;
and carrying out surface mounting processing on other daughter boards except the defective bonding pad daughter board in the PCB connecting board.
Further, before detecting the bonding pad of the PCB connecting plate and acquiring the position information of the defective bonding pad, the method also comprises the step of establishing a first x-y rectangular coordinate system taking the surface of the PCB connecting plate as a datum plane, and the step of establishing a second x-y rectangular coordinate system taking the surface of the PCB connecting plate as the datum plane before the step of carrying out surface mounting processing on other daughter boards except the defective bonding pad daughter board in the PCB connecting plate.
Furthermore, the first x-y rectangular coordinate system and the second x-y rectangular coordinate system are the same rectangular coordinate system.
Furthermore, the x axis and the y axis in the first x-y rectangular coordinate system and the second x-y rectangular coordinate system are two edge lines of the PCB connecting plate.
Furthermore, the first x-y rectangular coordinate system is different from the second rectangular coordinate system, and the step of transforming the second x-y rectangular coordinate system is further included after the step of establishing the second x-y rectangular coordinate system with the surface of the PCB as a reference surface.
Has the advantages that: the embodiment of the invention provides a PCB (printed circuit board) connecting board paster processing system, which is characterized in that an SPI (serial peripheral interface) detection unit is provided for detecting a pad on a PCB connecting board, acquiring position information of a defective pad, comparing the position information of the defective pad with position range information of daughter boards in a database, sending the position range information of the daughter boards containing the position information of the defective pad or the position range information of the daughter boards except the daughter boards containing the defective pad to a paster processing unit, and the paster processing unit carries out paster processing on the daughter boards except the daughter boards containing the defective pad, so that the whole daughter boards with the defective pad cannot be pasted, material waste is avoided, processing time is saved, and efficiency is improved.
Drawings
FIG. 1 is a block diagram of a PCB connecting board paster processing system of the present invention;
FIG. 2 is a schematic diagram of a daughter board position range of the PCB connecting board patch processing system of the present invention;
FIG. 3 is a flow chart of a PCB connecting plate paster processing method of the present invention.
Detailed Description
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Fig. 1 is a schematic diagram of a module composition of a PCB connecting board 100 patch processing system of the present invention, and fig. 1 shows that the PCB connecting board 100 patch processing system provided in the embodiment of the present invention includes an SPI detection unit 12, a database 13, and a patch processing unit 15.
In addition, a PCB feeding unit 10 and a solder paste printing unit 11 may be further disposed upstream of the SPI detection unit 12, and are configured to provide the PCB connecting board 100, and arrange solder paste on the pads of the PCB connecting board 100, so that the mounting processing unit 15 can perform mounting processing on the pads, and a curing unit, a reflow soldering unit, and the like may be further included after the mounting processing unit 15, and are configured to solder the mounted components to the PCB, and of course, a post detection unit 16, such as an Automatic Optical Inspection (AOI), an X-RAY detection system, and the like, may be further disposed after the mounting processing unit 15, and will not be described herein again.
Referring to fig. 2, in the present embodiment, the PCB connecting board 100 includes four sub-boards 101, which are respectively denoted as a sub-board a, a sub-board B, a sub-board C, and a sub-board D in the figure, although the PCB connecting board 100 may further include other numbers of sub-boards 101, which is not limited herein.
The SPI detection unit 12 is configured to detect a pad on the PCB connecting board 100 and obtain location information of a defective pad. The SPI detection unit 12 includes an SPI detector, and the SPI detector may detect the solder paste printing quality of the pads on the PCB connecting board 100 in a PMP (phase modulation profile measurement) or Laser (Laser triangulation measurement) manner and acquire the position information of the defective pads.
PMP (phase modulation profile measurement) is a detection method for obtaining high-precision solder data by measuring solder paste through phase change of a structured grating or measuring gray scale change of the structured grating using a white light source. Laser (Laser triangulation) through Laser light source to PCB even board 100 transmission Laser beam, the distortion that the Laser beam produced at the different height planes on PCB even board 100, a detection head includes the camera, according to certain direction continuous motion, acquires image information according to setting for the time interval to acquire a set of Laser distortion data, with the detection mode that obtains the soldering tin data of high accuracy.
The SPI detector detects pads on the surface of the PCB connecting board 100 one by one, and when detecting a defective pad, records position information of the current defective pad, specifically, in this embodiment, the position information is a coordinate point in a rectangular coordinate system, the rectangular coordinate system is an x-y rectangular coordinate system using the surface of the PCB connecting board 100 as a reference surface, using an O point in fig. 2 as an origin, using an up-down direction in fig. 2 as an x axis, and using a left-right direction in fig. 2 as a y axis.
In addition, in this embodiment, the origin of the coordinate system is established at the position where the intersection of the two edge lines of the PCB connecting board 100 coincides, and the x-axis and the y-axis coincide with the two mutually perpendicular edge lines of the PCB connecting board 100, respectively, so that when the PCB connecting board 100 is transferred to the patch processing device, the patch processing device easily establishes the corresponding coordinate system used by the SPI detector, thereby facilitating the patch processing device to easily process the PCB connecting board 100.
It will be appreciated that the coordinate system described in other embodiments may be established in other locations or in other forms of coordinate systems, such as a polar coordinate system.
Database 13 be connected with SPI detecting element 12, database 13 set up on the server, the server can be on local server or the cloud server, work as the server be the cloud server, PCB even board 100 paster system of processing still include network system.
The database 13 stores position range information of the daughter board 101, the position range information of the daughter board 101 refers to information for calibrating a position of the daughter board 101 and a range of the daughter board 101, and specifically, when the coordinate system is a rectangular coordinate system, the position range information of the daughter board 101 is a plurality of coordinate points included in the rectangular coordinate system and an area surrounded by a connecting line of the adjacent coordinate points. In the present embodiment, the positional range information of the daughter board a is a square region surrounded by the coordinate points (0.1 ), (0.1, 1.1), (1.1 ), (1.1, 0.1), and the positional range information of the daughter board B is a square region surrounded by the coordinate points (1.2, 0.1), (2.2, 0.1), (2.2, 1.1), (1.2, 1.1).
The database 13 further includes a comparing unit 14, and the comparing unit 14 is configured to compare the defective pad position information with the daughter board 101 position range information in the database 13, and send the daughter board 101 position range information including the defective pad position information or the position range information of other daughter boards 101 except the defective pad daughter board 101 to the chip processing unit 15.
Specifically, when the defective pad position information is a coordinate point (0.5 ) on a rectangular coordinate system, the comparing unit 14 compares the coordinate point with the position range information of each daughter board 101, where the coordinate point (0.5 ) is located in the position range information of the daughter board a: in the square area enclosed by (0.1 ), (0.1, 1.1), (1.1 ), (1.1, 0.1), the comparison unit sends the position range information of the daughter board a to the patch processing unit 15, the patch processing unit 15 receives the daughter board 101 containing the position information of the defective pad sent by the comparison unit 14, such as the position range information of the daughter board a in the present embodiment, and performs patch processing on the daughter boards 101 other than the daughter board a, that is, performs patch processing on the daughter board B, the daughter board C, and the daughter board D.
It can be understood that the comparison unit 14 may also generate the position range information of the daughter board 101 on the PCB connecting board 100 except for the daughter board 101 including the defective pad to the chip mounting processing unit 15, and the chip mounting processing unit 15 may also perform chip mounting processing on the daughter board 101 on the PCB board except for the daughter board 101 including the defective pad; as in this embodiment, the comparison unit 14 may send the position range information of the daughter board B, the daughter board C, and the daughter board D to the chip processing unit 15, and the chip processing unit 15 may perform chip processing on the daughter board B, the daughter board C, and the daughter board D.
It can be understood, paster processing unit 15 include paster processingequipment for even board 100 carries out the paster processing to PCB, for the messenger paster processingequipment conveniently carries out the paster processing to PCB even board 100, paster processing unit 15 include the coordinate setting module, when being used for making PCB even board 100 to set up paster processingequipment, PCB even board 100 coordinate origin on paster processing unit 15 and PCB even board 100 coordinate origin coincidence on the SPI detector to and PCB even board 100 x axle, the y axle on paster processing unit 15 are overlapped with PCB even board 100 x axle, the y axle on the SPI detector respectively.
Further, the patch processing unit 15 further includes a coordinate system conversion module, so that the PCB connecting board 100 adjusts a coordinate system, which facilitates patch processing.
Further, the PCB connecting board 100 patch processing system further includes an input unit for inputting position range information of the daughter board 101 or position information of the defective bonding pad to the database 13 through the input unit, the input unit includes an input device, and the input device may be a keyboard, a sound pickup, a writing pad, or the like. In addition, the input unit may further include a scanning device, which may be a camera, a barcode scanner, or the like, for acquiring the image information or barcode information of the PCB connecting board 100 through the scanning device. Of course, the input unit may also input other required information, which is not described herein again.
Referring to fig. 3, the present invention also provides a method for processing a PCB connecting board 100 by a chip mounting process, including the following steps:
s1: providing a PCB connecting board 100, wherein the PCB connecting board 100 comprises a plurality of sub-boards 101;
s2: detecting a bonding pad of the PCB connecting plate 100 and acquiring position information of a defective bonding pad;
s3: comparing the position information of the defective pad with the position range information of the daughter board 101 in the database 13, and sending the position range information of the daughter board 101 containing the position information of the defective pad or the position range information of the daughter board 101 except the daughter board 101 containing the defective pad;
s4: the sub-board 101 except the defective pad sub-board 101 in the PCB connection board 100 is subjected to a mounting process.
The database 13 stores the position range information of the daughter board 101, and before comparing the position information of the defective pad with the position range information of the daughter board 101 in the database 13, the method further includes the step of establishing the database 13 storing the position range information of the daughter board 101.
The database 13 for establishing the position range information of the daughter board 101 may be input into the database 13 through an input unit.
It is understood that the daughter board 101 position range information stored in the database 13 uses the same coordinate system as the defect pad position information.
Before S2, the method further includes the following steps:
s21: establishing a first x-y rectangular coordinate system with the surface of the PCB connecting plate 100 as a datum plane;
similarly, the method further includes the following steps before the step of S4:
s41: establishing a second x-y rectangular coordinate system with the surface of the PCB connecting plate 100 as a reference surface;
in addition, the first x-y rectangular coordinate system and the second x-y rectangular coordinate system are the same rectangular coordinate system, the same means that the first x-y rectangular coordinate system and the second x-y rectangular coordinate system use the same reference position as an origin and use the same edge line of the PCB connecting board 100 as a reference line of x-axis and y-axis, preferably, when the edge lines of the two PCB connecting boards 100 are perpendicular, the x-axis and the y-axis are the two edge lines of the PCB connecting board 100. As in the present embodiment, the origin is an intersection point of a left edge line and a lower edge line of the PCB connecting board 100, the x-axis is the lower edge line, and the y-axis is the left edge line.
In addition, when the first x-y rectangular coordinate system is different from the second rectangular coordinate system, a step of transforming the second x-y rectangular coordinate system may be further included after the step of S41 so that the first x-y rectangular coordinate system and the second x-y rectangular coordinate system have the same origin.
In addition, other modifications within the spirit of the invention will occur to those skilled in the art, and it is understood that such modifications are included within the scope of the invention as claimed.

Claims (3)

1. A PCB even board paster system of processing includes:
the SPI detection unit is used for detecting a pad on the PCB connecting plate and acquiring position information of a defective pad, the PCB connecting plate comprises a plurality of daughter boards, the position information is a coordinate point in a rectangular coordinate system, the rectangular coordinate system is the rectangular coordinate system taking the surface of the PCB connecting plate as a reference surface, the origin of the coordinate system is established at the position where the intersection points of two edge lines of the PCB connecting plate coincide, the x axis and the y axis of the rectangular coordinate system coincide with the two mutually perpendicular edge lines of the PCB connecting plate respectively, and the SPI detection unit comprises an SPI detector;
a database storing daughter board position range information;
the database also comprises a comparison unit, wherein the comparison unit is configured to compare the position information of the defective bonding pad with the position range information of the daughter board in the database and send the position range information of the daughter board containing the position information of the defective bonding pad or the position range information of the daughter board except the daughter board containing the defective bonding pad to the patch processing unit;
the patch processing unit carries out patch processing on the daughter board except the daughter board containing the defective bonding pad daughter board, the patch processing unit comprises a coordinate setting module, a coordinate origin of the PCB connected with the patch processing unit coincides with a coordinate origin of the PCB connected with the SPI detector, and an x axis and a y axis of the PCB connected with the patch processing unit coincide with an x axis and a y axis of the PCB connected with the SPI detector respectively.
2. The PCB strip-and-patch processing system of claim 1, wherein the database is disposed on a server, and the server is a cloud server.
3. A PCB connecting plate paster processing method is applied to the PCB connecting plate paster processing system of any one of claims 1-2, and comprises the following steps:
providing a PCB connecting plate, wherein the PCB connecting plate comprises a plurality of sub-plates;
establishing a first x-y rectangular coordinate system with the surface of the PCB connecting plate as a datum plane, wherein the x axis and the y axis of the first x-y rectangular coordinate system are two edge lines of the PCB connecting plate;
detecting a bonding pad of the PCB connecting plate, and acquiring position information of a defective bonding pad;
comparing the position information of the defective bonding pad with the position range information of the daughter board in the database, and sending the position range information of the daughter board containing the position information of the defective bonding pad or the position range information of the daughter board except the daughter board containing the defective bonding pad;
a second x-y rectangular coordinate system taking the surface of the PCB connecting plate as a datum plane, wherein the second x-y rectangular coordinate system and the first x-y rectangular coordinate system are the same rectangular coordinate system, and an x axis and a y axis in the second x-y rectangular coordinate system are two edge lines of the PCB connecting plate;
and carrying out surface mounting processing on other daughter boards except the defective bonding pad daughter board in the PCB connecting board.
CN201711101479.8A 2017-11-10 2017-11-10 PCB (printed circuit board) connecting plate paster processing system and method Active CN108241118B (en)

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CN113453439B (en) * 2021-07-15 2022-11-11 吉安满坤科技股份有限公司 Sensing control Touch technology printed circuit board and preparation method thereof
CN116503401B (en) * 2023-06-26 2023-09-22 成都数联云算科技有限公司 PCB (printed circuit board) connection board target detection method, device, equipment and medium

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105486698A (en) * 2016-01-07 2016-04-13 苏州市璟硕自动化设备有限公司 AOI automatic detection device and detection method
CN105844048A (en) * 2012-03-28 2016-08-10 株式会社高永科技 Method for inspecting and generating work data of PCB inspection device
CN106504295A (en) * 2016-09-22 2017-03-15 北京小米移动软件有限公司 Render the method and device of picture
CN107197600A (en) * 2017-05-12 2017-09-22 深圳市路远电子科技有限公司 The preparation method of printing circuit board element

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6891967B2 (en) * 1999-05-04 2005-05-10 Speedline Technologies, Inc. Systems and methods for detecting defects in printed solder paste

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105844048A (en) * 2012-03-28 2016-08-10 株式会社高永科技 Method for inspecting and generating work data of PCB inspection device
CN105486698A (en) * 2016-01-07 2016-04-13 苏州市璟硕自动化设备有限公司 AOI automatic detection device and detection method
CN106504295A (en) * 2016-09-22 2017-03-15 北京小米移动软件有限公司 Render the method and device of picture
CN107197600A (en) * 2017-05-12 2017-09-22 深圳市路远电子科技有限公司 The preparation method of printing circuit board element

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
应用锡膏检测系统SPI以预防缺陷提高盈利;Stacy Johnson等;《http://www.smthome.org/192.html》;20070411;摘要 *

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