CN116779663A - 一种新型集成栅极电阻的igbt结构 - Google Patents

一种新型集成栅极电阻的igbt结构 Download PDF

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CN116779663A
CN116779663A CN202311055227.1A CN202311055227A CN116779663A CN 116779663 A CN116779663 A CN 116779663A CN 202311055227 A CN202311055227 A CN 202311055227A CN 116779663 A CN116779663 A CN 116779663A
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gate
resistor
metal
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igbt structure
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訾彤彤
袁雄
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Hefei Archimedes Electronic Technology Co ltd
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7398—Vertical transistors, e.g. vertical IGBT with both emitter and collector contacts in the same substrate side
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT

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Abstract

本发明公开一种新型集成栅极电阻的IGBT结构，涉及IGBT结构技术领域，包括栅极金属、栅极电阻和元胞区，元胞区内具有多晶硅栅，栅极电阻位于栅极金属与多晶硅栅之间，栅极金属与栅极电阻之间、栅极电阻与元胞区之间均设置有电介质层，电介质层中设置有用于连接栅极金属和栅极电阻的第一接触孔，以及用于连接栅极电阻和多晶硅栅的第二接触孔；本发明中两层金属结构间隔设置在元胞区的上方，栅极电阻与元胞区不在一个平面上，可以有效降低芯片面积；本发明中栅极金属、栅极电阻和元胞区自上而下依次垂直设置，电流纵向传递，使得电流密度增加，可以提高芯片性能。

Description

一种新型集成栅极电阻的IGBT结构
技术领域
本发明涉及IGBT结构技术领域，特别是涉及一种新型集成栅极电阻的IGBT结构。
背景技术
绝缘栅双极晶体管(Insulate-Gate Bipolar Transistor—IGBT)综合了电力晶
体管(Giant Transistor—GTR)和电力场效应晶体管(Power MOSFET)的优点，具有良好的特性，应用领域很广泛；IGBT也是三端器件：栅极，集电极和发射极。
IGBT(Insulated-Gate Bipolar Transistor)是MOS结构双极器件，属于具有功率MOSFET的高速性能与双极的低电阻性能的功率器件。IGBT的应用范围一般都在耐压600V以上、电流10A以上、频率为1kHz以上的区域。多使用在工业用电机、民用小容量电机、变换器(逆变器)、照相机的频闪观测器、感应加热(InductionHeating)电饭锅等领域。IGBT是强电流、高压应用和快速终端设备用垂直功率MOSFET的自然进化。MOSFET由于实现一个较高的击穿电压BVDSS需要一个源漏通道，而这个通道却具有很高的电阻率，因而造成功率MOSFET具有RDS(on)数值高的特征，IGBT消除了现有功率MOSFET的这些主要缺点。虽然最新一代功率MOSFET器件大幅度改进了RDS(on)特性，但是在高电平时，功率导通损耗仍然要比IGBT高出很多。
IGBT作为重要的电力电子器件，在大功率和高速场景应用越来越广泛。大部分高功率应用场景中需要使用多颗IGBT芯片，此时各芯片的均流和振荡特性在设计端需要特别关注。其中，内置栅极电阻是一种比较有效的手段。通常在发射极和栅极之间集成一个电阻。传统结构的IGBT是单层金属结构，栅极电阻结构和元胞在一个平面，如图1、图2所示，导致IGBT的面积增大，不仅不便于安装，制造成本也比较高。
发明内容
本发明的目的是提供一种新型集成栅极电阻的IGBT结构，以解决现有技术存在的问题，栅极金属、栅极电阻和元胞区自上而下依次垂直设置，可以有效降低芯片面积，使芯片体积更加小巧，并且可以提高芯片性能。
为实现上述目的，本发明提供了如下方案：本发明提供一种新型集成栅极电阻的IGBT结构，包括栅极金属、栅极电阻和元胞区，所述元胞区内具有多晶硅栅，所述栅极电阻位于所述栅极金属与所述多晶硅栅之间，所述栅极金属与所述栅极电阻之间、所述栅极电阻与所述元胞区之间均设置有电介质层，所述电介质层中设置有用于连接所述栅极金属和所述栅极电阻的第一接触孔，以及用于连接所述栅极电阻和所述多晶硅栅的第二接触孔。
优选的，所述多晶硅栅间隔排列有若干个，所述栅极金属和所述栅极电阻均沿若干所述多晶硅栅的排列方向设置。
优选的，所述栅极电阻为一体结构，若干所述多晶硅栅的端部通过连接部相连接，所述栅极电阻通过所述第二接触孔与所述连接部连接。
优选的，所述栅极电阻包括若干电阻分体，所述第一接触孔与所述第二接触孔均对应设置有若干个，所述电阻分体通过所述第一接触孔与所述栅极金属连接，所述电阻分体通过所述第二接触孔与所述多晶硅栅连接。
优选的，若干所述电阻分体共面设置。
优选的，所述栅极电阻的材质为金属铝。
优选的，所述元胞区的结构为沟槽栅型或平面型。
优选的，所述元胞区包括集电区，所述集电区上形成有场截止层，所述场截止层上设置有N基区，所述N基区上形成P体区，所述P体区与所述多晶硅栅之间具有栅氧化层；所述P体区与所述电介质层之间具有NPlus区。
本发明相对于现有技术取得了以下技术效果：
1、本发明中两层金属结构间隔设置在元胞区的上方，栅极电阻与元胞区不在一个平面上，可以有效降低芯片面积；
2、本发明中栅极金属、栅极电阻和元胞区自上而下依次垂直设置，电流纵向传递，使得电流密度增加，可以提高芯片性能；同时，本发明中栅极电阻的尺寸形状不再受元胞区侧部空间的限制，可以设置成方形、圆形或其他形状，并且在合适的位置做孔接触，结构设置更加灵活；
3、传统IGBT结构中采用掺杂poly作为栅极电阻材料，缺点是经过热过程多晶的晶界会发生变化引起电阻不稳定，存在可靠性问题。本发明使用金属铝作为栅极电阻材料，电阻更加稳定，有利于芯片平稳工作。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为现有的IGBT结构的纵切面示意图；
图2为现有的IGBT结构的俯视图；
图3为本发明IGBT结构中栅极电阻为一体式结构时的结构示意图；
图4为本发明IGBT结构中栅极电阻为分体结构时的结构示意图；
其中，1、元胞区；2、栅极金属；3、栅极电阻；4、多晶硅栅；5、电介质层；6、第一接触孔；7、第二接触孔；8、集电区；9、场截止层；10、N基区；11、P体区；12、栅氧化层；13、NPlus区；14、栅总线；15、终端结构。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明的目的是提供一种新型集成栅极电阻的IGBT结构，以解决现有技术存在的问题，栅极金属、栅极电阻和元胞区自上而下依次垂直设置，可以有效降低芯片面积，使芯片体积更加小巧，并且可以提高芯片性能。
为使本发明的上述目的、特征和优点能够更加明显易懂，下面结合附图和具体实施方式对本发明作进一步详细的说明。
如图3、图4所示，本实施例提供一种新型集成栅极电阻的IGBT结构，包括元胞区1，元胞区1上方平行间隔设置有两层金属结构，外层的金属结构为栅极金属2，内层的金属结构为栅极电阻3。元胞区1内设置有若干多晶硅栅4，栅极金属2与栅极电阻3之间、栅极电阻3与元胞区1之间均设置有电介质层5，电介质层5中设置有用于连接栅极金属2和栅极电阻3的第一接触孔6，以及用于连接栅极电阻3和多晶硅栅4的第二接触孔7。
本实施例中两层金属结构间隔设置在元胞区1的上方，栅极电阻3与元胞区1不在一个平面上，可以有效降低芯片面积。并且，栅极金属2、栅极电阻3和元胞区1自上而下依次设置，电流纵向传递，使得电流密度增加，可以提高芯片性能。同时，本实施例中栅极电阻3的尺寸形状不再受元胞区1侧部空间的限制，可以设置成方形、圆形或其他形状，并且在合适的位置做孔接触，结构设置更加灵活。
需要说明的是，将栅极金属2、栅极电阻3和元胞区1自上而下依次设置后，本领域技术人员按照现有加工工艺亦可实现，无需对加工工艺进行过多改进。
进一步的，本实施例中栅极电阻3的材质为金属铝。传统IGBT结构中采用掺杂poly作为栅极电阻3材料，缺点是经过热过程多晶的晶界会发生变化引起电阻不稳定，存在可靠性问题。本实施例使用金属铝作为栅极电阻3材料，电阻更加稳定，有利于芯片平稳工作。
本实施例中栅极电阻3可以为一体式的整体结构，也可以为分体结构。当栅极电阻3为一体结构时，若干多晶硅栅4的端部通过连接部相连接，栅极电阻3通过第二接触孔7与连接部连接。当栅极电阻3为分体结构时，其包括若干电阻分体，电阻分体的数量与多晶硅栅4的数量相同，并且第一接触孔6与第二接触孔7均对应设置有相同数量的若干个。电阻分体通过第一接触孔6与栅极金属2连接，电阻分体通过第二接触孔7与多晶硅栅4连接。当栅极电阻3为分体结构时，更利于芯片自身各部分开关均一。
本实施例中元胞区1的结构为沟槽栅型或平面型。
具体的，本实施例中元胞区1包括集电区8，集电区8上形成有场截止层9，场截止层9上设置有N基区10，N基区10上形成P体区11，P体区11与多晶硅栅4之间具有栅氧化层12；P体区11与电介质层5之间具有NPlus区13。
图4为IGBT结构的平面结构示意图，栅总线14内为元胞区1、栅极金属2和栅极电阻3，栅总线14外部为终端结构15。
根据实际需求而进行的适应性改变均在本发明的保护范围内。
需要说明的是，对于本领域技术人员而言，显然本发明不限于上述示范性实施例的细节，而且在不背离本发明的精神或基本特征的情况下，能够以其他的具体形式实现本发明。因此，无论从哪一点来看，均应将实施例看作是示范性的，而且是非限制性的，本发明的范围由所附权利要求而不是上述说明限定，因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。

Claims (8)

1.一种新型集成栅极电阻的IGBT结构，其特征在于，包括栅极金属、栅极电阻和元胞区，所述元胞区内具有多晶硅栅，所述栅极电阻位于所述栅极金属与所述多晶硅栅之间，所述栅极金属与所述栅极电阻之间、所述栅极电阻与所述元胞区之间均设置有电介质层，所述电介质层中设置有用于连接所述栅极金属和所述栅极电阻的第一接触孔，以及用于连接所述栅极电阻和所述多晶硅栅的第二接触孔。
2.根据权利要求1所述的新型集成栅极电阻的IGBT结构，其特征在于，所述多晶硅栅间隔排列有若干个，所述栅极金属和所述栅极电阻均沿若干所述多晶硅栅的排列方向设置。
3.根据权利要求2所述的新型集成栅极电阻的IGBT结构，其特征在于，所述栅极电阻为一体结构，若干所述多晶硅栅的端部通过连接部相连接，所述栅极电阻通过所述第二接触孔与所述连接部连接。
4.根据权利要求2所述的新型集成栅极电阻的IGBT结构，其特征在于，所述栅极电阻包括若干电阻分体，所述第一接触孔与所述第二接触孔均对应设置有若干个，所述电阻分体通过所述第一接触孔与所述栅极金属连接，所述电阻分体通过所述第二接触孔与所述多晶硅栅连接。
5.根据权利要求4所述的新型集成栅极电阻的IGBT结构，其特征在于，若干所述电阻分体共面设置。
6.根据权利要求1~5任意一项所述的新型集成栅极电阻的IGBT结构，其特征在于，所述栅极电阻的材质为金属铝。
7.根据权利要求1~5任意一项所述的新型集成栅极电阻的IGBT结构，其特征在于，所述元胞区的结构为沟槽栅型或平面型。
8.根据权利要求1~5任意一项所述的新型集成栅极电阻的IGBT结构，其特征在于，所述元胞区包括集电区，所述集电区上形成有场截止层，所述场截止层上设置有N基区，所述N基区上形成P体区，所述P体区与所述多晶硅栅之间具有栅氧化层；所述P体区与所述电介质层之间具有NPlus区。
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Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5275963A (en) * 1990-07-31 1994-01-04 International Business Machines Corporation Method of forming stacked conductive and/or resistive polysilicon lands in multilevel semiconductor chips and structures resulting therefrom
US5592006A (en) * 1994-05-13 1997-01-07 International Rectifier Corporation Gate resistor for IGBT
US6465294B1 (en) * 2001-03-16 2002-10-15 Taiwan Semiconductor Manufacturing Company Self-aligned process for a stacked gate RF MOSFET device
JP2003197914A (ja) * 2001-12-28 2003-07-11 Fuji Electric Co Ltd 半導体装置
CN102005474A (zh) * 2009-08-27 2011-04-06 三菱电机株式会社 半导体装置及其制造方法
CN102569372A (zh) * 2007-05-25 2012-07-11 三菱电机株式会社 半导体装置
CN102842610A (zh) * 2011-06-22 2012-12-26 中国科学院微电子研究所 Igbt芯片及其制作方法
CN103337515A (zh) * 2013-06-26 2013-10-02 株洲南车时代电气股份有限公司 一种功率半导体芯片栅极区
CN104022093A (zh) * 2014-06-17 2014-09-03 江苏中科君芯科技有限公司 一种集成可变栅电阻栅极结构
CN104319287A (zh) * 2014-10-31 2015-01-28 无锡同方微电子有限公司 一种沟槽栅型半导体器件结构及其制作方法
JP2016058466A (ja) * 2014-09-08 2016-04-21 三菱電機株式会社 炭化珪素半導体装置
CN107924948A (zh) * 2015-08-26 2018-04-17 英特尔公司 用于集成电路的复合横向电阻器结构
US20200294989A1 (en) * 2019-03-14 2020-09-17 Fuji Electric Co., Ltd. Semiconductor device
CN116525608A (zh) * 2023-05-15 2023-08-01 上海晶岳电子有限公司 一种tvs器件及其制造方法

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5275963A (en) * 1990-07-31 1994-01-04 International Business Machines Corporation Method of forming stacked conductive and/or resistive polysilicon lands in multilevel semiconductor chips and structures resulting therefrom
US5592006A (en) * 1994-05-13 1997-01-07 International Rectifier Corporation Gate resistor for IGBT
US6465294B1 (en) * 2001-03-16 2002-10-15 Taiwan Semiconductor Manufacturing Company Self-aligned process for a stacked gate RF MOSFET device
JP2003197914A (ja) * 2001-12-28 2003-07-11 Fuji Electric Co Ltd 半導体装置
CN102569372A (zh) * 2007-05-25 2012-07-11 三菱电机株式会社 半导体装置
CN102005474A (zh) * 2009-08-27 2011-04-06 三菱电机株式会社 半导体装置及其制造方法
CN102842610A (zh) * 2011-06-22 2012-12-26 中国科学院微电子研究所 Igbt芯片及其制作方法
CN103337515A (zh) * 2013-06-26 2013-10-02 株洲南车时代电气股份有限公司 一种功率半导体芯片栅极区
CN104022093A (zh) * 2014-06-17 2014-09-03 江苏中科君芯科技有限公司 一种集成可变栅电阻栅极结构
JP2016058466A (ja) * 2014-09-08 2016-04-21 三菱電機株式会社 炭化珪素半導体装置
CN104319287A (zh) * 2014-10-31 2015-01-28 无锡同方微电子有限公司 一种沟槽栅型半导体器件结构及其制作方法
CN107924948A (zh) * 2015-08-26 2018-04-17 英特尔公司 用于集成电路的复合横向电阻器结构
US20200294989A1 (en) * 2019-03-14 2020-09-17 Fuji Electric Co., Ltd. Semiconductor device
CN116525608A (zh) * 2023-05-15 2023-08-01 上海晶岳电子有限公司 一种tvs器件及其制造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
R. M. 小沃纳 等: "集成电路-设计原理与制造", 上海科学技术情报研究所, pages: 319 *

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