CN116564962B - 一种集成双向tvs的cmos器件及其制备方法 - Google Patents
一种集成双向tvs的cmos器件及其制备方法 Download PDFInfo
- Publication number
- CN116564962B CN116564962B CN202310808416.5A CN202310808416A CN116564962B CN 116564962 B CN116564962 B CN 116564962B CN 202310808416 A CN202310808416 A CN 202310808416A CN 116564962 B CN116564962 B CN 116564962B
- Authority
- CN
- China
- Prior art keywords
- region
- well
- electrode
- sti structure
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000002457 bidirectional effect Effects 0.000 title claims abstract description 24
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 238000005468 ion implantation Methods 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims description 28
- 210000000746 body region Anatomy 0.000 claims description 20
- 238000002513 implantation Methods 0.000 claims description 17
- 239000007943 implant Substances 0.000 claims description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 11
- 229920005591 polysilicon Polymers 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 5
- 238000011049 filling Methods 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 238000001465 metallisation Methods 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 claims description 2
- 238000012805 post-processing Methods 0.000 claims description 2
- 230000008021 deposition Effects 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 11
- 230000008569 process Effects 0.000 abstract description 8
- 230000001052 transient effect Effects 0.000 abstract description 7
- 230000008901 benefit Effects 0.000 abstract description 4
- 230000003071 parasitic effect Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 14
- 238000002347 injection Methods 0.000 description 9
- 239000007924 injection Substances 0.000 description 9
- 238000000137 annealing Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
- H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310808416.5A CN116564962B (zh) | 2023-07-04 | 2023-07-04 | 一种集成双向tvs的cmos器件及其制备方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310808416.5A CN116564962B (zh) | 2023-07-04 | 2023-07-04 | 一种集成双向tvs的cmos器件及其制备方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN116564962A CN116564962A (zh) | 2023-08-08 |
CN116564962B true CN116564962B (zh) | 2023-09-08 |
Family
ID=87498510
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202310808416.5A Active CN116564962B (zh) | 2023-07-04 | 2023-07-04 | 一种集成双向tvs的cmos器件及其制备方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN116564962B (zh) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09246478A (ja) * | 1996-03-01 | 1997-09-19 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2005136290A (ja) * | 2003-10-31 | 2005-05-26 | Fuji Electric Device Technology Co Ltd | 半導体装置 |
KR20150096914A (ko) * | 2014-02-17 | 2015-08-26 | 주식회사 시지트로닉스 | 저정전용량 tvs 제조방법 및 그 방법으로 제조된 tvs 소자 |
US10062682B1 (en) * | 2017-05-25 | 2018-08-28 | Alpha And Omega Semiconductor (Cayman) Ltd. | Low capacitance bidirectional transient voltage suppressor |
CN209389035U (zh) * | 2019-03-29 | 2019-09-13 | 焕珏(上海)集成电路有限公司 | 一种双向对称低电容tvs二极管 |
WO2023016418A1 (zh) * | 2021-08-13 | 2023-02-16 | 上海维安半导体有限公司 | 一种双向瞬态电压抑制器件及其制备方法 |
-
2023
- 2023-07-04 CN CN202310808416.5A patent/CN116564962B/zh active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09246478A (ja) * | 1996-03-01 | 1997-09-19 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2005136290A (ja) * | 2003-10-31 | 2005-05-26 | Fuji Electric Device Technology Co Ltd | 半導体装置 |
KR20150096914A (ko) * | 2014-02-17 | 2015-08-26 | 주식회사 시지트로닉스 | 저정전용량 tvs 제조방법 및 그 방법으로 제조된 tvs 소자 |
US10062682B1 (en) * | 2017-05-25 | 2018-08-28 | Alpha And Omega Semiconductor (Cayman) Ltd. | Low capacitance bidirectional transient voltage suppressor |
CN209389035U (zh) * | 2019-03-29 | 2019-09-13 | 焕珏(上海)集成电路有限公司 | 一种双向对称低电容tvs二极管 |
WO2023016418A1 (zh) * | 2021-08-13 | 2023-02-16 | 上海维安半导体有限公司 | 一种双向瞬态电压抑制器件及其制备方法 |
Also Published As
Publication number | Publication date |
---|---|
CN116564962A (zh) | 2023-08-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9911728B2 (en) | Transient voltage suppressor (TVS) with reduced breakdown voltage | |
US20140131796A1 (en) | Rf ldmos device and fabrication method thereof | |
US20030230780A1 (en) | Fully silicided NMOS device for electrostatic discharge protection | |
CN114122123B (zh) | 集成高速续流二极管的碳化硅分离栅mosfet及制备方法 | |
CN104851919A (zh) | 双向穿通半导体器件及其制造方法 | |
CN116564962B (zh) | 一种集成双向tvs的cmos器件及其制备方法 | |
US9281304B2 (en) | Transistor assisted ESD diode | |
CN113421922B (zh) | 一种具备栅极自钳位功能的三维igbt及其制造方法 | |
CN105514040A (zh) | 集成jfet的ldmos器件及工艺方法 | |
CN111192871B (zh) | 用于静电防护的晶体管结构及其制造方法 | |
CN111199970B (zh) | 用于静电防护的晶体管结构及其制造方法 | |
CN111725206B (zh) | Pmos触发的scr器件、scr器件的制造方法及scr静电保护电路 | |
CN108389857B (zh) | 提高维持电压的多晶硅假栅静电释放器件及其制作方法 | |
CN113421923A (zh) | 一种具备栅极自钳位功能的igbt及其制造方法 | |
CN108364945B (zh) | 一种提高维持电压的双栅栅控静电释放器件及其制作方法 | |
CN101577279B (zh) | 一种抗辐照的多叉指cmos器件 | |
US11476244B2 (en) | Laterally-diffused metal-oxide-semiconductor devices for electrostatic discharge protection applications | |
CN112447845B (zh) | 一种半导体器件的制作方法和半导体器件 | |
CN112466937B (zh) | 一种维持电压可调的soi工艺可控硅静电放电保护结构 | |
CN212085012U (zh) | 一种可控硅门极与阳极短接的低正向钳位电压开关二极管 | |
CN111180421B (zh) | 用于静电防护的晶体管结构及其制造方法 | |
CN111969064B (zh) | 寄生式ldmos器件及其制作方法 | |
CN114334955A (zh) | 静电防护结构及静电防护结构的制作方法 | |
Won et al. | Power trench gate MOSFET with an integrated 6-pack configuration for a 3-phase inverter | |
CN111968917A (zh) | 一种引入block结构深N阱层的抗辐射GGNMOS器件的制备方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20240202 Address after: No. 88, Wenchang East Road, Yangzhou, Jiangsu 225000 Patentee after: Jiangsu Daoyuan Technology Group Co.,Ltd. Country or region after: China Address before: 211135 enlightenment star Nanjing maker space G41, second floor, No. 188, Qidi street, Qilin science and Technology Innovation Park, Qixia District, Nanjing, Jiangsu Province Patentee before: Jiangsu Peregrine Microelectronics Co.,Ltd. Country or region before: China |