CN116544314A - TOPCON solar cell and preparation method thereof - Google Patents
TOPCON solar cell and preparation method thereof Download PDFInfo
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- CN116544314A CN116544314A CN202310761175.3A CN202310761175A CN116544314A CN 116544314 A CN116544314 A CN 116544314A CN 202310761175 A CN202310761175 A CN 202310761175A CN 116544314 A CN116544314 A CN 116544314A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 101
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 101
- 239000010703 silicon Substances 0.000 claims abstract description 101
- 238000002161 passivation Methods 0.000 claims abstract description 50
- 238000000137 annealing Methods 0.000 claims abstract description 34
- 238000000151 deposition Methods 0.000 claims abstract description 30
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 16
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical group [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 16
- 229910052796 boron Inorganic materials 0.000 claims abstract description 16
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 16
- 239000011574 phosphorus Substances 0.000 claims abstract description 16
- 238000004140 cleaning Methods 0.000 claims abstract description 15
- 230000005641 tunneling Effects 0.000 claims abstract description 14
- 239000003513 alkali Substances 0.000 claims abstract description 13
- 238000009792 diffusion process Methods 0.000 claims abstract description 13
- 239000000126 substance Substances 0.000 claims abstract description 12
- 229910021423 nanocrystalline silicon Inorganic materials 0.000 claims abstract description 10
- 238000005498 polishing Methods 0.000 claims abstract description 6
- 229910052751 metal Inorganic materials 0.000 claims description 21
- 239000002184 metal Substances 0.000 claims description 21
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical group [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 12
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 6
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 6
- 229910003437 indium oxide Inorganic materials 0.000 claims description 4
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims description 4
- 239000013077 target material Substances 0.000 claims description 4
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims description 4
- 229910001887 tin oxide Inorganic materials 0.000 claims description 4
- 230000005540 biological transmission Effects 0.000 abstract description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 10
- 238000010521 absorption reaction Methods 0.000 abstract description 7
- 230000003071 parasitic effect Effects 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 104
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 30
- 230000000052 comparative effect Effects 0.000 description 18
- 229910052757 nitrogen Inorganic materials 0.000 description 15
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 12
- 238000006243 chemical reaction Methods 0.000 description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 11
- 239000001301 oxygen Substances 0.000 description 11
- 229910052760 oxygen Inorganic materials 0.000 description 11
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 10
- 239000007789 gas Substances 0.000 description 10
- 229910000077 silane Inorganic materials 0.000 description 10
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 9
- 239000000243 solution Substances 0.000 description 8
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 6
- 239000005922 Phosphane Substances 0.000 description 6
- 239000001569 carbon dioxide Substances 0.000 description 6
- 229910002092 carbon dioxide Inorganic materials 0.000 description 6
- 239000001257 hydrogen Substances 0.000 description 6
- 229910052739 hydrogen Inorganic materials 0.000 description 6
- 229910000064 phosphane Inorganic materials 0.000 description 6
- XYFCBTPGUUZFHI-UHFFFAOYSA-N phosphane group Chemical group P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 6
- 229920005591 polysilicon Polymers 0.000 description 6
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- ILAHWRKJUDSMFH-UHFFFAOYSA-N boron tribromide Chemical compound BrB(Br)Br ILAHWRKJUDSMFH-UHFFFAOYSA-N 0.000 description 4
- 239000000969 carrier Substances 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 238000002425 crystallisation Methods 0.000 description 3
- 230000008025 crystallization Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 229910021529 ammonia Inorganic materials 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000011224 oxide ceramic Substances 0.000 description 2
- 238000011056 performance test Methods 0.000 description 2
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 2
- 239000012495 reaction gas Substances 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 2
- 238000003854 Surface Print Methods 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1864—Annealing
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention discloses a preparation method of a TOPCON solar cell, which comprises the following steps: performing boron diffusion and alkali polishing on the cleaned and textured silicon wafer, depositing a tunneling oxide layer and a doped layer on the back surface of the silicon wafer, annealing, and performing chemical cleaning; annealing the silicon wafer again, forming an oxide film layer on the back of the silicon wafer, depositing a first passivation film layer on the front of the silicon wafer, depositing a second passivation film layer on the front and back of the silicon wafer, and finally preparing an electrode; the doped layer is a phosphorus doped nanocrystalline silicon oxide layer. According to the preparation method of the TOPCON solar cell, the phosphorus doped nano-crystalline silicon oxide layer is deposited to replace the traditional polycrystalline silicon layer, so that the carrier collection selectivity is improved, the parasitic absorption loss of the back light of the cell is reduced, and the passivation quality of the back surface of the cell is effectively improved; by depositing the second passivation film layer on the front side and the back side of the silicon wafer, the transverse transmission resistance can be effectively reduced, and the performance of the battery is improved.
Description
Technical Field
The invention belongs to the technical field of photovoltaic modules, and particularly relates to a preparation method of a TOPCO solar cell and the TOPCO solar cell prepared by the preparation method.
Background
With the continuous development of solar cell technology, more and more photovoltaic manufacturers are now beginning to lay out TOPCon cell technology. In the conventional TOPCO solar cell, a tunneling oxide layer and a polysilicon layer structure are adopted on the back for passivation contact, and the structure can enable majority carriers to penetrate through the oxide layer and has a blocking effect on minority carriers, so that the selectivity of carriers is realized, and the surface recombination and metal recombination of the cell are reduced. However, the energy band gap of the polysilicon layer is smaller, and the polysilicon layer has stronger parasitic absorption effect on light, which limits the further improvement of TOPCon battery efficiency to a certain extent; in addition, the use of the silicon nitride layer in the conventional TOPCon solar cell makes the lateral transmission resistance of the cell larger, which is also unfavorable for improving the cell performance.
Disclosure of Invention
In view of the above, in order to overcome the defects of the prior art, the present invention provides a TOPCon solar cell and a method for manufacturing the same, so as to reduce parasitic absorption loss and lateral transmission resistance of the back light of the cell and improve the cell efficiency.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
a preparation method of a TOPCON solar cell comprises the following steps:
respectively performing boron diffusion and alkali polishing on the front and back surfaces of the cleaned and textured silicon wafer, depositing a tunneling oxide layer and a doped layer on the back surface of the silicon wafer, annealing and performing chemical cleaning;
annealing the silicon wafer again after the step of chemical cleaning and forming an oxide film layer on the back surface of the silicon wafer;
depositing a first passivation film layer on the front surface of the silicon wafer;
then depositing a second passivation film layer on the front surface and the back surface of the silicon wafer;
finally, respectively preparing a front metal electrode and a back metal electrode on the front side and the back side of the silicon wafer to obtain the TOPCON solar cell; the doped layer is a phosphorus doped nano crystalline silicon oxide layer.
The phosphorus doped nano-crystalline silicon oxide layer is used for replacing the traditional polycrystalline silicon layer, and has wider energy band gap, so that the selectivity of carrier collection is improved, the parasitic absorption loss of light on the back surface of the battery is reduced, the optical performance of the battery is improved, the carrier transmission is enhanced, and the passivation quality of the back surface of the battery is effectively improved.
According to some preferred embodiments of the invention, the second passivation film layer is an indium tin oxide layer. The second passivation film layers are arranged on the front side and the back side of the battery to replace the silicon nitride film layers on the front side and the back side of the traditional battery, and the indium tin oxide film has uniform thickness, easy control, good film repeatability and good stability; and the indium tin oxide has good conductivity, can effectively reduce transverse transmission resistance and improve battery performance.
According to some preferred embodiments of the invention, the method used in depositing the doped layer is: under the pressure of 1.2 to 2.5Torr, the radio frequency power is 40 to 65mW/cm 2 And the deposition is carried out by using PECVD equipment at the temperature of 90-150 ℃, and the thickness of the doped layer is 30-150 nm. Specifically, the reaction gas used for depositing the doped layer is phosphane, silane, hydrogen and carbon dioxide, wherein the flow rate of silane is 2.5-5.0 sccm, the flow rate of hydrogen is 300-600 sccm, the flow rate of carbon dioxide is 1.3-4.0 sccm, and the flow rate of phosphane is 0.05-0.12 sccm.
According to some preferred embodiments of the present invention, the step of depositing the second passivation film layer on the front surface and the back surface of the silicon wafer comprises: the magnetron sputtering mode is adopted for deposition, the target material is indium tin oxide, and the temperature is 150-250 ℃.
According to some preferred embodiments of the present invention, the mass fraction ratio of indium oxide to tin oxide in the indium tin oxide is 9-10: 1.
according to some preferred embodiments of the present invention, the thickness of the second passivation film layer deposited on the front surface of the silicon wafer is 90-110 nm, and the thickness of the second passivation film layer deposited on the back surface of the silicon wafer is 120-140 nm.
According to some preferred embodiments of the present invention, in the step of annealing after depositing the tunnel oxide layer and the doped layer on the back surface of the silicon wafer, the annealing temperature is 50 to 400 ℃ higher than the temperature of annealing the silicon wafer again after the step of chemical cleaning. The tunnel oxide layer and the doped layer are deposited on the back surface of the silicon wafer and then annealed to crystallize the phosphorus doped nanocrystalline silicon oxide, because the phosphorus doped nanocrystalline silicon oxide formed in PECVD is in an amorphous state, and high-temperature annealing is required to complete crystallization. The step of annealing the silicon wafer again after the step of chemical cleaning is to form an oxide layer on the back surface of the silicon wafer, and since the magnetron sputtering damage is generated by utilizing the magnetron sputtering to deposit the indium tin oxide, the oxide layer is formed on the back surface of the silicon wafer to reduce the magnetron sputtering damage generated when the indium tin oxide is plated so as to protect the passivation effect.
According to some preferred implementation aspects of the invention, in the step of annealing after depositing the tunneling oxide layer and the doped layer on the back surface of the silicon wafer, equipment used for annealing is a tube furnace, the annealing temperature is 850-1000 ℃, the annealing time is 40-70 min, the introduced gas is nitrogen, and the flow rate of the nitrogen is 5000-8000 sccm. In the step of annealing the silicon wafer again after the step of chemical cleaning, equipment used for annealing is a tube furnace, the annealing temperature is 600-700 ℃, and the introduced gases are oxygen and nitrogen.
According to some preferred embodiments of the invention, the oxide film layer is a silicon oxide layer, and the thickness of the oxide film layer is 3-7 nm.
According to some preferred embodiments of the present invention, when the first passivation film layer is deposited on the front surface of the silicon wafer, the first passivation film layer is deposited by using an ALD device, the thickness of the deposited first passivation film layer is 10-20 nm, and the first passivation film layer is an alumina layer.
According to some preferred embodiments of the present invention, after preparing the front metal electrode and the back metal electrode on the front side and the back side of the silicon wafer respectively, the silicon wafer is subjected to a light injection treatment, wherein the light intensity of the light injection treatment is 6000-13000W/m 2 The temperature is 30-80 ℃.
The invention also provides a TOPCON solar cell, which is prepared by the preparation method of the TOPCON solar cell.
Specifically, the preparation method of the TOPCON solar cell comprises the following steps:
(1) Pretreating a silicon wafer
Selecting a silicon wafer with the resistivity of 0.5-1.8Ω & cm, and performing texturing cleaning on the silicon wafer to ensure that the thickness of one side of the silicon wafer is 1.5-3.0 μm.
(2) Boron diffusion on the front side of a silicon wafer
And putting the silicon wafer into a low-pressure diffusion furnace, using boron trichloride or boron tribromide as a diffusion boron source, and simultaneously introducing nitrogen and oxygen as reaction gases to perform boron diffusion to form a boron emitter. Wherein the flow rate of the boron source is 80-700 sccm, the flow rate of the nitrogen is 1500-12000 sccm, and the flow rate of the oxygen is 800-6000 sccm.
(3) Alkali polishing the back of silicon wafer
And (3) performing alkali polishing on the back surface of the silicon wafer by using alkali solution and matching with additives, wherein the weight of the alkali polished silicon wafer is reduced by 0.13-0.35g. The alkali solution is sodium hydroxide or potassium hydroxide.
(4) Depositing tunneling oxide layer and doped layer on back of silicon wafer
Growing a tunneling silicon oxide layer and a doped layer on the back surface of a silicon wafer by using PECVD equipment, setting the pressure to be 1.2-2.5 Torr and the radio frequency power to be 40-65 mW/cm 2 Introducing reaction gas phosphane, silane, hydrogen and carbon dioxide, wherein the flow rate of the silane is 2.5-5.0 sccm, the flow rate of the hydrogen is 300-600 sccm, the flow rate of the carbon dioxide is 1.3-4.0 sccm, and the flow rate of the phosphane is 0.05-0.12 sccm; and then annealing the back surface of the silicon wafer by using a tube furnace, wherein the annealing temperature is 850-1000 ℃, the annealing time is 40-70 minutes, and nitrogen with the flow of 5000-8000 sccm is introduced to complete crystallization of the doped layer. The thickness of the prepared tunneling oxide layer is 1-3 nm, and the thickness of the doped layer is 30-150 nm.
(5) Chemical cleaning
And cleaning the front side and the back side of the silicon wafer by using an acid solution and an alkali solution. Wherein the acid solution is hydrofluoric acid and hydrochloric acid, and the alkali solution is potassium hydroxide or sodium hydroxide.
(6) Forming an oxide film layer on the back of the silicon wafer
Annealing by using a tube furnace, introducing oxygen and nitrogen as reaction gases, controlling the reaction temperature to be 600-700 ℃, and forming an oxide film layer with the thickness of 3-7 nm on the back surface.
(7) Depositing a first passivation film layer on the front surface of the silicon wafer
And depositing a first passivation film layer with the thickness of 10-20 nm on the front surface of the silicon wafer by using an ALD device.
(8) Depositing a second passivation film layer on the front surface and the back surface of the silicon wafer
A second passivation film layer is respectively deposited on the front surface and the back surface of the silicon wafer by adopting a magnetron sputtering mode, the target material is an indium tin oxide ceramic target, and the mass ratio of indium oxide to tin oxide is 9-10: 1, the deposition temperature is 150-250 ℃. The thickness of the front second passivation film layer is 90-110 nm, and the thickness of the back second passivation film layer is 120-140 nm.
(9) Preparing electrodes on the front and back of silicon wafer
Printing a metal electrode on the back of the silicon wafer through screen printing to form a back metal electrode; and printing a metal electrode on the front side of the silicon wafer to form a front side metal electrode. Finally, by light injection (light intensity 6000-13000W/m) 2 The TOPCO solar cell is obtained by processing at 30-80 ℃.
Due to the implementation of the technical scheme, compared with the prior art, the invention has the following advantages: according to the TOPCON solar cell and the preparation method thereof, the phosphorus doped nano crystalline silicon oxide layer is deposited to replace the traditional polycrystalline silicon layer, so that the selectivity of carrier collection is improved, the parasitic absorption loss of light on the back of the cell is reduced, the optical performance of the cell is improved, the carrier transmission is enhanced, and the passivation quality of the back of the cell is effectively improved; and the second passivation film layers are further arranged on the front side and the back side of the silicon wafer to replace the traditional silicon nitride film layer, so that the transverse transmission resistance can be effectively reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a method for manufacturing a TOPCon solar cell according to a preferred embodiment of the present invention;
fig. 2 is a schematic structural view of a TOPCon solar cell in a preferred embodiment of the invention;
wherein, the reference numerals include: the semiconductor device comprises a silicon wafer-1, a boron emitter layer-2, a first passivation film layer-3, a second passivation film layer-4, a tunneling oxide layer-5, a doped layer-6, an oxide film layer-7, a front metal electrode-8 and a back metal electrode-9.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely, and it is apparent that the described embodiments are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
Example a method for fabricating a TOPCon solar cell is shown in fig. 1.
(1) Pretreatment of the silicon wafer 1
And selecting an N-type silicon wafer 1 with resistivity of 1.0 omega cm, size of 210mm and thickness of 140 mu m, and performing texturing cleaning on the silicon wafer 1 to enable the thickness of one side of the silicon wafer 1 to be 2.8 mu m.
(2) Boron diffusion on the front side of the silicon wafer 1
The silicon wafer 1 is put into a low-pressure diffusion furnace, boron trichloride or boron tribromide is used as a boron diffusion source, and nitrogen and oxygen are simultaneously introduced as reaction gases to carry out boron diffusion, so as to form a boron emitter with the sheet resistance of 170 ohm/square. Wherein the flow rate of the boron source is 400sccm, the flow rate of the nitrogen is 6500sccm, and the flow rate of the oxygen is 2500sccm.
(3) Alkali polishing the back of silicon wafer 1
The back side of the silicon wafer 1 was alkali polished with a sodium hydroxide solution in combination with an additive (Tuobang BP 65), and the weight of the alkali polished silicon wafer 1 was reduced to 0.24g.
(4) A tunneling oxide layer 5 and a doped layer 6 are deposited on the back surface of the silicon wafer 1
Growing a tunneling silicon oxide layer and a doped layer 6 on the back surface of the silicon wafer 1 by using a PECVD device, setting the pressure to be 2.0Torr and the radio frequency power to be 50mW/cm 2 Introducing reaction gases of phosphane, silane, hydrogen and carbon dioxide, wherein the flow rate of the silane is 4sccm, the flow rate of the hydrogen is 450sccm, the flow rate of the carbon dioxide is 2.5sccm, and the flow rate of the phosphane is 0.1sccm; and then annealing the back surface of the silicon wafer 1 by using a tube furnace, wherein the annealing temperature is 900 ℃, the annealing time is 55 minutes, and nitrogen with the flow of 5000sccm is introduced to complete crystallization of the doped layer 6. The thickness of the tunnel oxide layer 5 is 1.9nm and the thickness of the doped layer 6 is 90nm.
(5) Chemical cleaning
The front surface of the silicon wafer 1 is cleaned in a chain type device by using hydrofluoric acid, the front surface and the back surface of the silicon wafer 1 are cleaned in a groove type device by using potassium hydroxide solution, and finally the front surface and the back surface of the silicon wafer 1 are cleaned in the groove type device by using hydrofluoric acid and hydrochloric acid.
(6) Forming an oxide film layer 7 on the back surface of the silicon wafer 1
Annealing is carried out by using a tube furnace, oxygen and nitrogen are introduced as reaction gases, the reaction temperature is controlled to be 660 ℃, and an oxide film layer 7 with the thickness of 6nm is formed on the back surface.
(7) Depositing a first passivation film layer 3 on the front surface of the silicon wafer 1
A first passivation film layer 3 having a thickness of 18nm was deposited on the front side of the silicon wafer 1 using an ALD apparatus.
(8) A second passivation film layer 4 is deposited on the front surface and the back surface of the silicon wafer 1
A second passivation film layer 4 is respectively deposited on the front surface and the back surface of the silicon wafer 1 by adopting a magnetron sputtering mode, and the target material is an indium tin oxide ceramic target, wherein the mass fraction ratio of indium oxide to tin oxide is 9:1, the deposition temperature was 200 ℃. The thickness of the front side second passivation film layer 4 is 105nm, and the thickness of the back side second passivation film layer 4 is 128nm.
(9) Electrodes are respectively prepared on the front surface and the back surface of the silicon wafer 1
Printing a metal electrode on the back surface of the silicon wafer 1 by screen printing to form a back metal electrode 9; in the positive direction of the silicon wafer 1The front metal electrode 8 is formed by surface-printing a metal electrode. Finally by light injection (light intensity 9000W/m 2 The treatment was carried out at a temperature of 50℃to obtain a TOPCON solar cell.
The TOPCON solar cell prepared by the preparation method comprises an N-type silicon wafer 1, wherein a boron emitter layer 2, a first passivation film layer 3, a second passivation film layer 4 and a front metal electrode 8 are sequentially arranged on the front surface of the silicon wafer 1 upwards; the back of the silicon wafer 1 is provided with a tunneling oxide layer 5, a doped layer 6, an oxide film layer 7, a second passivation film layer 4 and a back metal electrode 9 in sequence downwards.
Specifically, in the present embodiment, the junction depth of the boron emitter layer 2 is 1 μm on the front surface of the silicon wafer 1; the first passivation film layer 3 is an alumina layer with the thickness of 18nm; the second passivation film layer 4 is an indium tin oxide layer, which is provided as a single layer and has a thickness of 105nm; the front metal electrode 8 is a silver electrode.
Specifically, in this embodiment, the thickness of the tunneling oxide layer 5 is 1.9nm on the back surface of the silicon wafer 1; the doped layer 6 is a phosphorus doped nano-crystalline silicon oxide layer, is arranged as a single layer and has a thickness of 90nm, and the phosphorus doped nano-crystalline silicon oxide has a wider energy band gap, so that the selectivity of collecting carriers is improved, the parasitic absorption loss of light on the back of the battery is reduced, the optical performance of the battery is improved, the carrier transmission is enhanced, and the passivation quality of the back is effectively improved. In addition, the oxide film layer 7 is a silicon oxide layer with a thickness of 6nm, and the arrangement of the oxide film layer 7 in this embodiment is used to reduce magnetron sputtering damage during indium tin oxide plating so as to protect the passivation effect of the battery. In addition, the second passivation film layer 4 on the back surface is also a single layer and has a thickness of 128nm; the back metal electrode 9 is a silver electrode.
In this embodiment, the front and back surfaces of the silicon wafer 1 are both provided with the second passivation film layer 4, which has the advantages of uniform thickness, easy control, good film repeatability, good stability, and good conductivity of indium tin oxide, and can effectively reduce the transverse transmission resistance.
Comparative example preparation method of TOPCON solar cell
The difference between this comparative example and the first example is that the step (4) is different, and the rest steps are the same, and the specific content of the step (4) in the first comparative example is:
and growing a tunneling silicon oxide layer and an intrinsic polycrystalline silicon layer on the back surface of the silicon wafer 1 by using LPCVD equipment, wherein the reaction temperature is 600 ℃, and the introduced reaction gases are silane, nitrogen and oxygen, wherein the flow rate of the silane is 450sccm, the flow rate of the nitrogen is 1500sccm, and the flow rate of the oxygen is 1900sccm. Then, phosphorus doping is carried out on the back surface to form a phosphorus doped polysilicon layer, the silicon wafer 1 is placed in a low-pressure diffusion furnace, phosphorus oxychloride is used as a diffusion phosphorus source, nitrogen and oxygen are simultaneously introduced as reaction gases, wherein the flow rate of the phosphorus source is 800sccm, the flow rate of the nitrogen is 3500sccm, the flow rate of the oxygen is 1750sccm, and the reaction temperature is 900 ℃.
Comparative example two preparation methods of TOPCON solar cell
The present comparative example differs from the first example in that: the difference between this comparative example and the first example is that the step (8) is different, the rest steps are the same, and the specific content of the step (8) of the second comparative example is: and respectively depositing a layer of silicon nitride on the front surface and the back surface of the silicon wafer 1 by PECVD, wherein the used gases are silane and ammonia, the flow rate of the silane is 1400sccm, the flow rate of the ammonia is 6500sccm, the temperature is 500 ℃, and the thickness of the prepared silicon nitride layer is 70nm.
Comparative example three preparation methods of TOPCON solar cell
The difference between this comparative example and example one is that the steps (4) and (8) are different, and the remaining steps are the same, wherein the step (4) in comparative example three is the same as the step (4) in comparative example one, and the step (8) in comparative example three is the same as the step (8) in comparative example two.
Example two results and discussion
The TOPCON solar cells prepared by the preparation methods of the TOPCON solar cells according to the first embodiment and the comparative examples one to three were subjected to related electrochemical performance tests, wherein the test methods are as follows: under STC (Standard Test Conditions) conditions (25 ℃,1000w/m using a conventional Hall tester 2 ) Testing was performed. The test results are shown in Table 1.
Table 1 results of electrical performance test of TOPCon solar cells in example one and comparative examples one to three
As can be seen from table 1, in example one, compared with comparative example one, a conventional phosphorus doped polysilicon layer was deposited on the back side of the silicon wafer; in the first example, compared with the second example, the conventional silicon nitride layer is deposited on the front surface and the back surface of the silicon wafer in the second example; in the first example, compared with the third comparative example, the conventional phosphorus doped polysilicon layer was deposited on the back surface of the silicon wafer in the step (4), and the conventional silicon nitride layer was deposited on both the front and back surfaces of the silicon wafer in the step (8); the test results show that the TOPCon solar cells prepared by the preparation method of the first embodiment are obviously better than the TOPCon solar cells of the first to third comparative examples in the aspects of open circuit voltage (Uoc), current density (Isc), influence factor (FF), conversion Efficiency (Efficiency) and the like, which is sufficient to prove that the preparation method of the first embodiment can reduce parasitic absorption loss of light on the back of the cell, reduce transverse transmission resistance, effectively improve passivation quality on the back of the cell and finally improve the performance of the cell.
The above embodiments are only for illustrating the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the present invention and to implement the same, but are not intended to limit the scope of the present invention, and all equivalent changes or modifications made according to the spirit of the present invention should be included in the scope of the present invention.
Claims (10)
1. A preparation method of a TOPCON solar cell comprises the following steps:
respectively performing boron diffusion and alkali polishing on the front and back surfaces of the cleaned and textured silicon wafer, depositing a tunneling oxide layer and a doped layer on the back surface of the silicon wafer, annealing and performing chemical cleaning; it is characterized in that the method comprises the steps of,
annealing the silicon wafer again after the step of chemical cleaning and forming an oxide film layer on the back surface of the silicon wafer;
depositing a first passivation film layer on the front surface of the silicon wafer;
then depositing a second passivation film layer on the front surface and the back surface of the silicon wafer;
finally, respectively preparing a front metal electrode and a back metal electrode on the front side and the back side of the silicon wafer to obtain the TOPCON solar cell; the doped layer is a phosphorus doped nano crystalline silicon oxide layer.
2. The method of claim 1, wherein the second passivation film layer is an indium tin oxide layer.
3. The method of claim 1, wherein the doped layer is deposited by: under the pressure of 1.2 to 2.5Torr, the radio frequency power is 40 to 65mW/cm 2 And the deposition is carried out by using PECVD equipment at the temperature of 90-150 ℃, and the thickness of the doped layer is 30-150 nm.
4. The method of claim 2, wherein the step of depositing a second passivation film layer on both the front and back surfaces of the silicon wafer comprises: the magnetron sputtering mode is adopted for deposition, the target material is indium tin oxide, and the temperature is 150-250 ℃.
5. The preparation method according to claim 4, wherein the mass fraction ratio of indium oxide to tin oxide in the indium tin oxide is 9-10: 1.
6. the method of claim 1, wherein the thickness of the second passivation film deposited on the front surface of the silicon wafer is 90-110 nm, and the thickness of the second passivation film deposited on the back surface of the silicon wafer is 120-140 nm.
7. The method of claim 1, wherein in the step of annealing after depositing the tunnel oxide layer and the doped layer on the back surface of the silicon wafer, the annealing temperature is 50 to 400 ℃ higher than the temperature at which the silicon wafer is annealed again after the step of chemical cleaning.
8. The method according to claim 7, wherein in the step of annealing after depositing the tunnel oxide layer and the doped layer on the back surface of the silicon wafer, equipment used for annealing is a tube furnace, and the annealing temperature is 850-1000 ℃; and in the step of annealing the silicon wafer again after the step of chemical cleaning, equipment used for annealing is a tube furnace, and the annealing temperature is 600-700 ℃.
9. The method according to claim 4, wherein the oxide film layer is a silicon oxide layer, and the thickness of the oxide film layer is 3 to 7nm.
10. A TOPCon solar cell prepared by the preparation method of any one of claims 1 to 9.
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