Preparation method of passivation layer for solar cell and preparation method of solar cell
Technical Field
The invention relates to the field of solar cells, in particular to a preparation method of a passivation layer for a solar cell and a preparation method of the solar cell.
Background
Solar cells convert light into electrical energy using the photoelectric effect. Basic solar cell structures include single P-N junctions, P-I-N/N-I-P junctions, and multi-junction structures. A typical single P-N junction structure includes a P-doped layer and an N-doped layer. The single P-N junction solar cell has a homojunction structure and a heterojunction structure, wherein a P-type doped layer and an N-type doped layer of the homojunction structure are both made of similar materials (the energy band gaps of the materials are equal), and the heterojunction structure comprises at least two layers of materials with different band gaps.
The heterojunction solar cell may include an organic heterojunction solar cell, such as a bulk heterojunction type organic solar cell, a double-layer or multi-layer heterojunction type organic solar cell; and inorganic heterojunction solar cells. Inorganic heterojunction solar cells mainly include silicon-based cells.
The heterojunction solar cell has the advantages of high efficiency and double-sided power generation, and has wide application prospect in a distributed photovoltaic power station. In particular, silicon-based heterojunction solar cells have the following advantages: (1) the PID phenomenon is avoided, and as the upper surface of the battery is TCO, the charge cannot generate polarization phenomenon on the TCO on the surface of the battery, and the PID phenomenon is avoided. Meanwhile, the measured data also proves the point; (2) a low-temperature manufacturing process; (3) the efficiency is high; (4) high illumination stability; and (5) the development toward thinner devices.
In order to fabricate a heterojunction solar cell, one of the key technologies is to insert at least one high-quality passivation layer between the heterojunction interfaces to reduce the surface recombination rate and improve the conversion efficiency. The main method of forming the passivation layer is a chemical vapor deposition technique (CVD), such as a plasma enhanced chemical vapor deposition technique (PECVD).
The whole film forming process of depositing the passivation layer in the prior art has consistent deposition rate and consistent film quality.
There remains a need in the art for further improvements in the process of forming passivation layers.
Disclosure of Invention
As described above, although the quality of the thin film obtained by the conventional method of forming the passivation layer by the CVD process is consistent, for forming an ideal passivation layer, the film formation rate at the early stage of the formation process should be high, and the film formation rate at the later stage should be low, so that a graded intrinsic passivation layer is formed. The early-stage film forming speed is high so as to prevent the epitaxial growth of an interface caused by a substrate, and the later-stage film forming speed is low so as to ensure that a grown film has better quality, namely less defects. Since the passivation layer has a small thickness and a very fast growth rate, and often requires a short time (e.g., 10 seconds) for film formation, even by controlling the change of process parameters, poor process repeatability is often caused and gradual transition is difficult to achieve.
In order to solve at least one of the above problems, the present invention provides a novel method for preparing a passivation layer for a heterojunction battery, which does not perform a degassing operation during the formation of a passivation film layer, and thus, the introduced process gas is continuously consumed, and thus, the film formation rate naturally gradually changes from fast to slow, and thus, the intrinsic passivation film layer is naturally gradually changed. In addition, because the process does not need to exhaust, the consumption of the process gas is saved.
The present invention proposes the following technical solutions to solve the above technical problems.
According to a first aspect of the present invention, there is provided a method for preparing a passivation layer for a solar cell, comprising the steps of:
vacuumizing the vapor deposition reaction chamber until the vacuum degree in the vapor deposition reaction chamber reaches 1 × 10-5Pa~1Pa,
Placing a substrate in the vapor deposition reaction chamber,
introducing a preset amount of process gas into the deposition reaction chamber,
stopping the introduction of said process gas, and
depositing the passivation layer on the surface of the substrate.
The method of making may further include venting gas from the vapor deposition reaction chamber only after depositing the passivation layer.
The substrate may be selected from an n-type monocrystalline silicon wafer and/or a p-type monocrystalline silicon wafer. The passivation layer is selected from an intrinsic amorphous silicon layer.
The chemical vapor deposition reaction chamber is a Plasma Enhanced Chemical Vapor Deposition (PECVD) reaction chamber.
In the method of the present invention, the step of introducing a predetermined amount of process gas into the deposition reaction chamber may include introducing the process gas into the vapor deposition reaction chamber until the pressure in the vapor deposition reaction chamber reaches 20 to 200Pa, and then stopping introducing the process gas.
In the method, after the pressure in the reaction chamber reaches 20-200Pa, the radio frequency power supply is switched on to deposit on the substrate. The power of the radio frequency power supply can be 100W-1000W.
In the method, the thickness of the passivation layer is 5-10 nm.
In the method of the present invention, the process gas comprises SiH4And optionally H2。
Preferably, SiH4And H2The volume ratio of (A) to (B) is 10 to 0.
According to another aspect, the invention also provides a preparation method of a solar cell, which comprises the preparation method of the passivation layer for the solar cell.
Preferably, the solar cell is a silicon-based heterojunction solar cell. Thus, the method for manufacturing a solar cell includes:
sequentially forming the passivation layer, the p-type amorphous silicon film, the transparent conductive oxide film and the metal collector on the front surface of the substrate; and
and depositing the passivation layer, the n-type amorphous silicon film, the transparent conductive oxide film and the metal collector on the back surface of the substrate in sequence.
Thereby, a high quality passivation layer can be interposed between the substrate and the amorphous silicon film layer (i.e., heterojunction interface). In one example, the passivation layer is an intrinsic amorphous silicon passivation layer.
According to the preparation method of the passivation layer, the exhaust operation is not carried out in the process of depositing the passivation film layer, and only the residual gas is exhausted after the deposition of the passivation layer is finished, so that the introduced process gas is continuously consumed, the film forming speed naturally gradually changes from fast to slow, and the gradual change of the intrinsic passivation film layer is naturally realized. In addition, because the exhaust is not needed in the deposition process, the consumption of the process gas is saved.
Brief description of the drawings
Exemplary embodiments of the invention are described in detail based on the following drawings, wherein:
fig. 1 is a diagram schematically illustrating a process of depositing a thin film by a PECVD technique in the related art.
Fig. 2 schematically shows a state diagram of a method of preparing a passivation layer of the invention by a PECVD process in one embodiment of the invention.
Fig. 3 is a flow chart that schematically illustrates a method for preparing a passivation layer for a solar cell, in accordance with some embodiments of the present invention.
Detailed Description
Some embodiments for implementing the present invention will be described below. However, the scope of the present invention is not limited to the described embodiments, and various modifications, rearrangements, and changes may be made to the present invention without departing from the spirit thereof.
Before the present invention is described in more detail, it is to be understood that this invention is not limited to particular embodiments described, as such may, of course, vary. It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to be limiting, since the present disclosure is defined only by the appended claims.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art.
All publications and patents mentioned in this specification are herein incorporated by reference to the same extent as if each individual publication or patent was specifically and individually indicated to be incorporated by reference and were set forth in its entirety herein for the purpose of disclosing and describing the methods and/or structures associated with the publications cited.
After reading the disclosure of the present application, it will be apparent to those skilled in the art that each of the embodiments described and illustrated herein has discrete components and features which may be readily separated from each other or combined with the features of any of the other several embodiments without departing from the scope and spirit of the present invention. Any methods described may be performed in the order in which the described events are described or in other orders that are logically possible.
It must be noted that, in the present specification and claims, the singular forms "a," "an," "the," and "the" encompass embodiments having plural referents, unless the context clearly dictates otherwise.
Generally, the process of depositing a passivation layer for a solar cell by a CVD process involves turning on an rf power source after evacuating a reaction chamber, and supplying a process gas to the reaction chamber while pumping the process gas by a vacuum pump so that the pressure of the process gas is maintained at a dynamic equilibrium point, wherein energy applied by the rf power source decomposes the process gas to passivate the substrate.
This process is shown in figure 1. As shown in fig. 1, the process gas is introduced and withdrawn simultaneously, thereby maintaining the gas pressure in the reaction chamber at a substantially equilibrium state, which may also be referred to as a deposition gas pressure.
However, although this process can substantially maintain the base deposition rate substantially constant and the quality of the deposited film layer consistent, it is difficult to achieve the gradual deposition of the passivation layer, i.e. the film formation rate at the early stage is high, and the film formation rate at the later stage is slow, so as to form a gradual film layer. This is because the passivation layer has a small thickness and a very fast growth rate, and often requires a short time (e.g., 10 seconds) for film formation, and thus even by controlling the change of process parameters, poor process repeatability is often caused and gradual gradation is difficult to achieve. In addition, since the process gas is exhausted while being ventilated during the film formation, the amount of the process gas used is also large.
Unexpectedly, contrary to the conventional process, the present invention provides a novel method for preparing a passivation layer for a solar cell, which deposits the passivation layer by introducing a predetermined amount of process gas without performing a degassing operation, whereby the film forming speed is naturally gradually changed from fast to slow, thus naturally achieving the gradual change of the passivation film layer and achieving the dual purpose of suppressing epitaxy on the surface of the substrate and subsequently reducing defects of the intrinsic passivation film layer. In other words, the method of the present invention exhausts the gas from the vapor deposition reaction chamber only after the deposition of the passivation layer is completed, and no exhausting operation is performed before. In addition, because the process does not need to carry out exhaust operation, the consumption of the process gas is saved.
Specifically, in the deposition process, the method of the invention closes the gas inlet and exhaust of the vapor deposition reaction chamber, decomposes the process gas in the deposition area by the radio frequency power supply, and causes the process gas to be gradually consumed, and naturally forms the gradual change of the process gas deposition from high-rate deposition to low-rate deposition and from a non-depletion area to a depletion area, and the 2 key gradual changes realize the gradual change of the extremely thin passivation layer within only 10nm, which cannot be realized by the conventional process of directly changing power, flow and pressure. The passivation layer thus grown is characterized in that, from the interface to the outside, the passivation layer has fewer defects, higher H content and higher dark state conductivity.
While not being bound to a particular theory, it is believed that, since the primary role of the passivation layer at the interface is to prevent epitaxy, processes for preparing passivation layers that can prevent epitaxy tend to suffer from a number of defects, low H content, and low dark state conductivity, resulting in a degradation of the Fill Factor (FF) of the cell. Therefore, the conventional process is difficult to balance the two points, the epitaxy can be prevented at the interface by the gradual change method, and then a newly grown passivation layer has relatively excellent dark-state conductivity along with the consumption of process gas, and the degradation of FF is avoided. And the gradual change is very smooth, so that the problem of interface state does not exist, and the conversion efficiency of the finally prepared solar cell can be obviously improved compared with the traditional process.
FIG. 2 schematically shows a state diagram of a method for fabricating a passivation layer according to an embodiment of the present invention, as shown in FIG. 2, a process gas (①) is introduced into the left side of the reaction chamber 100 of the PECVD while the right exhaust path 9 is closed without performing an exhaust operation (as indicated by a cross).
Then, the RF power source (13) is turned on to initiate film deposition, which may include the RF field (RF field 12) decomposing (②) the reactive process gases, initiating film formation (③), adsorption of the initiating species on the substrate 10(④), diffusion of the initiating species in the substrate 10(⑤), surface reaction (⑥) to form a continuous film (14), in addition, by-products are formed during deposition and desorbed from the by-products and diffuse into the reaction chamber (⑦).
After the deposition of the passivation film layer is completed, the exhaust passage is opened and the residual gas is exhausted (⑧), for example, the vacuum pump is turned on and the residual gas is pumped out through the exhaust passage 9.
Fig. 3 is a flow chart that schematically illustrates a method for preparing a passivation layer for a solar cell, in accordance with some embodiments of the present invention. As shown in fig. 3, the method for preparing the passivation layer for the solar cell includes step I, step II, and step III. Step I includes placing the substrate in a chemical vapor deposition reaction chamber. The substrate may be formed of any material, and preferred materials may be selected from n-type and/or p-type monocrystalline silicon wafers. The structure of the chemical vapor deposition reaction chamber is known in the art, and for example, as shown in fig. 2, the chemical vapor deposition reaction chamber 100 may include a radio frequency generator 13, upper and lower walls, and electrodes 11 respectively located in the upper and lower walls. In step I, the substrate may be placed in any suitable position in the reaction chamber, for example, the substrate may be placed over a heating device.
Before step I, the substrate can be cleaned; polishing two surfaces of the substrate; texturing two surfaces of the substrate; the textured surface is subjected to a micro-etch cleaning operation, for example, by reactive ion dry etching.
And step II, introducing a preset amount of process gas into the chemical vapor deposition reaction chamber, and stopping introducing the process gas. The process gas may comprise H2And SiH4. The process gas may be used when preparing the intrinsic amorphous silicon passivation layerTo contain SiH4And optionally H2。 H2And SiH4The ratio is 0-10 (0 represents no H)2)。
May be in the form of, for example, SiH4Introducing the process gas at a gas flow rate of 200-2000 sccm. The gas flow rate may be controlled by a flow meter provided in the intake passage.
Between step II and step IV, the process of the invention may further comprise a step III of stopping the introduction of the process gas after the introduction of the process gas has reached a pressure of 20-200 Pa.
Prior to step II, the method of the present invention may further comprise the step of evacuating the reaction chamber and the step of heating the substrate, for example, the background vacuum of the vacuum chamber is 1 × 10-5Pa to 1 Pa. Preferably, the substrate is heated to a temperature of 150 ℃ to 250 ℃.
Step IV comprises depositing a passivation layer on at least one surface of the substrate. During the deposition process, the rf power source may be turned on to decompose the process gas, thereby depositing a passivation layer film. The power of the radio frequency power supply can be 100W-2000W, and the frequency is 13.56 MHz-40.68 MHz.
After step IV, the method of the present invention may further comprise step V. Step V includes a step of exhausting the gas after deposition. Preferably, the gas in the vapor phase chemical deposition chamber is exhausted only after the deposition of the passivation layer is completed. For example, the exhaust passage 9 may be opened, and then the gas may be evacuated by a vacuum pump.
The thickness of the passivation layer obtained by deposition can be 5-10 nm, and the quality is good. The quality of the passivation layer can be characterized by using a minority carrier lifetime tester WCT-120 to test the minority carrier lifetime of the deposited passivation layer. Generally, the minority carrier lifetime of the passivation layer obtained by the method is generally 4-5 ms, and the minority carrier lifetime of the passivation layer obtained by the traditional process of the same equipment is 2-3 ms.
The present invention also provides a method of fabricating a solar cell using the method described above. Since the method for manufacturing a solar cell employs the above method for manufacturing a passivation layer, a high-quality passivation layer can be obtained, and thus a heterojunction solar cell improved in at least one of photoelectric conversion efficiency, open circuit voltage, short circuit current, and/or fill factor can be obtained.
More specifically, the heterojunction solar cell can be prepared by the following method: sequentially forming the passivation layer, the p-type amorphous silicon film, the transparent conductive oxide film and the metal collector on the front surface of the substrate; and
and depositing the passivation layer, the p-type amorphous silicon film, the transparent conductive oxide film and the metal collector on the back surface of the substrate in sequence, wherein the passivation layer is formed by adopting the preparation method.
The p-type amorphous silicon film and the n-type amorphous silicon film can also be formed by a PECVD method. Further, the p-type amorphous silicon film and the n-type amorphous silicon film may be doped, and the dopant may be selected from B2H6、 TMB、BF3And pH3. The thickness of the p-type amorphous silicon film and the n-type amorphous silicon film may be 5 to 20 nm.
The material of the transparent conductive oxide film can be selected from ITO, tin-doped ITO, tungsten-doped ITO and the like. Methods of forming the transparent conductive oxide film include a magnetron sputtering method, a reactive plasma deposition method, and the like. The thickness of the transparent conductive oxide film can be 80-100nm, the transmittance is 80-90%, and the square resistance is 50-100 ohm.
The metal collector may be formed using a screen printing method. The material of the metal collector is selected from silver, copper and the like. The metal collector may be a silver electrode in the form of a grid, a silver electrode in the form of a primary and a secondary grid.
The invention is further described below with reference to examples, but the invention is by no means limited to these examples.
Comparative example 1
1. Selecting a substrate: the substrate is an n-type monocrystalline silicon wafer, the resistivity is 1-7 omega cm, and the thickness is 180 mu m.
2. Cleaning and texturing: HF solution with dilution concentration of 5% is selected to remove surface oxide layer, and alkali (such as sodium hydroxide or potassium hydroxide) is added with alcohol to form villus structure on the surface by utilizing anisotropic corrosion of monocrystalline silicon. The temperature of the alkali liquor is 80 ℃, the concentration is 1 percent, and the corrosion time is 10 min.
3. Depositing a passivation layer-intrinsic amorphous silicon film, namely placing the silicon wafer subjected to cleaning and texturing in a deposition reaction chamber of a PEVCD (plasma enhanced chemical vapor deposition), vacuumizing to reach a background vacuum degree of about 5 × 10-5After Pa, introducing process gas-SH into the deposition reaction chamber4And H2The ratio is 5:1, and the other side is pumped by a vacuum pump to reach dynamic equilibrium air pressure, so that the deposition air pressure is 20-200 Pa. In the dynamic process, the process gas is decomposed by using the energy loaded by the radio frequency power supply, so that an intrinsic amorphous silicon thin film is formed on the silicon wafer to be used as a passivation layer.
4. Characterization of the passivation layer film: and measuring the minority carrier lifetime of the passivation layer by using a minority carrier lifetime tester WCT-120.
5. Depositing the doped amorphous silicon film, wherein the background vacuum degree of the deposition reaction chamber reaches about 5 × 10-5After Pa, H is used at the temperature of 60-300 ℃ for depositing a passivation layer on a silicon wafer2、SH4And B2H6Depositing a layer of doped p-type amorphous silicon film on the front surface at the deposition pressure of 60-300Pa as process gas, wherein the thickness of the doped p-type amorphous silicon film is 5-20 nm; with H2、SH4And pH3And depositing a layer of doped n-type amorphous silicon film with the thickness of 5-20nm on the back surface of the silicon wafer under the same conditions as the process gas.
6. Depositing a transparent conductive oxide film: respectively depositing a layer of ITO film on the surfaces of the n-type amorphous silicon film and the p-type amorphous silicon film by a magnetron sputtering method, wherein the thickness of the film is 80-100nm, the transmittance is 80-90%, and the square resistance is 50-100 ohms.
7. Printing a silver electrode: respectively printing a layer of silver electrode on the ITO film on the front surface and the back surface by a screen printing method, and then sintering at the temperature of 150 ℃, wherein the thickness of the silver electrode is 5-40 microns.
8. And (3) testing: the IV tester using a steady-state light source measures Eff (photoelectric conversion efficiency), Voc (open circuit voltage), Isc (short circuit current), FF (fill factor) of the cell.
Example 1
1. Selecting a substrate: the substrate is an n-type monocrystalline silicon wafer, the resistivity is 1-7 omega cm, and the thickness is 180 mu m.
2. Cleaning and texturing: HF solution with dilution concentration of 5% is selected to remove the surface oxide layer, and a method of adding alkali (such as sodium hydroxide or potassium hydroxide) and alcohol is adopted, and the surface of the silicon single crystal is subjected to anisotropic corrosion to form a pyramid textured structure. The temperature of the alkali liquor is 80 ℃, the concentration is 1 percent, and the corrosion time is 10 min.
3. Depositing a passivation layer-intrinsic amorphous silicon film, namely placing the cleaned and textured silicon wafer in a deposition reaction chamber of a PEVCD (plasma enhanced chemical vapor deposition), heating to the temperature of 160 ℃, and vacuumizing until the background vacuum degree is about 5 × 10-5After Pa, introducing process gas-SH into the deposition reaction chamber4And H2Ratio 5:1, but closing the bleed passage. After the deposition chamber of the PEVCD reached a pressure of 20Pa, the venting was interrupted. Then, a radio frequency power supply is turned on to decompose the process gas, so that an intrinsic amorphous silicon thin film is formed on the silicon wafer to serve as a passivation layer. And after the deposition is finished, opening the air pump to exhaust residual gas.
4. Characterization of the passivation layer film: and measuring the minority carrier lifetime of the passivation layer by using a minority carrier lifetime tester WCT-120.
5. Depositing the doped amorphous silicon film, wherein the background vacuum degree of the deposition reaction chamber reaches about 5 × 10-5After Pa, the silicon wafer is heated to 60-300 ℃ with H2、SH4And B2H6Depositing a layer of doped p-type amorphous silicon film on the front surface with the thickness of 5-20nm as a process gas at the deposition pressure of 60-300 Pa; with H2、 SH4And pH3Is used as process gas, under the condition of the same other conditions, a layer of doped n-type amorphous silicon film is deposited on the back surface of the silicon wafer, and the thickness is 5-20 nm.
6. Depositing a transparent conductive oxide film: respectively depositing a layer of ITO film on the surfaces of the n-type amorphous silicon film and the p-type amorphous silicon film by a magnetron sputtering method, wherein the thickness of the film is 80-100nm, the transmittance is 80-90%, and the square resistance is 50-100 ohms.
7. Printing a silver electrode: respectively printing a layer of silver electrode on the ITO film on the front surface and the back surface by a screen printing method, and then sintering at the temperature of 150 ℃, wherein the thickness of the silver electrode is 5-10 microns.
8. And (3) testing: the IV tester using the steady-state light source measures Eff (photoelectric conversion efficiency), Voc (open circuit voltage), Isc (short circuit current), FF (fill factor) of the cell, and the test results are shown in table 1.
Example 2
A solar cell was fabricated in substantially the same manner as in example 1, except that the ventilation was interrupted after the process gas reached a pressure of 100Pa during the deposition of the passivation layer-intrinsic amorphous silicon thin film. Then, a radio frequency power supply is turned on to decompose the process gas, so that intrinsic amorphous silicon thin films are respectively formed on two sides of the silicon wafer to serve as passivation layers. And after the deposition is finished, opening the air pump to exhaust residual gas.
The quality of the prepared passivation layer and the performance of the heterojunction solar cell were tested in the same manner as in example 1. The test results are shown in table 1 below.
Example 3
A solar cell was fabricated in substantially the same manner as in example 1, except that the ventilation was interrupted after the process gas reached a pressure of 200Pa during the deposition of the passivation layer-intrinsic amorphous silicon thin film. Then, a radio frequency power supply is turned on to decompose the process gas, so that intrinsic amorphous silicon thin films are respectively formed on two sides of the silicon wafer to serve as passivation layers. And after the deposition is finished, opening the air pump to exhaust residual gas.
The quality of the prepared passivation layer and the performance of the heterojunction solar cell were tested in the same manner as in example 1. The test results are shown in table 1 below.
Example 4
A solar cell was fabricated in substantially the same manner as in example 1, except that a process gas was introduced into the deposition chamber as SH during the deposition of the passivation layer-intrinsic amorphous silicon thin film4While closing the air extraction passage. And then, turning on a radio frequency power supply to decompose the process gas, thereby forming intrinsic amorphous silicon thin films as passivation layers on two sides of the silicon wafer respectively. After the deposition is finished, the air pump is opened, andand discharging residual gas.
The quality of the prepared passivation layer and the performance of the heterojunction solar cell were tested in the same manner as in example 1. The test results are shown in table 1 below.
Example 5
A solar cell was fabricated in substantially the same manner as in example 1, except that a process gas-SH was introduced into the deposition chamber during the deposition of the passivation layer-intrinsic amorphous silicon thin film4And H2The ratio is 10:1, and the air pumping passage is closed. Then, a radio frequency power supply is turned on to decompose the process gas, so that intrinsic amorphous silicon thin films are respectively formed on two sides of the silicon wafer to serve as passivation layers. And after the deposition is finished, opening the air pump to exhaust residual gas.
The quality of the prepared passivation layer and the performance of the heterojunction solar cell were tested in the same manner as in example 1. The test results are shown in table 1 below.
TABLE 1
As can be seen from the results shown in table 1, by the method for preparing the passivation layer of the present invention, a gradual change of the passivation film layer can be achieved, thereby suppressing epitaxial growth of the passivation layer on the substrate and reducing defects of the intrinsic passivation film layer. In addition, the method does not need to carry out exhaust operation, and saves the consumption of process gas. The present invention thus provides a heterojunction solar cell with improved photoelectric conversion efficiency, open circuit voltage, short circuit current and/or fill factor.
The exemplary embodiments are provided to explain the principles of the present invention, but the present invention is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.