CN116195055A - 半导体装置以及半导体装置的制造方法 - Google Patents

半导体装置以及半导体装置的制造方法 Download PDF

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CN116195055A
CN116195055A CN202180061496.1A CN202180061496A CN116195055A CN 116195055 A CN116195055 A CN 116195055A CN 202180061496 A CN202180061496 A CN 202180061496A CN 116195055 A CN116195055 A CN 116195055A
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electrode
conductive member
bonding
semiconductor device
thickness direction
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齐藤光俊
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Rohm Co Ltd
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Rohm Co Ltd
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Abstract

半导体装置具备芯片焊盘、半导体元件、接合层、第一导电部件以及第二导电部件。上述半导体元件具有与上述芯片焊盘的主面对置地设置的第一电极、在厚度方向上设置在与上述第一电极相反的一侧的第二电极以及第三电极。上述第一电极与上述主面电接合。上述接合层将上述第一电极和上述主面电接合。上述第一导电部件与上述第二电极电接合。上述第二导电部件与上述第三电极电接合。沿上述厚度方向观察时，上述第三电极的面积比上述第二电极的面积小。上述第二导电部件的杨氏模量比上述第一导电部件的杨氏模量小。

Description

半导体装置以及半导体装置的制造方法
技术领域
本公开涉及具备MOSFET等半导体元件的半导体装置以及该半导体装置的制造方法。
背景技术
具备基于电信号变换电流的MOSFET等半导体元件的半导体装置广为人知。这种半导体装置例如在称为DC－DC转换器的具备电力变换电路的电子设备等中使用。专利文献1中公开了搭载有MOSFET的半导体装置的一例。该半导体装置具有：施加有电源电压的漏极引线；用于向MOSFET输入电信号的栅极引线；以及与该电源电压对应的电流基于该电信号变换之后流动变换后的电流的源极引线。MOSFET具有：与漏极引线导通的漏极电极；与栅极引线导通的栅极电极；以及与源极引线导通的源极电极。漏极电极通过焊锡并利用漏极引线而电接合。在栅极电极以及栅极引线和源极电极以及源极引线分别电接合有金属夹。由此，能够在该半导体装置流动更大的电流。
近年来，具备包含以碳化硅等为材料的化合物半导体基板的MOSFET的半导体装置得到普及。与以往的MOSFET比较，该MOSFET具有以下优点：能够使元件的大小更小，并且能够使电流的变换效率进一步提高。在专利文献1所公开的半导体装置中，在采用该MOSFET的情况下，在通过焊锡将漏极电极与漏极引线电接合时，有时该MOSFET的位置相对于该漏极引线偏移。这是由于该MOSFET的自重比较小、以及通过回流使焊锡熔融而引起的。并且，沿漏极引线的厚度方向观察时，栅极电极的面积比源极电极的面积小。因此，若相对于芯片焊盘产生该MOSFET的位置偏移，则有尤其是金属夹相对于栅极电极的接合面积极度缩小的担忧。这成为引起金属夹相对于栅极电极的接合状态的恶化、导致该半导体装置的成品率的下降的主要原因。
现有技术文献
专利文献
专利文献1：日本特开2001－274206号公报
发明内容
发明要所解决的课题
本公开鉴于上述事情，课题是提供一种半导体装置及其制造方法，其能够与更大的电流对应，并且能够实现导电部件相对于半导体元件的多个电极的各个的接合状态的改善。
用于解决课题的方案
由本公开的第一方案提供的半导体装置具备：芯片焊盘，其具有朝向厚度方向的主面；半导体元件，其具有与上述主面对置地设置的第一电极、以及在上述厚度方向上设置在与上述第一电极相反的一侧而且相互分离地配置的第二电极以及第三电极，并且上述第一电极与上述主面电接合；第一接合层，其将上述第一电极和上述主面电接合；第一导电部件，其与上述第二电极电接合；以及第二导电部件，其与上述第三电极电接合，沿上述厚度方向观察时，上述第三电极的面积比上述第二电极的面积小，上述第二导电部件的杨氏模量比上述第一导电部件的杨氏模量小。
由本公开的第二方案提供的半导体装置的制造方法具备以下工序：在具有朝向厚度方向的主面的芯片焊盘中，将具有导电性的接合材料配置在上述主面上的工序；在半导体元件中，以上述第一电极与上述接合材料对置的方式将上述半导体元件配置在上述接合材料上的工序，其中，上述半导体元件具有在上述厚度方向上相互朝向相反的一侧的第一电极及第二电极、以及在上述厚度方向上设置在与上述第二电极相同的一侧而且与上述第二电极分离地配置的第三电极；通过使上述接合材料熔融以及固化，从而使上述第一电极与上述主面电接合的工序；使第一导电部件与上述第二电极电接合的工序；以及使第二导电部件与上述第三电极电接合的工序，沿上述厚度方向观察时，上述第三电极的面积比上述第二电极的面积小，上述第二导电部件的杨氏模量比上述第一导电部件的杨氏模量小。
发明效果
根据本公开的半导体装置及其制造方法，能够与更大的电流对应，并且能够实现导电部件相对于半导体元件的多个电极的各个的接合状态的改善。
本公开的其它特征以及优点通过基于附图在以下进行的详细的说明将会更加清楚。
附图说明
图1是本公开的一个实施方式的半导体装置的立体图。
图2是图1所示的半导体装置的俯视图。
图3是与图2对应的俯视图，透过了封固树脂。
图4是图1所示的半导体装置的仰视图。
图5是图1所示的半导体装置的主视图。
图6是图1所示的半导体装置的右侧视图。
图7是沿图3的VII－VII线的剖视图。
图8是沿图3的VIII－VIII线的剖视图。
图9是沿图3的IX－IX线的剖视图。
图10是沿图3的X－X线的剖视图。
图11是沿图3的局部放大图。
图12是沿图7的局部放大图。
图13是沿图7的局部放大图。
图14是沿图8的局部放大图。
图15是说明图1所示的半导体装置的制造工序的俯视图。
图16是说明图1所示的半导体装置的制造工序的俯视图。
图17是说明图1所示的半导体装置的制造工序的俯视图。
图18是说明图1所示的半导体装置的制造工序的局部放大剖视图。
图19是说明图1所示的半导体装置的制造工序的俯视图。
图20是说明图1所示的半导体装置的制造工序的局部放大剖视图。
图21是说明图1所示的半导体装置的制造工序的局部放大剖视图。
图22是说明图1所示的半导体装置的制造工序的俯视图。
图23是说明图1所示的半导体装置的制造工序的俯视图。
图24是说明图1所示的半导体装置的作用效果的俯视图。
具体实施方式
基于附图对用于实施本公开的方式进行说明。
基于图1～图14，对本公开的一个实施方式的半导体装置A10进行说明。半导体装置A10例如在称为DC－DC转换器的具备电力变换电路的电子设备等中使用。半导体装置A10具备芯片焊盘10、第一引线11、第二引线12、第三引线13、半导体元件20、第一接合层21、第二接合层22、第三接合层23、第一导电部件31、第二导电部件32以及封固树脂40。在此，为了便于理解，图3透过了封固树脂40。在图3中，用想象线(双点划线)示出透过的封固树脂40。
在半导体装置A10的说明中，为了方便，将芯片焊盘10的厚度方向称为“厚度方向z”。将与厚度方向z正交的方向称为“第一方向x”。将与厚度方向z以及第一方向x这双方正交的方向称为“第二方向y”。沿厚度方向z观察时，第一方向x相当于半导体装置A10的长边方向。沿厚度方向z观察时，第二方向y相当于半导体装置A10的短边方向。
如图3、以及图7～图9所示，芯片焊盘10是搭载半导体元件20的导电部件。芯片焊盘10与第一引线11、第二引线12以及第三引线13一起由同一引线框构成。该引线框是铜(Cu)、或者铜合金。因此，芯片焊盘10、第一引线11、第二引线12以及第三引线13的每个的组成包含铜(即、各部件含有铜)。如图9所示，芯片焊盘10具有主面101、背面102以及贯通孔103。主面101朝向厚度方向z。在主面101之上搭载有半导体元件20。背面102在厚度方向z上朝向与主面101相反的一侧。在背面102例如实施有镀锡(Sn)。贯通孔103在厚度方向z上从主面101至背面102贯通芯片焊盘10。贯通孔103沿厚度方向z观察时为圆形状。如图7所示，芯片焊盘10的厚度T比第一引线11的最大厚度tmax大。
如图3以及图7～图9所示，半导体元件20搭载在芯片焊盘10的主面101之上。半导体元件20例如是纵型构造的MOSFET(Metal-Oxide-Semiconductor Field-EffectTransistor，金属氧化物半导体场效应晶体管)。在半导体装置A10的说明中，半导体元件20是n通道型，而且以纵型构造的MOSFET为对象。半导体元件20包含化合物半导体基板。该化合物半导体基板的主材料是碳化硅(SiC)。除此以外，作为该化合物半导体基板的主材料，也可以使用氮化镓(GaN)。在半导体装置A10中，沿厚度方向z观察时，半导体元件20的面积为芯片焊盘10的主面101的面积的40％以下。沿厚度方向z观察时，半导体元件20的面积可以为主面101的面积的20％以下，也可以进一步为10％以下。该比率可通过半导体元件20的该面积与主面101的该面积的变迁改变而获得。如图11、图12以及图14所示，半导体元件20具有第一电极201、第二电极202以及第三电极203。
如图12以及图14所示，第一电极201与芯片焊盘10的主面101对置地设置。在第一电极201施加有成为电力变换对象的直流的电源电压。即，第一电极201相当于漏极电极。
如图12以及图14所示，第二电极202在厚度方向z上设置在与第一电极201相反的一侧。在第二电极202流动有由半导体元件20变换后的电流。即，第二电极202相当于源极电极。
如图11以及图14所示，第三电极203在厚度方向z上设置在与第一电极201相反的一侧，而且远离第二电极202地配置。在第三电极203施加有用于驱动半导体元件20的栅极电压。即，第三电极203相当于栅极电极。基于该栅极电压，半导体元件20变换与施加于第一电极201的电源电压对应的电流。沿厚度方向z观察时，第三电极203的面积比第二电极202的面积小。
如图12以及图14所示，第一接合层21包含介于芯片焊盘10的主面101与半导体元件20的第一电极201之间的部分。第一接合层21具有导电性。第一接合层21将第一电极201与主面101电接合。由此，在半导体装置A10中，第一电极201与主面101电接合，而且成为第一电极201与芯片焊盘10导通的结构。第一接合层21含有锡。第一接合层21的材料例如是无铅焊料。第一接合层21也可以是铅焊料。
如图3以及图7所示，第一引线11远离芯片焊盘10地配置。第一引线11沿第一方向x延伸。第一引线11与半导体元件20的第二电极202导通。因此，第一引线11相当于半导体装置A10的源极端子。第一引线11具有包覆部111、露出部112、第一接合面113。包覆部111被封固树脂40覆盖。露出部112与包覆部111连接，而且从封固树脂40露出。露出部112在第一方向x上向远离芯片焊盘10的一侧延伸。在露出部112的表面例如实施有镀锡。第一接合面113在厚度方向z上朝向与芯片焊盘10的主面101相同的一侧。第一接合面113包含于包覆部111的一部分。在厚度方向z上，第一接合面113相对于主面101位于偏靠半导体元件20的位置。
如图3以及图8所示，第二引线12远离芯片焊盘10以及第一引线11这双方地配置。第二引线12沿第一方向x延伸。在半导体装置A10中，第二引线12在第二方向y上相对于第三引线13位于与第一引线11相反的一侧。第二引线12与半导体元件20的第三电极203导通。因此，第二引线12相当于半导体装置A10的栅极端子。第二引线12具有包覆部121、露出部122、第二接合面123。包覆部121被封固树脂40覆盖。露出部122与包覆部121连接，而且从封固树脂40露出。露出部122在第一方向x上向远离芯片焊盘10的一侧延伸。在露出部122的表面实施有镀锡。第二接合面123在厚度方向z上朝向与芯片焊盘10的主面101相同的一侧。第二接合面123包含于包覆部121的一部分。在厚度方向z上，第二接合面123相对于主面101位于偏靠半导体元件20的位置。如图10所示，在厚度方向z上，第二接合面123的位置与第一引线11的第一接合面113的位置相同。
如图3以及图9所示，第三引线13包含沿第一方向x延伸的部分，并且与芯片焊盘10连接。第三引线13的材料与芯片焊盘10的材料相同。第三引线13具有包覆部131以及露出部132。包覆部131与芯片焊盘10连接，而且被封固树脂40覆盖。沿第二方向y观察时，包覆部131屈曲。露出部132与包覆部131连接，而且从封固树脂40露出。露出部132在第一方向x上向远离芯片焊盘10的一侧延伸。在露出部132的表面实施有镀锡。
如图5所示，在半导体装置A10中，第一引线11的露出部112、第二引线12的露出部122、以及第三引线13的露出部132d各自的高度h均相同。因此，沿第二方向y观察时，第三引线13的至少一部分(露出部132)与第一引线11以及第二引线12分别重叠(参照图6)。
如图3以及图7所示，第一导电部件31与半导体元件20的第二电极202和第一引线11的第一接合面113电接合。由此，第一引线11与第二电极202导通。第一导电部件31含有铜。在半导体装置A10中，第一导电部件31是标准尺寸的金属夹。如图12以及图13所示，第一导电部件31具有第一接合部311以及第二接合部312。第一接合部311位于第一导电部件31的一端，而且是使第一导电部件31与第二电极202电接合的部分。第二接合部312位于第一导电部件31的另一端，而且是使第一导电部件31与第一接合面113电接合的部分。
如图12所示，第二接合层22包含介于半导体元件20的第二电极202与第一导电部件31的第一接合部311之间的部分。第二接合层22具有导电性。第二接合层22将第一接合部311与第二电极202电接合。由此，在半导体装置A10中，第一导电部件31与第二电极202电接合，而且成为第一导电部件31与第二电极202导通的结构。第二接合层22含有锡。第二接合层22由与第一接合层21相同的材料构成。并且，第一接合层21的厚度t1比第二接合层22的厚度t2大。
如图13所示，第三接合层23包含介于第一引线11的第一接合面113与第一导电部件31的第二接合部312之间的部分。第三接合层23具有导电性。第三接合层23将第二接合部312与第一接合面113电接合。由此，在半导体装置A10中，第一导电部件31与第一接合面113电接合，而且成为第一导电部件31与第一引线11导通的结构。第三接合层23由与第一接合层21相同的材料构成。
如图3以及图8所示，第二导电部件32与半导体元件20的第三电极203和第二引线12的第二接合面123电接合。由此，第二引线12与第三电极203导通。第二导电部件32含有铝(Al)。在半导体装置A10中，第二导电部件32是金属丝。第二导电部件32通过引线接合而形成。如图8所示，第二导电部件32具有第三接合部321以及第四接合部322。如图14所示，第三接合部321位于第二导电部件32的一端，而且是使第二导电部件32与第三电极203电接合的部分。在通过引线接合来形成第二导电部件32时，第三接合部321相当于该接合的始点。第四接合部322位于第二导电部件32的另一端，而且是使第二导电部件32与第二接合面123电接合的部分。在通过引线接合来形成第二导电部件32时，第四接合部322相当于该接合的终点。
对第一导电部件31和第二导电部件32的不同点进行以下说明。第二导电部件32的杨氏模量(弾性率)比第一导电部件31的杨氏模量小。这如上所述，基于第一导电部件31含有铜，而且第二导电部件32含有铝。因此，第二导电部件32的线膨胀系数比第一导电部件31的线膨胀系数大。并且，第二导电部件32的导热率比第一导电部件31的导热率小。并且，如图11所示，第一导电部件31的宽度B比第二导电部件32的宽度(直径)D大。
如图3以及图7～图10所示，封固树脂40覆盖半导体元件20、第一导电部件31以及第二导电部件32、芯片焊盘10、第一引线11、第二引线12以及第三引线13各自的一部分。封固树脂40具有电绝缘性。封固树脂40例如由含有黑色的环氧树脂的材料构成。封固树脂40具有顶面41、底面42、一对第一侧面43、一对第二侧面44、一对开口45、以及安装孔46。
如图7～图10所示，顶面41在厚度方向z上朝向与芯片焊盘10的主面101相同的一侧。如图7～图9所示，底面42在厚度方向z上朝向与顶面41相反的一侧。芯片焊盘10的背面102从底面42露出。
如图2、图4以及图6所示，一对第一侧面43在第一方向x上相互分离地配置。一对第一侧面43分别与顶面41以及底面42连接。如图5所示，第一引线11的露出部112、第二引线12的露出部122、以及第三引线13的露出部132从一对第一侧面43中的一方的该第一侧面43露出。
如图2、图4以及图5所示，一对第二侧面44在第二方向y上相互分离地配置。一对第二侧面44分别与顶面41以及底面42连接。如图2、图6以及图8所示，一对开口45在第二方向y上相互分离地配置。一对开口45的每个从顶面41和一对第二侧面44的任一个这双方朝向封固树脂40的内方凹陷。芯片焊盘10的主面101的一部分从一对开口45的每个露出。如图2、图4以及图9所示，安装孔46在厚度方向z上从顶面41至底面42贯通封固树脂40。沿厚度方向z观察时，安装孔46内包于芯片焊盘10的贯通孔103。规定贯通孔103的芯片焊盘10的周面被封固树脂40覆盖。由此，沿厚度方向z观察时，安装孔46的最大尺寸比贯通孔103的尺寸小。
以下，基于图15～图23，对半导体装置A10的制造方法的一例进行说明。在此，图18以及图20的剖面位置与图12的剖面位置相同。图21的剖面位置与图13的剖面位置相同。
首先，如图15所示，在芯片焊盘10的主面101之上配置第一接合材料81。在此，第一引线11、第二引线12以及第三引线13通过构成引线框的拉杆80而相互连结。拉杆80沿第二方向y延伸。第一接合材料81具有导电性。第一接合材料81是膏状焊料、或者线焊锡。在第一接合材料81为线焊锡的情况下，该第一接合材料81临时安装于主面101。
接着，如图16所示，在第一接合材料81之上配置半导体元件20。此时，半导体元件20的第一电极201与第一接合材料81对置。在第一接合材料81为线焊锡的情况下，第一电极201临时安装于第一接合材料81。
接着，如图17以及图18所示，通过回流使第一接合材料81熔融之后，通过冷却使之固化，由此使半导体元件20的第一电极201与芯片焊盘10的主面101电接合。在本工序中，通过冷却而固化的第一接合材料81成为第一接合层21。
接着，如图20以及图21所示，在半导体元件20的第二电极202之上配置第二接合材料82，在第一引线11的第一接合面113之上配置第三接合材料83。第二接合材料82以及第三接合材料83分别是与第一接合材料81相同的接合材料。第二接合材料82以及第三接合材料83分别具有导电性。在第二接合材料82以及第三接合材料83分别是膏状焊料的情况下，在这些配置中，使用分配器等。然后，通过夹焊接使第一导电部件31与第二电极202和第一接合面113电接合。在该夹焊接中，将第一导电部件31的第一接合部311配置在第二接合材料82之上。并且，将第一导电部件31的第二接合部312配置在第三接合材料83之上。然后，通过回流使第二接合材料82以及第三接合材料83分别熔融之后，通过冷却使之固化，由此使第一接合部311与第二电极202电接合。并且，使第二接合部312与第一接合面113电接合。根据以上说明，如图19所示，第一导电部件31与第二电极202和第一接合面113电接合。在本工序中，通过冷却而固化的第二接合材料82成为第二接合层22。并且，通过冷却而固化的第三接合材料83成为第三接合层23。
以下，如图22所示，使第二导电部件32与半导体元件20的第三电极203和第二引线12的第二接合面123电接合。在本工序中，通过引线接合使第二导电部件32与第三电极203和第二接合面123电接合。因此，第二导电部件32通过该引线接合而形成。
接着，如图23所示，形成覆盖半导体元件20、第一导电部件31以及第二导电部件32、和芯片焊盘10、第一引线11、第二引线12以及第三引线13的各自的一部分的封固树脂84。封固树脂84通过传递模塑法成形而形成。伴随封固树脂84的形成，形成有树脂毛边841。树脂毛边841由第一引线11的露出部112、第二引线12的露出部122、第三引线13的露出部132、以及拉杆80阻止。然后，利用高压水等除去树脂毛边841。然后，通过将拉杆80作为导电路径的电解镀覆，实施覆盖第一引线11的露出部112、第二引线12的露出部122、以及第三引线13的露出部132各自的表面、和芯片焊盘10的背面102的镀锡。最后将拉杆80切断，由此得到半导体装置A10。
以下，对半导体装置A10的作用效果进行说明。
半导体装置A10具备第一接合层21、第一导电部件31以及第二导电部件32。第一接合层21具有导电性，并且将半导体元件20的第一电极201与芯片焊盘10的主面101电接合。第一导电部件31与半导体元件20的第二电极202电接合。第二导电部件32与半导体元件20的第三电极203电接合。沿厚度方向z观察时，第三电极203的面积比第二电极202的面积小。并且，第二导电部件32的杨氏模量比第一导电部件31的杨氏模量小。
在此，在图17以及图18所示的半导体装置A10的制造工序中，在使成为第一接合层21的第一接合材料81熔融时，如图24所示，有时半导体元件20的位置相对于芯片焊盘10偏移。其结果，在半导体元件20中，第二电极202以及第三电极203各自的位置从原来的位置偏移。在该情况下，沿厚度方向z观察时，第二电极202的面积比较大，因此第一导电部件31相对于第二电极202的接合状态能够维持良好的状态。但是，沿厚度方向z观察时，第三电极203的面积比第二电极202的面积小，因此若第二导电部件32是标准尺寸的金属夹，则第二导电部件32相对于第三电极203的接合面积有时会极度缩小。因此，在图22所示的半导体装置A10的制造工序中，通过引线接合来形成第二导电部件32。由此，由于在产生了位置偏移的第三电极203规定对准目标来正确地接合作为金属丝的第二导电部件32，因此可避免第二导电部件32相对于第三电极203的接合面积的缩小。因此，即使在产生了半导体元件20相对于芯片焊盘10的位置偏移的情况下，第二导电部件32相对于第三电极203的接合状态也会变得良好。在该状态下，若第二导电部件32的杨氏模量比第一导电部件31的杨氏模量小，则能够使伴随第二导电部件32的形成而降低作用于第三电极203的冲击力。根据以上说明，根据半导体装置A10，能够与更大的电流对应，能够实现导电部件(第一导电部件31以及第二导电部件32)相对于半导体元件20的多个电极(第二电极202以及第三电极203)的每个的接合状态的改善。
第一导电部件31含有铜。由此，与铝金属丝比较，能够使第一导电部件31的电阻降低。这适合于在半导体元件20流动更大的电流。
第二导电部件32的线膨胀系数比第一导电部件31的线膨胀系数大。与此相对，第二导电部件32的导热率比第一导电部件31的导热率小。由此，在使用半导体装置A10时，与第三电极203相比，从半导体元件20产生的热容易向第二电极202传导。由此，能够抑制第三电极203中的接通电阻的上升，并且能够实现第三电极203与第二导电部件32的界面中的热应力的降低。
第一接合层21的厚度t1比第二接合层22的厚度t2大。由此，在使用半导体装置A10时，能够使从半导体元件20发出的热更迅速地向芯片焊盘10传导。并且，在半导体装置A10的制造工序中，通过将第一接合材料81设为线焊锡，从而能够确保厚度均匀的第一接合层21。
在厚度方向z上，第一引线11的第一接合面113相对于芯片焊盘10的主面101位于偏靠半导体元件20的位置。由此，第一导电部件31的长度缩短，因此能够实现第一导电部件31中的电感的降低。
在厚度方向z中，第二引线12的第二接合面123相对于芯片焊盘10的主面101位于偏靠半导体元件20的位置。由此，第二导电部件32的长度缩短，能够实现第二导电部件32中的电感的降低。这适合于半导体元件20的第三电极203中的接通电阻的降低。
芯片焊盘10含有铜。并且，芯片焊盘10的厚度T比第一引线11的最大厚度tmax大。由此，能够实现芯片焊盘10的导热率的提高，并且能够提高与厚度方向z正交的方向的导热的效率。这有助于芯片焊盘10的散热性的提高。
半导体装置A10具备覆盖半导体元件20、第一导电部件31及第二导电部件32、以及芯片焊盘10的一部分的封固树脂40。芯片焊盘10的背面102从封固树脂40露出。由此，能够从外部保护半导体元件20、第一导电部件31以及第二导电部件32，并且能够避免半导体装置A10的散热性的下降。
半导体装置A10还具备第二接合层22以及第三接合层23。第二接合层22具有导电性，并且将第一导电部件31与半导体元件20的第二电极202电接合。第三接合层23具有导电性，并且将第一导电部件31与第一引线11的第一接合面113电接合。第二接合层22以及第三接合层23分别由与含有锡的第一接合层21相同的材料构成。由此，在图20以及图21所示的半导体装置A10的制造工序中，在使成为第二接合层22的第二接合材料82熔融时，使成为第三接合层23的第三接合材料83同时熔融。因此，在半导体装置A10的制造中，在将第一导电部件31与第二电极202电接合时，能够使第一导电部件31与第一接合面113同时电接合，实现半导体装置A10的制造效率的提高。
本公开并不限定于上述的实施方式。本公开的各部的具体的结构自由地进行设计变更。
本公开包含以下的附记所记载的结构。
附记1.
一种半导体装置，具备：
芯片焊盘，其具有朝向厚度方向的主面；
半导体元件，其具有与上述主面对置地设置的第一电极、以及在上述厚度方向上设置在与上述第一电极相反的一侧而且相互分离地配置的第二电极以及第三电极，并且上述第一电极与上述主面电接合；
第一接合层，其将上述第一电极与上述主面电接合；
第一导电部件，其与上述第二电极电接合；以及
第二导电部件，其与上述第三电极电接合，
沿上述厚度方向观察时，上述第三电极的面积比上述第二电极的面积小，
上述第二导电部件的杨氏模量比上述第一导电部件的杨氏模量小。
附记2.
根据附记1所记载的半导体装置，上述第一接合层含有锡。
附记3.
根据附记2所记载的半导体装置，
还具备第二接合层，该第二接合层将上述第一导电部件和上述第二电极电接合，
上述第二接合层由与上述第一接合层相同的材料构成。
附记4.
根据附记3所记载的半导体装置，
上述第二导电部件的线膨胀系数比上述第一导电部件的线膨胀系数大。
附记5.
根据附记4所记载的半导体装置，
上述第二导电部件的导热率比上述第一导电部件的导热率小。
附记6.
根据附记5所记载的半导体装置，
上述第一导电部件的宽度比上述第二导电部件的宽度大。
附记7.
根据附记4至6任一项中所记载的半导体装置，
上述第一导电部件含有铜，
上述第二导电部件含有铝。
附记8.
根据附记4至7任一项中所记载的半导体装置，
沿上述厚度方向观察时，上述半导体元件的面积为上述主面的面积的40％以下。
附记9.
根据附记8所记载的半导体装置，
上述半导体元件包含化合物半导体基板。
附记10.
根据附记3至9任一项中所记载的半导体装置，还具备：
第一引线，其具有在上述厚度方向上朝向与上述主面相同的一侧的第一接合面，并且远离上述芯片焊盘地配置；以及
第三接合层，其将上述第一导电部件和上述第一接合面电接合，
上述第一引线含有铜，
上述第三接合层由与上述第一接合层相同的材料构成。
附记11.
根据附记10所记载的半导体装置，
在上述厚度方向上，上述第一接合面相对于上述主面位于偏靠上述半导体元件的位置。
附记12.
根据附记11所记载的半导体装置，
上述芯片焊盘的厚度比上述第一引线的最大厚度大。
附记13.
根据附记10至12任一项中所记载的半导体装置，
还具备第二引线，该第二引线具有在上述厚度方向上朝向与上述主面相同的一侧的第二接合面，并且远离上述芯片焊盘以及上述第一引线双方地配置，
上述第二导电部件与上述第二接合面电接合。
附记14.
根据附记13所记载的半导体装置，
在上述厚度方向上，上述第二接合面相对于上述主面位于偏靠上述半导体元件的位置。
附记15.
根据附记13或14所记载的半导体装置，
上述第一引线以及上述第二引线分别沿与上述厚度方向正交的第一方向延伸，
还具备第三引线，该第三引线包含沿上述第一方向延伸的部分，并且与上述芯片焊盘连接，
上述第三引线的材料与上述芯片焊盘的材料相同，
沿与上述厚度方向以及上述第一方向双方正交的第二方向观察时，上述第三引线的至少一部分与上述第一引线以及上述第二引线的各个重叠。
附记16.
根据附记1至15任一项中所记载的半导体装置，
还具备封固树脂，该封固树脂覆盖上述半导体元件、上述第一导电部件及上述第二导电部件、以及上述芯片焊盘的一部分，
上述芯片焊盘具有在上述厚度方向上朝向与上述主面相反的一侧的背面，
上述背面从上述封固树脂露出。
附记17.
一种半导体装置的制造方法，具备以下工序：
在具有朝向厚度方向的主面的芯片焊盘中，将具有导电性的接合材料配置在上述主面上的工序；
在半导体元件中，以上述第一电极与上述接合材料对置的方式将上述半导体元件配置在上述接合材料上的工序，其中，上述半导体元件具有在上述厚度方向上相互朝向相反的一侧的第一电极及第二电极、以及在上述厚度方向上设置在与上述第二电极相同的一侧而且与上述第二电极分离地配置的第三电极；
通过使上述接合材料熔融以及固化，从而使上述第一电极与上述主面电接合的工序；
使第一导电部件与上述第二电极电接合的工序；以及
使第二导电部件与上述第三电极电接合的工序，
沿上述厚度方向观察时，上述第三电极的面积比上述第二电极的面积小，
上述第二导电部件的杨氏模量比上述第一导电部件的杨氏模量小。
附记18.
根据附记17所记载的半导体装置的制造方法，
在使上述第一导电部件电接合的工序中，通过使用了与上述接合材料相同的接合材料的夹接合，从而上述第一导电部件与上述第二电极电接合，
在使上述第二导电部件电接合的工序中，通过引线接合，从而使上述第二导电部件与上述第三电极电接合。
附记19.
根据附记18所记载的半导体装置的制造方法，上述接合材料是线焊锡。
符号说明
A10—半导体装置，10—芯片焊盘，101—主面，102—背面，103—贯通孔，11—第一引线，111—包覆部，112—露出部，113—第一接合面，12—第二引线，121—包覆部，122—露出部，123—第二接合面，13—第三引线，131—包覆部，132—露出部，19—镀层，20—半导体元件，201—第一电极，202—第二电极，203—第三电极，21—第一接合层，22—第二接合层，23—第三接合层，31—第一导电部件，311—第一接合部，312—第二接合部，32—第二导电部件，321—第三接合部，322—第四接合部，40—封固树脂，41—顶面，42—底面，43—第一侧面，44—第二侧面，45—开口，46—安装孔，80—拉杆，81—第一接合材料，82—第二接合材料，83—第三接合材料，z—厚度方向，x—第一方向，y—第二方向。

Claims (15)

1.一种半导体装置，其特征在于，具备：
芯片焊盘，其具有朝向厚度方向的主面；
半导体元件，其具有与上述主面对置地设置的第一电极、以及在上述厚度方向上设置在与上述第一电极相反的一侧而且相互分离地配置的第二电极以及第三电极，并且上述第一电极与上述主面电接合；
第一接合层，其将上述第一电极和上述主面电接合；
第一导电部件，其与上述第二电极电接合；以及
第二导电部件，其与上述第三电极电接合，
沿上述厚度方向观察时，上述第三电极的面积比上述第二电极的面积小，上述第二导电部件的杨氏模量比上述第一导电部件的杨氏模量小。
2.根据权利要求1所述的半导体装置，其特征在于，
上述第一接合层含有锡。
3.根据权利要求2所述的半导体装置，其特征在于，
还具备第二接合层，该第二接合层将上述第一导电部件和上述第二电极电接合，
上述第二接合层由与上述第一接合层相同的材料构成。
4.根据权利要求3所述的半导体装置，其特征在于，
上述第二导电部件的线膨胀系数比上述第一导电部件的线膨胀系数大。
5.根据权利要求4所述的半导体装置，其特征在于，
上述第二导电部件的导热率比上述第一导电部件的导热率小。
6.根据权利要求5所述的半导体装置，其特征在于，
上述第一导电部件的宽度比上述第二导电部件的宽度大。
7.根据权利要求4至6任一项中所述的半导体装置，其特征在于，
上述第一导电部件含有铜，
上述第二导电部件含有铝。
8.根据权利要求4至7任一项中所述的半导体装置，其特征在于，
沿上述厚度方向观察时，上述半导体元件的面积为上述主面的面积的40％以下。
9.根据权利要求3至8任一项中所述的半导体装置，其特征在于，
还具备：
第一引线，其具有在上述厚度方向上朝向与上述主面相同的一侧的第一接合面，并且远离上述芯片焊盘地配置；以及
第三接合层，其将上述第一导电部件和上述第一接合面电接合，
上述第一引线含有铜，
上述第三接合层由与上述第一接合层相同的材料构成。
10.根据权利要求9所述的半导体装置，其特征在于，
在上述厚度方向上，上述第一接合面相对于上述主面位于偏靠上述半导体元件的位置。
11.根据权利要求10所述的半导体装置，其特征在于，
上述芯片焊盘的厚度比上述第一引线的最大厚度大。
12.根据权利要求9至11任一项中所述的半导体装置，其特征在于，
还具备第二引线，该第二引线具有在上述厚度方向上朝向与上述主面相同的一侧的第二接合面，并且远离上述芯片焊盘以及上述第一引线双方地配置，
上述第二导电部件与上述第二接合面电接合。
13.根据权利要求12所述的半导体装置，其特征在于，
在上述厚度方向上，上述第二接合面相对于上述主面位于偏靠上述半导体元件的位置。
14.根据权利要求1至13任一项中所述的半导体装置，其特征在于，
还具备封固树脂，该封固树脂覆盖上述半导体元件、上述第一导电部件及上述第二导电部件、以及上述芯片焊盘的一部分，
上述芯片焊盘具有在上述厚度方向上朝向与上述主面相反的一侧的背面，
上述背面从上述封固树脂露出。
15.一种半导体装置的制造方法，其特征在于，
具备以下工序：
在具有朝向厚度方向的主面的芯片焊盘中，将具有导电性的接合材料配置在上述主面上的工序；
在半导体元件中，以第一电极与上述接合材料对置的方式将上述半导体元件配置在上述接合材料上的工序，其中，上述半导体元件具有在上述厚度方向上相互朝向相反的一侧的上述第一电极及第二电极、以及在上述厚度方向上设置在与上述第二电极相同的一侧而且与上述第二电极分离地配置的第三电极；
通过使上述接合材料熔融以及固化，从而使上述第一电极与上述主面电接合的工序；
使第一导电部件与上述第二电极电接合的工序；以及
使第二导电部件与上述第三电极电接合的工序，
沿上述厚度方向观察时，上述第三电极的面积比上述第二电极的面积小，
上述第二导电部件的杨氏模量比上述第一导电部件的杨氏模量小。
CN202180061496.1A 2020-07-16 2021-07-05 半导体装置以及半导体装置的制造方法 Pending CN116195055A (zh)

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