CN115706164A - 横向扩散金属氧化物半导体元件 - Google Patents

横向扩散金属氧化物半导体元件 Download PDF

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CN115706164A
CN115706164A CN202110935538.1A CN202110935538A CN115706164A CN 115706164 A CN115706164 A CN 115706164A CN 202110935538 A CN202110935538 A CN 202110935538A CN 115706164 A CN115706164 A CN 115706164A
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gate structure
source region
region
ldmos device
guard ring
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周玲君
张宇宏
李坤宪
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United Microelectronics Corp
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United Microelectronics Corp
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Priority to CN202110935538.1A priority Critical patent/CN115706164A/zh
Priority to US17/472,680 priority patent/US11881527B2/en
Priority to TW111129890A priority patent/TW202324739A/zh
Publication of CN115706164A publication Critical patent/CN115706164A/zh
Priority to US18/528,816 priority patent/US20240105839A1/en
Priority to US18/528,806 priority patent/US20240120419A1/en
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Abstract

本发明公开一种横向扩散金属氧化物半导体元件,其主要包含第一栅极结构以及第二栅极结构沿着第一方向延伸于基底上,第一源极区域沿着该第一方向延伸于该第一栅极结构一侧,第二源极区域沿着该第一方向延伸于该第二栅极结构一侧,漏极区域沿着该第一方向延伸于该第一栅极结构以及该第二栅极结构之间,保护环围绕该第一栅极结构以及该第二栅极结构以及浅沟隔离围绕该保护环。

Description

横向扩散金属氧化物半导体元件
技术领域
本发明涉及一种横向扩散金属氧化物半导体元件,尤其是涉及一种具有保护环围绕栅极结构的横向扩散金属氧化物半导体元件。
背景技术
横向扩散金属氧化物半导体元件(lateral double-diffused MOS,LDMOS)因具有较高的操作频宽与操作效率,以及易与其他集成电路整合的平面结构,现已广泛地应用于高电压操作环境中,如中央处理器电源供应(CPU power supply)、电源管理系统(powermanagement system)、直流/交流转换器(AC/DC converter)以及高功率或高频段的功率放大器等等。
然而现行的横向扩散金属氧化物半导体元件在单元设计上通常具有过大的面积使整个元件在开启击穿电压(on-state breakdown voltage)以及匹配性(compatibility)上不尽理想。因此如何改良现有横向扩散金属氧化物半导体元件的单元设计即为现今一重要课题。
发明内容
本发明一实施例揭露一种横向扩散金属氧化物半导体元件,其主要包含第一栅极结构以及第二栅极结构沿着第一方向延伸于基底上,第一源极区域沿着该第一方向延伸于该第一栅极结构一侧,第二源极区域沿着该第一方向延伸于该第二栅极结构一侧,漏极区域沿着该第一方向延伸于该第一栅极结构以及该第二栅极结构之间,保护环围绕该第一栅极结构以及该第二栅极结构以及浅沟隔离围绕该保护环。
本发明另一实施例揭露一种横向扩散金属氧化物半导体元件,其包含第一栅极结构以及第二栅极结构沿着第一方向延伸于基底上,第一源极区域沿着该第一方向延伸于第一栅极结构一侧,第二源极区域沿着该第一方向延伸于第二栅极结构一侧,漏极区域沿着该第一方向延伸于第一栅极结构与第二栅极结构之间,第一保护区域连接该第一源极区域以及该第二源极区域于该第一栅极结构以及该第二栅极结构一侧以极第二保护区域连接该第一源极区域以及该第二源极区域于该第一栅极结构以及该第二栅极结构另一侧。
本发明又一实施例揭露一种横向扩散金属氧化物半导体元件,其包含第一栅极结构以及第二栅极结构沿着第一方向延伸于基底上,第一源极区域沿着该第一方向延伸于第一栅极结构一侧,第二源极区域沿着该第一方向延伸于第二栅极结构一侧,漏极区域沿着该第一方向延伸于第一栅极结构与第二栅极结构之间,保护环围绕第一栅极结构与第二栅极结构,多个保护区域连接该第一源极区域、该第二源极区域以及该保护环以及浅沟隔离围绕该保护环。
附图说明
图1为本发明一实施例的横向扩散金属氧化物半导体元件的上视图;
图2为图1中沿着切线AA’的剖面示意图;
图3为本发明一实施例的横向扩散金属氧化物半导体元件的上视图;
图4为本发明一实施例的横向扩散金属氧化物半导体元件的上视图;
图5为本发明一实施例的横向扩散金属氧化物半导体元件的上视图。
主要元件符号说明
12:基底
14:P阱
16:N阱
18:浅沟隔离
20:栅极结构
22:栅极结构
24:源极区域
26:源极区域
28:漏极区域
30:保护环
32:接触插塞
34:保护区域
36:保护区域
38:保护区域
42:横向扩散金属氧化物半导体元件
44:横向扩散金属氧化物半导体元件
46:横向扩散金属氧化物半导体元件
48:保护区域
具体实施方式
请参照图1至图2,图1至图2为本发明一实施例制作一横向扩散金属氧化物半导体元件的方法示意图,其中图1为横向扩散金属氧化物半导体元件的上视图而图2则为图1中沿着切线AA’的剖面示意图。如图1所示,首先提供一基底12,然后于基底内形成第一阱区(例如P阱14)与第二阱区(例如N阱16),再形成一浅沟隔离(shallow trench isolation,STI)18于基底12内。在本实施例中,基底12较佳由半导体材料所构成,例如可包括硅基底、外延硅基底、硅锗基底、碳化硅基底或硅覆绝缘(silicon-on-insulator,SOI)基底,浅沟隔离18则较佳由氧化硅所构成,但均不以此为限。
接着形成一栅极结构20于左侧的基底12与浅沟隔离18上以及一栅极结构22于右侧的基底12与浅沟隔离18上,其中栅极结构20较佳设于中间的N阱16与左侧的P阱14上而栅极结构22则设于中间的N阱16与右侧的P阱14上。在本实施例中,上述栅极结构20、22的制作方式可依据制作工艺需求以先栅极(gate first)制作工艺、后栅极(gate last)制作工艺的先高介电常数介电层(high-k first)制作工艺以及后栅极制作工艺的后高介电常数介电层(high-k last)制作工艺等方式制作完成。以本实施例的先栅极制作工艺为例,可先依序形成一栅极介电层或介质层、一栅极材料层(图未示)以及一选择性硬掩模(图未示)于基底12上,并利用一图案化光致抗蚀剂(图未示)当作掩模进行一图案转移制作工艺,以单次蚀刻或逐次蚀刻步骤,去除部分栅极材料层与部分栅极介电层,然后剥除图案化光致抗蚀剂,以于基底12上形成由图案化的栅极介电层与图案化的栅极材料层所构成的栅极结构20、22。
然后在各栅极结构20、22侧壁形成至少一间隙壁(图未示),并于栅极结构20、22两侧的基底12内形成由例如N+区域所构成的源极区域24与26、由N+区域所构成的漏极区域28以及由P+区域所构成的保护环30,其中源极区域24设于栅极结构20左侧,源极区域26设于栅极结构22右侧,漏极区域28设于栅极结构20与栅极结构22之间,而保护环30在剖视图部分则设于栅极结构20左侧与栅极结构22右侧并同时接触紧邻的源极区域24与源极区域26。随后可选择性进行一硅化金属制作工艺以形成一硅化金属层(图未示)于源极区域24、26、漏极区域28以及保护环30表面。
在本实施例中,间隙壁可为单一间隙壁或复合式间隙壁,例如可细部包含一偏位间隙壁与一主间隙壁。其中偏位间隙壁与主间隙壁可包含相同或不同材料,且两者均可选自由氧化硅、氮化硅、氮氧化硅以及氮碳化硅所构成的群组。源极区域24、26、漏极区域28以及保护环30可依据所置备晶体管的导电型式而包含不同掺质,例如可包含P型掺质或N型掺质。
之后可选择性形成一层间介电层(图未示)于栅极结构20、22上并进行一图案转移制作工艺,例如可利用一图案化掩模去除栅极结构20、22旁的部分的层间介电层以形成多个接触洞(图未示)并暴露出栅极结构20、22、源极区域24、26、漏极区域28以及保护环30顶部。然后于各接触洞中填入所需的导电材料,例如包含钛(Ti)、氮化钛(TiN)、钽(Ta)、氮化钽(TaN)等的阻障层材料以及选自钨(W)、铜(Cu)、铝(Al)、钛铝合金(TiAl)、钴钨磷化物(cobalt tungsten phosphide,CoWP)等低电阻材料或其组合的低阻抗金属层。之后进行一平坦化制作工艺,例如以化学机械研磨去除部分导电材料以形成接触插塞32接触并电连接栅极结构20、22、源极区域24、26以及漏极区域28。至此即完成本发明一实施例的半导体元件的制作。
值得注意的是,本实施例所形成的接触插塞32虽仅设置于栅极结构20、22、源极区域24、26以及漏极区域28上但不设置保护环30上,但不局限于此,依据本发明其他实施例又可于形成接触插塞32时同时设置接触插塞于保护环30上,此变化型也属本发明所涵盖的范围。又需注意的是,本实施例虽以先栅极制作工艺制备的多晶硅栅极结构为例,但不局限于此,依据本发明其他实施例又可依据制作工艺或产品需求以金属栅极置换(replacementmetal gate,RMG)制作工艺将多晶硅栅极转换为金属栅极,其中各金属栅极可包含例如介质层、高介电常数介电层、功函数金属层以及低阻抗金属层等元件。
若各栅极结构由金属栅极所构成,其中的高介电常数介电层可包含介电常数大于4的介电材料,例如选自氧化铪(hafnium oxide,HfO2)、硅酸铪氧化合物(hafnium siliconoxide,HfSiO4)、硅酸铪氮氧化合物(hafnium silicon oxynitride,HfSiON)、氧化铝(aluminum oxide,Al2O3)、氧化镧(lanthanum oxide,La2O3)、氧化钽(tantalum oxide,Ta2O5)、氧化钇(yttrium oxide,Y2O3)、氧化锆(zirconium oxide,ZrO2)、钛酸锶(strontiumtitanate oxide,SrTiO3)、硅酸锆氧化合物(zirconium silicon oxide,ZrSiO4)、锆酸铪(hafnium zirconium oxide,HfZrO4)、锶铋钽氧化物(strontium bismuth tantalate,SrBi2Ta2O9,SBT)、锆钛酸铅(lead zirconate titanate,PbZrxTi1-xO3,PZT)、钛酸钡锶(barium strontium titanate,BaxSr1-xTiO3,BST)、或其组合所组成的群组。
功函数金属层较佳用以调整形成金属栅极的功函数,使其适用于N型晶体管(NMOS)或P型晶体管(PMOS)。若晶体管为N型晶体管,功函数金属层可选用功函数为3.9电子伏特(eV)~4.3eV的金属材料,如铝化钛(TiAl)、铝化锆(ZrAl)、铝化钨(WAl)、铝化钽(TaAl)、铝化铪(HfAl)或TiAlC(碳化钛铝)等,但不以此为限;若晶体管为P型晶体管,功函数金属层可选用功函数为4.8eV~5.2eV的金属材料,如氮化钛(TiN)、氮化钽(TaN)或碳化钽(TaC)等,但不以此为限。功函数金属层与低阻抗金属层之间可包含另一阻障层(图未示),其中阻障层的材料可包含钛(Ti)、氮化钛(TiN)、钽(Ta)、氮化钽(TaN)等材料。低阻抗金属层则可选自铜(Cu)、铝(Al)、钨(W)、钛铝合金(TiAl)、钴钨磷化物(cobalt tungstenphosphide,CoWP)等低电阻材料或其组合。由于金属栅极的制作为本领域所熟知技术,在此不另加赘述。
请再参照图1,从图1的上视图来看,栅极结构20与栅极结构22较佳沿着第一方向例如Y方向延伸于基底12上,源极区域24沿着Y方向延伸于栅极结构20一侧如左侧,源极区域26沿着Y方向延伸于栅极结构22一侧如右侧,漏极区域28沿着Y方向延伸于栅极结构20与栅极结构22之间,保护环30围绕栅极结构20以及栅极结构22,而浅沟隔离18则围绕整个保护环30。在本实施例中,保护环30较佳设置于源极区域24、26外围并围绕源极区域24、26、漏极区域28以及栅极结构20、22,其中保护环30较佳直接接触栅极结构20、22两侧的源极区域24、26但不接触漏极区域28。需注意的是,为了更简洁表示各元件的位置,图1中的栅极结构20、22侧壁是直接接触并切齐漏极区域28侧壁,但不局限于此,栅极结构20、22侧壁又可如图2的剖面结构般不切齐漏极区域28侧壁,这些变化型均属本发明所涵盖的范围。
请继续参照图3,图3为本发明一实施例的横向扩散金属氧化物半导体元件的上视图。如图3所示,横向扩散金属氧化物半导体元件主要包含栅极结构20与栅极结构22沿着第一方向例如Y方向延伸于基底12上,源极区域24沿着Y方向延伸于栅极结构20一侧如左侧,源极区域26沿着Y方向延伸于栅极结构22一侧如右侧,漏极区域28沿着Y方向延伸于栅极结构20与栅极结构22之间,保护区域34连接源极区域24与源极区域26于栅极结构20及栅极结构22一侧以及保护区域36连接源极区域24与源极区域26于栅极结构20及栅极结构22另一侧。如同前述实施例,图中的栅极结构20、22侧壁虽直接接触并切齐漏极区域28侧壁,但不局限于此,栅极结构20、22侧壁又可如图2的剖面结构般不切齐漏极区域28侧壁,这些变化型均属本发明所涵盖的范围。
在本实施例中,设置于栅极结构20、22一侧或下方的保护区域34较佳于上视角度下呈现约略U形连接源极区域24与源极区域26,而设置于栅极结构20、22另一侧或上方的保护区域36则于上视角度下呈现约略倒U形连接源极区域24与源极区域26,其中各保护区域34、36均直接接触源极区域24与源极区域26,且各保护区域34、36边缘切齐源极区域24与源极区域26边缘。如同前述实施例,源极区域24、源极区域26以及漏极区域28较佳各包含N+区域而保护区域34与保护区域36则各包含P+区域。
请继续参照图4,图4为本发明一实施例的横向扩散金属氧化物半导体元件的上视图。如图4所示,横向扩散金属氧化物半导体元件主要包含栅极结构20与栅极结构22沿着第一方向例如Y方向延伸于基底12上,源极区域24沿着Y方向延伸于栅极结构20一侧如左侧,源极区域26沿着Y方向延伸于栅极结构22一侧如右侧,漏极区域28沿着Y方向延伸于栅极结构20与栅极结构22之间,保护环30围绕栅极结构20与栅极结构22,多个保护区域38连接源极区域24、26与保护环30以及浅沟隔离18围绕保护环30。如同前述实施例,图中的栅极结构20、22侧壁虽直接接触并切齐漏极区域28侧壁,但不局限于此,栅极结构20、22侧壁又可如图2的剖面结构般不切齐漏极区域28侧壁,这些变化型均属本发明所涵盖的范围。
如同图1的实施例,本实施例中的保护环30较佳设置于源极区域24、26外围并围绕源极区域24、26、漏极区域28以及栅极结构20、22,且保护环30较佳直接接触栅极结构20、22两侧的源极区域24、26但不接触漏极区域28。多个保护区域38则较佳设置于保护环30的四个角落并分别接触保护环30及源极区域24与源极区域26。换句话说,本实施例约略为图1与图3中保护环与保护区域结合后所构成的变化型。需注意的是,虽然保护环30与保护区域38之间利用虚线分隔开,但由于两者均于同一道制作工艺中制备完成因此保护环30与保护区域38实际上为一体结构。如同前述实施例,源极区域24、源极区域26以及漏极区域28各包含N+区域而保护环30与保护区域38等则各包含P+区域。
请继续参照图5,图5为本发明一实施例的横向扩散金属氧化物半导体元件的上视图。如图5所示,横向扩散金属氧化物半导体元件主要包含三组横向扩散金属氧化物半导体元件42、44、46或三组横向扩散金属氧化物半导体单元设于基底12上,其中三组横向扩散金属氧化物半导体元件42、44、46是紧邻设置且每组横向扩散金属氧化物半导体元件42、44、46较佳包含前述实施例中横向扩散金属氧化物半导体元件的各种元件。
举例来说,各横向扩散金属氧化物半导体元件42、44、46包含栅极结构20与栅极结构22沿着第一方向例如Y方向延伸于基底12上,源极区域24沿着Y方向延伸于栅极结构20一侧如左侧,源极区域26沿着Y方向延伸于栅极结构22一侧如右侧,以及漏极区域28沿着Y方向延伸于栅极结构20与栅极结构22之间。需注意的是,设于两相邻横向扩散金属氧化物半导体元件42、44、46之间的源极区域较佳作为两侧横向扩散金属氧化物半导体元件42、44、46的共用源极区域,例如横向扩散金属氧化物半导体元件42、44之间的源极区域24或26以及横向扩散金属氧化物半导体元件44、46之间的源极区域24或26各为一共用源极区域。
此外,本实施例的横向扩散金属氧化物半导体元件又包含一保护环30同时环绕三组横向扩散金属氧化物半导体元件42、44、46、多个保护区域48连接源极区域24、26与保护环30以及浅沟隔18离围绕保护环30,其中保护环30较佳直接接触整个扩散金属氧化物半导体元件42、46两侧的源极区域24、26但不接触漏极区域28。
更具体而言,保护环30较佳接触横向扩散金属氧化物半导体元件42左侧的源极区域24与横向扩散金属氧化物半导体元件46右侧的源极区域26但不接触漏极区域28,而保护区域48则又细部包含八个保护区域,其中四个保护区域48较佳设置于保护环30的四个角落并分别接触保护环30及源极区域24与源极区域26,剩余的四个保护区域48则分别连接保护环30以及中间扩散金属氧化物半导体元件44两侧的源极区域24与源极区域26。如同前述实施例,虽然保护环30与保护区域48之间利用虚线分隔开,但由于两者均于同一道制作工艺中制备完成因此保护环30与保护区域48实际上为一体结构。
综上所述,本发明主要于前述图1、图3以及图4中揭露至少三种横向扩散金属氧化物半导体元件的布局图案,其主要于栅极结构、源极区域以及漏极区域外围设置保护环以及/或保护区域等结构来降低每个横向扩散金属氧化物半导体元件特别是P型单元的整体面积。依据本发明的较佳实施例,将前述保护环以及/或保护区域配置于源极区域外围并紧邻或接触源极区域除了可降低现有横向扩散金属氧化物半导体元件的单元面积外又可提供更佳的开启击穿电压(on-state breakdown voltage)以及匹配性(compatibility)。
以上所述仅为本发明的优选实施例,凡依本发明权利要求所做的均等变化与修饰,都应属本发明的涵盖范围。

Claims (20)

1.一种横向扩散金属氧化物半导体元件,其特征在于,包含:
第一栅极结构以及第二栅极结构,沿着第一方向延伸于基底上;
第一源极区域,沿着该第一方向延伸于该第一栅极结构一侧;
第二源极区域,沿着该第一方向延伸于该第二栅极结构一侧;
漏极区域,沿着该第一方向延伸于该第一栅极结构以及该第二栅极结构之间;
保护环,围绕该第一栅极结构以及该第二栅极结构;以及
浅沟隔离,围绕该保护环。
2.如权利要求1所述的横向扩散金属氧化物半导体元件,其中该第一源极区域包含N+区域。
3.如权利要求1所述的横向扩散金属氧化物半导体元件,其中该第二源极区域包含N+区域。
4.如权利要求1所述的横向扩散金属氧化物半导体元件,其中该漏极区域包含N+区域。
5.如权利要求1所述的横向扩散金属氧化物半导体元件,其中该保护环包含P+区域。
6.如权利要求1所述的横向扩散金属氧化物半导体元件,其中该保护环接触该第一源极区域。
7.一种横向扩散金属氧化物半导体元件,其特征在于,包含:
第一栅极结构以及第二栅极结构,沿着第一方向延伸于基底上;
第一源极区域,沿着该第一方向延伸于该第一栅极结构一侧;
第二源极区域,沿着该第一方向延伸于该第二栅极结构一侧;
漏极区域,沿着该第一方向延伸于该第一栅极结构与该第二栅极结构之间;
第一保护区域,连接该第一源极区域以及该第二源极区域于该第一栅极结构以及该第二栅极结构一侧;以及
第二保护区域,连接该第一源极区域以及该第二源极区域于该第一栅极结构以及该第二栅极结构另一侧。
8.如权利要求7所述的横向扩散金属氧化物半导体元件,其中该第一源极区域包含N+区域。
9.如权利要求7所述的横向扩散金属氧化物半导体元件,其中该第二源极区域包含N+区域。
10.如权利要求7所述的横向扩散金属氧化物半导体元件,其中该漏极区域包含N+区域。
11.如权利要求7所述的横向扩散金属氧化物半导体元件,其中该第一保护区域包含P+区域。
12.如权利要求7所述的横向扩散金属氧化物半导体元件,其中该第一保护区域包含U形。
13.如权利要求7所述的横向扩散金属氧化物半导体元件,其中该第二保护区域包含倒U形。
14.一种横向扩散金属氧化物半导体元件,其特征在于,包含:
第一栅极结构以及第二栅极结构,沿着第一方向延伸于基底上;
第一源极区域,沿着该第一方向延伸于该第一栅极结构一侧;
第二源极区域,沿着该第一方向延伸于该第二栅极结构一侧;
漏极区域,沿着该第一方向延伸于该第一栅极结构与该第二栅极结构之间;
保护环,围绕该第一栅极结构与该第二栅极结构;
多个保护区域连接该第一源极区域、该第二源极区域以及该保护环;以及
浅沟隔离,围绕该保护环。
15.如权利要求14所述的横向扩散金属氧化物半导体元件,其中该第一源极区域包含N+区域。
16.如权利要求14所述的横向扩散金属氧化物半导体元件,其中该第二源极区域包含N+区域。
17.如权利要求14所述的横向扩散金属氧化物半导体元件,其中该漏极区域包含N+区域。
18.如权利要求14所述的横向扩散金属氧化物半导体元件,其中该保护环包含P+区域。
19.如权利要求14所述的横向扩散金属氧化物半导体元件,其中该多个保护区域接触该第一源极区域。
20.如权利要求14所述的横向扩散金属氧化物半导体元件,其中该多个保护区域设于该保护环角落。
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