CN115566052A - Power semiconductor device, inverter module and electronic equipment - Google Patents
Power semiconductor device, inverter module and electronic equipment Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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Abstract
The application relates to and provides a power semiconductor device, an inverter module and electronic equipment, which are used for solving the technical problems of high preparation cost and large on-resistance of the power semiconductor device in the prior art. The device structure includes: a substrate; a lower electrode disposed on the substrate; a semiconductor single crystal seed layer disposed on the lower electrode layer; the semiconductor epitaxial layer is arranged on the semiconductor single crystal seed layer; the power device main body functional layer is arranged on the semiconductor epitaxial layer; and an electrode lead-out portion connected to the lower electrode to lead out the lower electrode.
Description
Technical Field
The invention relates to the field of power semiconductor devices, in particular to a power semiconductor device, an inverter module and electronic equipment.
Background
The power semiconductor device is a core device of various power electronic equipment, and has increasingly wide application in important strategic fields of new energy, rail transit, electric automobiles and the like. Since the power semiconductor device plays a decisive role in the performance efficiency and cost of power electronic equipment, it is highly regarded and vigorously researched and developed by various circles, making it an important technical field for the rapid growth of the semiconductor industry.
In the development process of power devices, silicon-based devices have been the mainstream technology, but due to the limitation of the physical properties of silicon materials, the development requirements in the application fields of devices with higher withstand voltage, higher current density, higher junction temperature, higher switching frequency, higher switching speed, lower loss and the like are difficult to satisfy. In order to obtain devices with more excellent performance, materials such as third generation compound semiconductors SiC, gaN, etc. are receiving more and more attention. Taking the SiC material as an example, compared with Si, siC has excellent material properties such as high forbidden bandwidth, high saturated electron drift velocity, high thermal conductivity, and has unique advantages in high-voltage, high-speed, low-power consumption, and high-power devices. The third generation compound semiconductor material is the main development direction of the power semiconductor industry, is used for manufacturing power devices, and can obviously improve the utilization rate of electric energy, reduce the loss and improve the economy.
The vertical power device is more widely applied to high-power occasions due to the higher power accommodation degree. Longitudinal power devices rely on high quality epitaxial layers, so heterogeneous substrates, either homogeneous or with a small lattice mismatch, must be selected, and single crystal conductive silicon carbide SiC is widely used as the epitaxial substrate. The high price of the single crystal substrate causes the preparation cost of the device to be high, and the development of the device is limited. On the other hand, in the device manufacturing process, the single crystal substrate needs to be kept at a certain thickness to form a support, so that the on-resistance brought by the single crystal substrate cannot be ignored.
Disclosure of Invention
The application aims to provide a power semiconductor device, an inverter module and electronic equipment, and aims to solve the technical problems that the power semiconductor device in the prior art is large in on-resistance and high in preparation cost.
In a first aspect, the present application provides a power semiconductor device comprising:
a substrate;
a lower electrode disposed on the substrate;
a semiconductor single crystal seed layer disposed on the lower electrode;
the semiconductor epitaxial layer is arranged on the semiconductor single crystal seed layer;
the power device main body functional layer is arranged on the semiconductor epitaxial layer;
and an electrode lead-out portion connected to the lower electrode to lead out the lower electrode.
In the application, the semiconductor single crystal seed layer is used for replacing a single crystal substrate in the prior art to carry out epitaxy, so that the selection requirement on the substrate can be reduced, and the preparation cost of the power semiconductor device can be greatly reduced.
Meanwhile, in the present application, the lower electrode is disposed on the substrate, and the electrical conduction is extracted through the electrode extraction portion, and the thickness of the semiconductor single crystal film serving as the seed layer is small, so that the resistance caused by conduction in the device can be ignored.
In one possible embodiment, the lower electrode is led out by means of at least one through-hole, which is arranged through the substrate.
In one possible design, the electrode lead-out portion includes:
at least one through hole penetrating through the semiconductor single crystal seed layer, the semiconductor epitaxial layer and the power device main body function layer;
and the insulating layer is arranged on the side wall of the through hole.
In one possible design, the semiconductor single crystal seed layer and the semiconductor epitaxial layer can cover a first portion of the lower electrode, wherein electricity is led out by means of an electrode lead-out portion on a second portion of the lower electrode which is not covered by the semiconductor single crystal seed layer and the semiconductor epitaxial layer.
In the application, the electrical extraction can be realized by forming a through hole on the substrate, or forming a through hole on the semiconductor single crystal seed layer and the semiconductor epitaxial layer, or by extracting from the end of the uncovered lower electrode, the extraction mode is flexible, and a person skilled in the art can select the extraction mode according to actual needs.
In one possible design, the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are homogeneous materials or the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are heterogeneous materials.
In the present application, the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are preferably the same material, for example, the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are both silicon carbide SiC, but in the specific implementation process, the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer may also be different materials, for example, the material of the semiconductor single crystal seed layer is silicon carbide SiC, the material of the semiconductor epitaxial layer is gallium nitride GaN, and the selection manner is flexible.
In one possible design, the substrate and the lower electrode material are refractory at temperatures greater than 1400 ℃.
In the present application, the substrate and the lower electrode are refractory at a temperature of more than 1400 ℃, that is, the substrate and the lower electrode have thermal stability at a temperature at which the semiconductor epitaxial layer is formed, or the substrate and the lower electrode are not deteriorated during the formation of the semiconductor epitaxial layer.
In one possible design, the material of the substrate is any one of sapphire, single crystal silicon carbide (SiC), polycrystalline SiC, siC ceramic, and aluminum nitride (AlN) ceramic.
In one possible design, the material of the lower electrode is polysilicon, metal silicide or metal.
In one possible design, the power semiconductor device is an SBD schottky diode, a MOSFET metal-oxide-semiconductor field effect diode.
In a second aspect, the present application further provides an inverter module, including: an oscillator, a control circuit, a switching device, a transformer, and a power semiconductor device as described in the first aspect and any one of the possible designs of the first aspect.
In a third aspect, the present application further provides an electronic device, including: the inverter module according to the second aspect.
Drawings
Fig. 1 is a schematic structural diagram of a power semiconductor device provided in the prior art;
fig. 2 is a schematic structural diagram of a power semiconductor device according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram of a first structure of an electrode lead-out portion in a power semiconductor device according to an embodiment of the present disclosure;
fig. 4 is a second structural diagram of an electrode lead-out portion in a power semiconductor device according to an embodiment of the present disclosure;
fig. 5 is a schematic diagram of a third structure of an electrode lead-out portion of a power semiconductor device according to an embodiment of the present disclosure.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The power devices may be divided into lateral power devices and vertical power devices according to electrical flow. Generally, a transverse power device is mainly applied to a power integrated circuit, and because the power capacity processed by the transverse power device is limited, a discrete longitudinal power device is needed to process electric energy in a high-power application occasion. Common discrete vertical power devices include power diodes, power Bipolar transistors, vertical power Metal-Oxide Semiconductor Field Effect transistors (MOSFETs), insulated Gate Bipolar Transistors (IGBTs), and the like. The basic manufacturing process of the longitudinal power device comprises the following steps: selecting a high-quality heavily-doped single crystal substrate wafer 11, performing epitaxy 12 on the substrate, forming a device functional region 13 above the epitaxial layer by means of photoetching, grinding, etching, ion implantation, metallization and other process means, finally thinning the single crystal substrate to reduce the on-resistance of the device, and preparing a bottom electrode 14 to form a final longitudinally-conducted silicon carbide SiC power device structure, wherein a specific structural diagram is shown in FIG. 1.
On one hand, due to the limitation of epitaxial technology, the high-quality epitaxial layers all depend on the single crystal substrates with the most matched crystal lattices at present, for example, siC devices depend on the high-quality SiC single crystal substrates for homoepitaxy, and the application and development of the SiC technology are severely restricted by the expensive single crystal substrates.
On the other hand, in most cases, after the SiC device is formed into the upper surface structure, the substrate is thinned to reduce the on-resistance brought by the substrate in the power device, but the substrate cannot be thinned without limitation, and the device still needs to be kept at a certain thickness to form a support, so the on-resistance brought by the substrate cannot be ignored.
To solve the above technical problems and to make the objects, technical solutions and advantages of the present application more apparent, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.
The power semiconductor device can be applied to power electronic equipment which can be a charger, a charging pile, a photovoltaic generator, a power battery pack, an electric drive automobile and the like.
Referring to fig. 2, the present application provides a power semiconductor device, including:
a substrate 21;
a lower electrode 22 disposed on the substrate 21;
a semiconductor single crystal seed layer 23 provided on the lower electrode 22;
a semiconductor epitaxial layer 24 provided on the semiconductor single crystal seed layer 23;
a power device main body function layer 25 disposed on the semiconductor epitaxial layer 24;
and an electrode lead-out portion 26 connected to the lower electrode 22 to lead out electricity.
In the application, the lower electrode is arranged on the substrate, and then the semiconductor single crystal seed layer, the semiconductor epitaxial layer and the power device main body function layer are arranged on the lower electrode, so that the limitation requirement on the substrate is less for preparing the power semiconductor device, the selection range is wider, a single crystal substrate wafer in the prior art can be better avoided, and the preparation cost of the power semiconductor device can be reduced.
Meanwhile, in the application, the lower electrode is arranged on the substrate, the electricity is led out through the electrode leading-out part, the thickness of the semiconductor single crystal thin film layer serving as the seed layer is hundreds of nanometers to tens of micrometers, and compared with the thickness of the substrate in the prior art, the thickness of the semiconductor single crystal thin film layer is thinner, so that the resistance caused by conduction in the device can be ignored.
In the present application, the substrate, lower electrode material is "refractory" at a temperature greater than 1400 ℃, wherein "refractory" means that the substrate, lower electrode has thermal stability at the temperature at which the semiconductor epitaxial layer is formed, i.e., the substrate, lower electrode does not degrade during the formation of the semiconductor epitaxial layer.
Wherein the substrate and the lower electrode material also have a relatively low resistivity, e.g. 10 -3 Cm, and higher thermal conductivity, e.g., 100w.m -1 .K -1 . The materials of the substrate, the lower electrode, and the semiconductor single crystal seed layer will be described in detail below, respectively.
Substrate:
as a specific example, the material of the substrate may be any one of sapphire, single crystal SiC, polycrystalline SiC, siC ceramic, alN aluminum nitride ceramic.
A lower electrode:
as a specific example, the material of the lower electrode may be polysilicon, metal silicide such as nickel silicon, tungsten silicon, or metal such as tungsten, molybdenum, nickel, and alloys thereof. It should be noted that the lower electrode has a bonding effect in addition to a conductive effect, so that the semiconductor single crystal seed layer can be well bonded to the substrate.
A semiconductor single crystal seed layer:
the semiconductor single crystal seed layer can be obtained by an ion implantation stripping technology, wherein the ion implantation stripping is to implant high-energy hydrogen ions or helium ions into a single crystal block, so that a defect layer is formed at a certain depth below the surface of the block, then the defect layer is bonded with a substrate material, the block to be transferred is split along a bubble layer in an annealing mode, and finally a film material with a certain thickness is obtained on the substrate. The energy of the ion implantation determines the thickness of the semiconductor single crystal seed layer. Of course, the single crystal seed layer may be obtained in other ways in the present application, for example, the semiconductor single crystal seed layer may be obtained by bonding thinning.
In the present application, the semiconductor single crystal seed layer may be selected to have a lattice parameter suitable for epitaxial growth of the semiconductor epitaxial layer, by way of example, the difference between the lattice parameter of the material of the semiconductor single crystal seed layer and the lattice parameter of the semiconductor epitaxial layer is less than 5%. In particular, the epitaxy of gallium nitride GaN may be performed on a single crystal seed layer of silicon carbide SiC.
Wherein the material of the semiconductor single crystal seed layer and its doping level are selected to prevent the formation of a conductive barrier between the substrate and the semiconductor epitaxial layer of the final power semiconductor device structure. As an example, the material of the semiconductor single crystal seed layer may be a third generation compound semiconductor material such as SiC, gaN, diamond, or the like.
Further, the power semiconductor device in the present application further includes a semiconductor epitaxial layer, and the material of the semiconductor epitaxial layer is the material of the semiconductor single crystal seed layer, which may be a homogeneous material or a heterogeneous material. By way of example, in a particular implementation, the material of the semiconductor single crystal seed layer is the same as the material of the semiconductor epitaxial layers, also called homoepitaxy, such as epitaxial SiC on a seed layer of SiC. As another example, during implementation, the material of the semiconductor single crystal seed layer is different from the material of the semiconductor epitaxial layer, such as GaN epitaxial on a seed layer of SiC.
Further, in the present application, the power semiconductor device further includes an electrode lead-out portion for leading out the lower electrode, wherein the lead-out manner of the electrode lead-out portion includes, but is not limited to, the following three manners, which are respectively described below:
first one
The electrodes are led out by means of at least one through hole, and the through hole penetrates through the substrate.
Referring to fig. 3, a through via is formed on the substrate to lead out the lower electrode. In fig. 3, 2 through holes are taken as an example, and in a specific implementation process, 1 or more than 2 through holes may be formed according to actual needs.
With continued reference to fig. 3, a silicon carbide heat conducting ceramic may be selected as a substrate 31, WSi2 tungsten silicide is deposited on the surface of the substrate to serve as an electrode layer 32, then an N-type heavily doped single crystal 4H-SiC film is transferred by a related technique of film transfer to obtain a semiconductor single crystal seed layer 33, then a homoepitaxial SiC thick film is performed by an epitaxial technique to obtain a semiconductor epitaxial layer 34, and preparation of a source, a drain and related device structures thereof is performed on the surface of the semiconductor epitaxial layer 34 to obtain a power device main body functional layer 35, and finally a through hole is formed under the substrate 31 by a related technique such as etching to serve as an electrode lead-out portion 36, from which an electrode is led out to form a longitudinally conducting SiC MOSFET power device.
Second kind
The semiconductor single crystal seed layer and the semiconductor epitaxial layer can cover a first part of the lower electrode, wherein a second part of the lower electrode except the first part is the electrode leading-out part.
Referring to fig. 4, in the present application, the semiconductor single crystal seed layer has a width equal to that of the semiconductor epitaxial layer, and covers a portion of the lower electrode, so that a second portion of the lower electrode except for the first portion can be used as an electrode lead-out portion, that is, a portion of the lower electrode is controlled to be in a bare-drain state and is not completely covered by the semiconductor single crystal seed layer and the semiconductor epitaxial layer.
Continuing to refer to fig. 4, selecting sapphire as a substrate 41, depositing NiSi nickel silicide on the surface of the substrate to serve as an electrode layer 42, then transferring an N-type heavily doped single crystal 4H-SiC film by a related film transfer technique to obtain a semiconductor single crystal seed layer 43, then performing homoepitaxy on the SiC thick film by an epitaxy technique to obtain a semiconductor epitaxial layer 44, preparing an electrode on the upper surface, namely a power device main body functional layer 45, exposing the electrode layer by a mask, a release process and other process means in the device preparation process, and exposing the exposed part to an electrode lead-out part 46 to form a longitudinal novel SiC schottky diode power device.
Third kind
The electrode lead-out portion includes:
at least one through hole, wherein each through hole penetrates through the semiconductor single crystal seed layer, the semiconductor epitaxial layer and the power device main body function layer;
and the insulating layer is arranged on the side wall of the through hole.
Referring to fig. 5, in the present application, at least one through hole may be formed in the semiconductor single crystal seed layer, the semiconductor epitaxial layer and the power device main body functional layer to lead out the lower electrode. In a specific implementation process, in order to avoid an electrical reaction between the through hole and the power device main body functional layer, the electrode lead-out portion further includes an insulating layer disposed on a sidewall of the through hole to control an insulating state between at least one through hole and the power device main body functional layer.
With continued reference to FIG. 5, a silicon carbide thermally conductive ceramic was selected as the substrate 51 and WSi was deposited on the substrate surface 2 The tungsten silicide is used as an electrode layer 52, then an N-type heavily doped single crystal 4H-SiC film is transferred through the related technology of film transfer to obtain a semiconductor single crystal seed layer 53, then homoepitaxy is carried out through the epitaxy technology to obtain a SiC thick film, namely a semiconductor epitaxial layer 54, the preparation of a source electrode, a drain electrode and related device structures is carried out on the surface of the semiconductor epitaxial layer 54, namely a power device main body functional layer 55, through-holes are formed on the upper surfaces of the semiconductor epitaxial layer and the semiconductor single crystal seed layer through the related technology of etching and the like, siO is deposited on the side wall of each through-hole 2 Which acts as an isolation layer, namely, insulating layer 56, to form electrode lead-outs 57 to form a longitudinally conducting SiC MOSFET power device.
After the above components are introduced, the functional layers of the main body of the power device will be described. In the application, different power device structures can be formed on the semiconductor epitaxial layer according to adjustment of doping, photoetching, metallization and other processes. Such as a MOSFET, a Junction Field Effect Transistor (J-FET), a schottky or PIN diode (positive-intrinsic diode), or a thyristor.
In a second aspect, the present application further provides an inverter module, including: an oscillator, a control circuit, a switching device and a transformer, and the power semiconductor device of the first aspect.
In a third aspect, the present application further provides an electronic device, including: the inverter module is provided.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Accordingly, the scope of the present application is to be accorded the full breadth of the claims appended hereto.
Claims (10)
1. A power semiconductor device, comprising:
a substrate;
a lower electrode disposed on the substrate;
a semiconductor single crystal seed layer disposed on the lower electrode;
the semiconductor epitaxial layer is arranged on the semiconductor single crystal seed layer;
the power device main body functional layer is arranged on the semiconductor epitaxial layer;
and an electrode lead-out portion connected to the lower electrode to lead out the lower electrode.
2. The power semiconductor device of claim 1, wherein said lower electrode is led out by means of at least one via hole, which is provided through said substrate.
3. The power semiconductor device according to claim 1, wherein the electrode lead-out portion includes:
at least one through hole, wherein the through hole penetrates through the semiconductor single crystal seed layer, the semiconductor epitaxial layer and the power device main body function layer;
and the insulating layer is arranged on the side wall of the through hole.
4. The power semiconductor device of claim 1, wherein the semiconductor single crystal seed layer and the semiconductor epitaxial layer are capable of covering a first portion of the lower electrode, wherein electricity is drawn by means of an electrode draw on a second portion of the lower electrode not covered by the semiconductor single crystal seed layer and the semiconductor epitaxial layer.
5. The power semiconductor device of claim 1, wherein the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are a homogeneous material or the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are a heterogeneous material.
6. The power semiconductor device of claim 1, wherein the material of said substrate and said lower electrode is refractory at a temperature greater than 1400 ℃.
7. The power semiconductor device according to claim 6, wherein the material of the substrate is any one of sapphire, single crystal silicon carbide (SiC), polycrystalline SiC, siC ceramic, or aluminum nitride (AlN) ceramic.
8. The power semiconductor device according to claim 1, wherein the material of the lower electrode is polysilicon, metal silicide, or metal.
9. An inverter module, comprising: oscillator, control circuit, switching device, transformer and power semiconductor device according to any of claims 1-8.
10. An electronic device, comprising: the inverter module of claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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