CN115566052A - Power semiconductor device, inverter module and electronic equipment - Google Patents

Abstract

The application relates to and provides a power semiconductor device, an inverter module and electronic equipment, which are used for solving the technical problems of high preparation cost and large on-resistance of the power semiconductor device in the prior art. The device structure includes: a substrate; a lower electrode disposed on the substrate; a semiconductor single crystal seed layer disposed on the lower electrode layer; the semiconductor epitaxial layer is arranged on the semiconductor single crystal seed layer; the power device main body functional layer is arranged on the semiconductor epitaxial layer; and an electrode lead-out portion connected to the lower electrode to lead out the lower electrode.

Description

A power semiconductor device, inverter module and electronic equipment

technical field

The invention relates to the field of power semiconductor devices, in particular to a power semiconductor device, an inverter module and electronic equipment.

Background technique

Power semiconductor devices are the core devices of various power electronic devices, and have more and more applications in important strategic fields such as new energy, rail transit and electric vehicles. Because power semiconductor devices play a decisive role in the performance, efficiency and cost of power electronic equipment, they have received great attention from all walks of life around the world and invested heavily in research and development, making them an important technical field for the rapid growth of the semiconductor industry.

In the development of power devices, silicon-based devices have always been the mainstream technology, but due to the limitations of the physical properties of silicon materials, they have higher withstand voltage, higher current density, higher junction temperature, higher switching frequency, and higher The development requirements of device applications such as high switching speed and lower loss are not satisfactory. In order to obtain devices with more excellent performance, materials such as third-generation compound semiconductors SiC and GaN have received more and more attention. Taking SiC material as an example, compared with Si, SiC has excellent material properties such as high band gap, high saturation electron drift velocity, high thermal conductivity, etc. unique advantage. The third-generation compound semiconductor materials are the main development direction of the power semiconductor industry. They are used to make power devices, which can significantly improve the utilization rate of electric energy, reduce losses and improve economy.

Vertical power devices are more widely used in high-power applications due to their higher power capacity. Vertical power devices rely on high-quality epitaxial layers, so heterogeneous substrates with homogeneous or small lattice mismatch must be selected. Single-crystal conductive silicon carbide SiC is widely used as an epitaxial substrate. The high price of single crystal substrate leads to high device manufacturing cost, which limits its development. On the other hand, since the single crystal substrate needs to retain a certain thickness to form a support during the device fabrication process, the on-resistance brought by the single crystal substrate cannot be ignored.

Contents of the invention

The purpose of the present application is to provide a power semiconductor device, an inverter module and electronic equipment, so as to solve the technical problems of high on-resistance and high manufacturing cost of the power semiconductor device in the prior art.

In a first aspect, the present application provides a power semiconductor device, including:

Substrate;

a lower electrode disposed on the substrate;

a semiconductor single crystal seed layer disposed on the lower electrode;

a semiconductor epitaxial layer disposed on the semiconductor single crystal seed layer;

The main functional layer of the power device is disposed on the semiconductor epitaxial layer;

The electrode lead-out part is connected with the lower electrode to lead out the lower electrode.

In this application, the single crystal substrate in the prior art is replaced by a semiconductor single crystal seed layer for epitaxy, thereby reducing the requirement for substrate selection and greatly reducing the manufacturing cost of power semiconductor devices.

At the same time, in this application, the lower electrode is arranged on the substrate, and the electricity is extracted through the electrode extraction part. The thickness of the semiconductor single crystal film used as the seed layer is relatively thin, so that the resistance caused by the conduction in the device can be ignored.

In a possible design, the lower electrode is led out through at least one through hole, and the through hole is provided through the substrate.

In a possible design, the electrode lead-out part includes:

At least one through hole, the through hole runs through the semiconductor single crystal seed layer, the semiconductor epitaxial layer and the main functional layer of the power device;

The insulation layer is arranged on the sidewall of the through hole.

In a possible design, the semiconductor single crystal seed layer and the semiconductor epitaxial layer can cover the first part of the lower electrode, wherein the electrical dependence is not covered by the semiconductor single crystal seed layer and the semiconductor epitaxial layer The electrode lead-out portion on the second portion of the covered lower electrode leads out.

In this application, the extraction of electricity can rely on opening a through hole on the substrate, or opening a through hole on the semiconductor single crystal seed layer and semiconductor epitaxial layer, or it can rely on the end of the uncovered lower electrode. The method is relatively flexible, and those skilled in the art can choose according to actual needs.

In a possible design, the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are homogeneous materials or the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are heterogeneous materials .

In the present application, the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are optimally the same material, for example, the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are silicon carbide SiC, of course in the specific implementation In the process, the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer can also be different materials, such as the material of the semiconductor single crystal seed layer is silicon carbide SiC, and the material of the semiconductor epitaxial layer is gallium nitride GaN, the selection method is flexible .

In one possible design, the substrate and the bottom electrode material are refractory at temperatures greater than 1400°C.

In this application, the substrate and the lower electrode are low-refractory at a temperature greater than 1400°C, which means that the substrate and the lower electrode have thermal stability at the temperature at which the semiconductor epitaxial layer is formed, or the substrate and the lower electrode are There is no degradation during the formation of the semiconductor epitaxial layer.

In a possible design, the material of the substrate is any one of sapphire, single crystal silicon carbide SiC, polycrystalline SiC, SiC ceramics and aluminum nitride AlN ceramics.

In a possible design, the material of the lower electrode is polysilicon, metal silicide or metal.

In a possible design, the power semiconductor device is an SBD Schottky diode, a MOSFET metal-oxide-semiconductor field effect diode.

In the second aspect, the present application also provides an inverter module, including: an oscillator, a control circuit, a switching device, a transformer, and a power semiconductor as described in the first aspect and any possible design of the first aspect device.

In a third aspect, the present application further provides an electronic device, including: the inverter module as described in the second aspect.

Description of drawings

Fig. 1 is a schematic structural diagram of a power semiconductor device provided by the prior art;

FIG. 2 is a schematic structural diagram of a power semiconductor device provided by an embodiment of the present application;

FIG. 3 is a first structural schematic diagram of an electrode lead-out part in a power semiconductor device provided in an embodiment of the present application;

Fig. 4 is a second structural schematic diagram of an electrode lead-out part in a power semiconductor device provided by an embodiment of the present application;

FIG. 5 is a schematic diagram of a third structure of an electrode lead-out part of a power semiconductor device provided by an embodiment of the present application.

detailed description

In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Apparently, the described embodiments are some of the embodiments of the present application, but not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

Power devices can be divided into horizontal power devices and vertical power devices according to electrical flow. Generally, lateral power devices are mainly used in power integrated circuits. Since the power capacity of lateral power devices is limited, discrete vertical power devices are required to process electrical energy in high-power applications. Common discrete vertical power devices include power diodes, power bipolar transistors, vertical power metal-oxide semiconductor field effect transistors (Metal Oxide Semiconductor Field Effect Transistor, MOSFET), and insulated gate bipolar transistors (Insulated Gate Bipolar, IGBT). The basic manufacturing process of vertical power devices is as follows: select a high-quality heavily doped single crystal substrate wafer 11, and perform epitaxy 12 on the substrate, and then through photolithography, grinding, etching, ion implantation, and metallization. , forming a device functional region 13 above the epitaxial layer, and finally thinning the single crystal substrate to reduce the on-resistance of the device, and preparing the bottom electrode 14 to form a silicon carbide SiC power device structure with final vertical conduction, the specific structure diagram See Figure 1.

On the one hand, due to the limitations of epitaxial technology, the current high-quality epitaxial layer relies on the single crystal substrate with the most matched lattice. For example, SiC devices rely on high-quality SiC single crystal substrate for homogeneous epitaxy, expensive The single crystal substrate seriously restricts the application and development of SiC technology.

On the other hand, in most cases, after the SiC device forms the upper surface structure, the substrate will be thinned to reduce the on-resistance brought by the substrate in the power device, but the substrate cannot be thinned without limit , the device still needs to retain a certain thickness to form a support, so the on-resistance brought by the substrate cannot be ignored.

In order to solve the above-mentioned existing technical problems and make the purpose, technical solution and advantages of the present application more clear, the implementation manner of the present application will be further described in detail below in conjunction with the accompanying drawings.

The power semiconductor device provided in this application can be applied to power electronic equipment, and the power electronic equipment may be a charger, a charging pile, a photovoltaic generator, a power battery pack, an electric drive vehicle, and the like.

Please refer to Figure 2, the present application provides a power semiconductor device, including:

Substrate 21;

The lower electrode 22 is arranged on the substrate 21;

a semiconductor single crystal seed layer 23 disposed on the lower electrode 22;

a semiconductor epitaxial layer 24, disposed on the semiconductor single crystal seed layer 23;

The main functional layer 25 of the power device is disposed on the semiconductor epitaxial layer 24;

The electrode lead-out portion 26 is connected to the lower electrode 22 to lead out electricity.

In this application, since the lower electrode is arranged on the substrate, and then the semiconductor single crystal seed layer, the semiconductor epitaxial layer and the main functional layer of the power device are arranged on the lower electrode, so for the preparation of the power semiconductor device, the substrate With less restrictive requirements and a wider selection range, the single crystal substrate wafers in the prior art can be better avoided, and the manufacturing cost of power semiconductor devices can be reduced.

At the same time, in this application, the lower electrode is arranged on the substrate, and the electricity is drawn out through the electrode lead-out part. The thickness of the semiconductor single crystal thin film layer used as the seed layer is hundreds of nanometers to more than ten microns, compared with the prior art. The thickness of the substrate is relatively thin, so that the resistance caused by the conduction in the device can be ignored.

In this application, the materials of the substrate and the lower electrode are "refractory" at a temperature greater than 1400°C, wherein "refractory" means that the substrate and the lower electrode have thermal conductivity at the temperature at which the semiconductor epitaxial layer is formed. Stability, that is, no degradation of the substrate, lower electrode during the formation of the semiconductor epitaxial layer.

Wherein, the materials of the substrate and the lower electrode also have relatively small resistivity, such as 10 ^-3 ohm.cm, and relatively high thermal conductivity, such as 100W.m ^-1 .K ^-1 . The materials of the substrate, the lower electrode and the semiconductor single crystal seed layer will be introduced in detail below.

Substrate:

As a specific example, the material of the substrate may be any one of sapphire, single crystal SiC, polycrystalline SiC, SiC ceramics, and AlN aluminum nitride ceramics.

Lower electrode:

As a specific example, the material of the bottom electrode may be polysilicon, metal silicide such as silicon nickel and silicon tungsten, or metal such as tungsten, molybdenum, nickel and their alloys. It should be noted here that the lower electrode not only has a conductive function, but also has a bonding function, so that the semiconductor single crystal seed layer can be well bonded to the substrate.

Semiconductor single crystal seed layer:

The semiconductor single crystal seed layer can be obtained by ion implantation stripping technology. Ion implantation stripping is to implant high-energy hydrogen ions or helium ions into a single crystal block to form a defect layer at a certain depth below the surface of the block, and then separate it with the base material. Bonding, and through annealing, the bulk material to be transferred is split along the bubble layer, and finally a thin film material with a certain thickness is obtained on the substrate. The energy of ion implantation determines the thickness of the semiconductor single crystal seed layer. Of course, in this application, the single crystal seed layer can also be obtained by other methods, for example, the semiconductor single crystal seed layer can be obtained by bonding and thinning.

In the present application, the semiconductor single crystal seed layer can be selected to have a lattice parameter suitable for the epitaxial growth of the semiconductor epitaxial layer. As an example, the difference between the lattice parameter of the material of the semiconductor single crystal seed layer and the lattice parameter of the semiconductor epitaxial layer less than 5%. Specifically, epitaxy of gallium nitride GaN may be performed on a single crystal seed layer of silicon carbide SiC.

Wherein, the material of the semiconductor single crystal seed layer and its doping level are selected to prevent the formation of conductive barriers between the substrate and the semiconductor epitaxial layer of the final power semiconductor device structure. As an example, the material of the semiconductor single crystal seed layer may be third-generation compound semiconductor materials such as SiC, GaN, and diamond.

Further, the power semiconductor device in this application also includes a semiconductor epitaxial layer, and the material of the semiconductor epitaxial layer is a semiconductor single crystal seed layer, which may be a homogeneous material or a heterogeneous material. As an example, in a specific implementation process, the material of the semiconductor single crystal seed layer is the same as that of the semiconductor epitaxial layer, which is also called homoepitaxial, such as epitaxial SiC on the SiC seed layer. As another example, in a specific implementation process, the material of the semiconductor single crystal seed layer is different from that of the semiconductor epitaxial layer, such as epitaxial GaN on the SiC seed layer.

Further, in this application, the power semiconductor device also includes an electrode lead-out part for leading out the lower electrode, wherein the lead-out methods of the electrode lead-out part include but are not limited to the following three, which are described below:

The first

The electrodes are led out by means of at least one through hole, which is provided through the substrate.

Referring to FIG. 3 , a through hole is opened on the substrate to lead out the lower electrode. In Fig. 3, two through holes are taken as an example, in the actual implementation process, one or more than two through holes can be opened according to actual needs.

Continuing to refer to Figure 3, silicon carbide thermally conductive ceramics can be selected as the substrate 31, and WSi2 tungsten silicide is deposited on the surface of the substrate as the electrode layer 32, and then N-type heavily doped single crystal 4H-SiC is transferred by the related technology of thin film transfer Thin film to obtain semiconductor single crystal seed layer 33, followed by homoepitaxial SiC thick film by epitaxial technology to obtain semiconductor epitaxial layer 34, and prepare source, drain and related device structures on the surface of semiconductor epitaxial layer 34 , to obtain the main functional layer 35 of the power device, and finally form a through hole under the substrate 31 by etching and other related technologies as the electrode lead-out part 36, from which the electrode is drawn out to form a vertically conductive SiC MOSFET power device.

the second

The semiconductor single crystal seed layer and the semiconductor epitaxial layer can cover the first part of the lower electrode, wherein the second part of the lower electrode except the first part is the electrode lead-out part.

Please refer to Fig. 4, in the present application, the semiconductor single crystal seed layer is consistent with the width of the semiconductor epitaxial layer, covering a part of the lower electrode, then the second part of the lower electrode except the first part can be used as the electrode lead-out part, that is, the control Part of the bottom electrode is in a bare drain state and is not completely covered by the semiconductor single crystal seed layer and the semiconductor epitaxial layer.

Continue to refer to FIG. 4, select sapphire as the substrate 41, and deposit NiSi nickel silicide on the surface of the substrate as the electrode layer 42, and then transfer the N-type heavily doped single crystal 4H-SiC thin film through the related technology of thin film transfer to obtain a semiconductor The single crystal seed layer 43 is followed by epitaxial homoepitaxial SiC thick film to obtain a semiconductor epitaxial layer 44, and an electrode is prepared on the upper surface, that is, the main functional layer 45 of the power device. During the device preparation process, through a mask, The electrode layer is exposed by releasing and other process means, and the exposed part is the electrode lead-out part 46, so as to form a vertical new SiC Schottky diode power device.

third

The electrode lead-out part includes:

At least one through hole, each of the at least one through hole penetrates through the semiconductor single crystal seed layer, the semiconductor epitaxial layer, and the main functional layer of the power device;

The insulation layer is arranged on the sidewall of the through hole.

Please refer to FIG. 5 , in this application, at least one through hole may be opened on the semiconductor single crystal seed layer, the semiconductor epitaxial layer and the main functional layer of the power device to lead out the lower electrode. In the specific implementation process, in order to avoid electrical reaction between the through hole and the main functional layer of the power device, the electrode lead-out part also includes an insulating layer, which is arranged on the side wall of the through hole to control the function of at least one through hole and the main body of the power device. The layers are insulated.

Continuing to refer to Figure 5, silicon carbide thermally conductive ceramics are selected as the substrate 51, and _WSi2 tungsten silicide is deposited on the surface of the substrate as the electrode layer 52, and then N-type heavily doped single crystal 4H-SiC is transferred by the related technology of film transfer thin film to obtain a semiconductor single crystal seed layer 53, followed by homoepitaxial epitaxy to obtain a SiC thick film, that is, the semiconductor epitaxial layer 54, and the source, drain and related device structures are formed on the surface of the semiconductor epitaxial layer 54 Preparation, that is, the main functional layer 55 of the power device, forms a through hole on the upper surface of the semiconductor epitaxial layer and the semiconductor single crystal seed layer by etching and other related technologies, and deposits SiO _on the side wall of the through hole as an isolation layer, that is, The insulating layer 56 is used to form an electrode lead-out portion 57 to form a vertically conducted SiC MOSFET power device.

After introducing the above components, the main functional layer of the power device will be introduced next. In this application, different power device structures can be formed on the semiconductor epitaxial layer according to the adjustment of doping, photolithography, metallization and other processes. For example, MOSFET, Junction Field Effect Transistor (J-FET), Schottky or PIN diode (positive-intrinsicnegative diode), thyristor power device structure.

In a second aspect, the present application also provides an inverter module, including: an oscillator, a control circuit, a switching device, a transformer, and the power semiconductor device described in the first aspect.

In a third aspect, the present application further provides an electronic device, including: the inverter module described above.

The above is only a specific implementation of the application, but the scope of protection of the application is not limited thereto. Anyone familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the application. Should be covered within the protection scope of this application. Therefore, the protection scope of the present application should be determined by the protection scope of the claims.

Claims (10)

1. A power semiconductor device, characterized in that, comprising: Substrate; a lower electrode disposed on the substrate; a semiconductor single crystal seed layer disposed on the lower electrode; a semiconductor epitaxial layer disposed on the semiconductor single crystal seed layer; The main functional layer of the power device is disposed on the semiconductor epitaxial layer; The electrode lead-out part is connected with the lower electrode to lead out the lower electrode. 2 . The power semiconductor device according to claim 1 , wherein the lower electrode is led out by means of at least one through hole, and the through hole is provided through the substrate. 3 . 3. The power semiconductor device according to claim 1, wherein the electrode lead-out part comprises: At least one through hole, the through hole penetrates through the semiconductor single crystal seed layer, the semiconductor epitaxial layer and the main functional layer of the power device; The insulation layer is arranged on the sidewall of the through hole. 4. The power semiconductor device according to claim 1, wherein the semiconductor single crystal seed layer and the semiconductor epitaxial layer can cover the first part of the lower electrode, wherein the electrical dependence is not covered by the semiconductor single crystal The seed crystal layer is led out from the electrode lead-out part on the second part of the lower electrode covered by the semiconductor epitaxial layer. 5. The power semiconductor device according to claim 1, characterized in that, the material of the semiconductor single crystal seed layer and the material of the semiconductor epitaxial layer are homogeneous materials or the material of the semiconductor single crystal seed layer is the same as the semiconductor epitaxial layer The material of the semiconductor epitaxial layer is a heterogeneous material. 6. The power semiconductor device according to claim 1, wherein the materials of the substrate and the lower electrode are refractory at a temperature greater than 1400°C. 7 . The power semiconductor device according to claim 6 , wherein the material of the substrate is any one of sapphire, single crystal silicon carbide SiC, polycrystalline SiC, SiC ceramic or aluminum nitride AlN ceramic. 8. The power semiconductor device according to claim 1, wherein the material of the bottom electrode is polysilicon, metal silicide or metal. 9. An inverter module, characterized by comprising: an oscillator, a control circuit, a switching device, a transformer, and the power semiconductor device according to any one of claims 1-8. 10. An electronic device, comprising: the inverter module according to claim 9.

Images