CN115498071B - Battery preparation method, battery and electronic product - Google Patents

Battery preparation method, battery and electronic product Download PDF

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Publication number
CN115498071B
CN115498071B CN202211144583.6A CN202211144583A CN115498071B CN 115498071 B CN115498071 B CN 115498071B CN 202211144583 A CN202211144583 A CN 202211144583A CN 115498071 B CN115498071 B CN 115498071B
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layer
battery
transparent conductive
doped
conductive layer
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CN115498071A (en
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赵晖
蓝仕虎
孟凡英
刘正新
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Tongwei Solar Chengdu Co Ltd
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Priority to PCT/CN2023/091110 priority patent/WO2024060621A1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022466—Electrodes made of transparent conductive layers, e.g. TCO, ITO layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/208—Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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Abstract

The invention discloses a preparation method of a battery, the battery and an electronic product, wherein the preparation method of the battery comprises the steps of sequentially forming a first passivation layer, a first doping layer, a first transparent conducting layer and a first electrode on one side surface of a substrate, sequentially forming a second passivation layer, a second doping layer, a second transparent conducting layer and a second electrode on the other side surface of the substrate, and carrying out ozone surface treatment on the first doping layer and the second doping layer, wherein the surface of the doping layer after treatment can be effectively compounded with the transparent conducting layer, so that the leakage risk of a battery piece due to the fact that the doping layer winds a plating belt can be inhibited. Further, after the ozone surface treatment is carried out on the doped layer, the short-circuit current performance of the battery is improved through the cooperation of the ozone surface treatment and the increase of the area of the transparent conductive layer, and other performances of the battery are not reduced, so that the battery with high battery efficiency, which has high short-circuit current, filling factor and low battery failure proportion, is obtained.

Description

Battery preparation method, battery and electronic product
Technical Field
The invention relates to the field of batteries, in particular to a preparation method of a battery, the battery and an electronic product.
Background
In order to pursue higher photoelectric conversion efficiency, the updating iteration of the solar cell is also very rapid, and the silicon heterojunction solar cell (Silicon Heterojunction solar cell) is called heterojunction solar cell for short, has the advantages of symmetrical structure, low-temperature preparation process, high open-circuit voltage, good temperature characteristic, thinning silicon wafer and the like, and belongs to one of the new generation of crystalline silicon solar cell products.
The conventional method is to increase the cell efficiency of the heterojunction solar cell by increasing the conversion efficiency of the cell or by increasing the power generated by the module. The method for improving the battery piece transfer efficiency is a method for improving the battery piece short-circuit current. However, the conventional method may also sacrifice other electrical performance parameters (such as failure rate of the battery cell) while improving the short-circuit current of the battery cell.
Disclosure of Invention
Based on this, it is necessary to provide a method for manufacturing a battery, and an electronic product, which are capable of improving the short-circuit current of the battery and thus improving the battery efficiency without reducing other electrical performance parameters of the battery.
The invention provides a preparation method of a battery, which comprises the following steps:
S10: providing a substrate, wherein the substrate is provided with a first surface and a second surface opposite to the first surface;
S20: preparing a first passivation layer on the first surface and preparing a second passivation layer on the second surface;
S30: preparing a first doping layer on the first passivation layer, and preparing a second doping layer on the second passivation layer;
s40: performing ozone surface treatment on at least one of the first doped layer and the second doped layer;
s50: preparing a first transparent conductive layer on the first doped layer, and preparing a second transparent conductive layer on the second doped layer;
S60: and preparing a first electrode on the first transparent conductive layer, and preparing a second electrode on the second transparent conductive layer.
In one embodiment, the step of ozone treatment in the step S40 includes: and placing at least one of the first doping layer and the second doping layer for 1-5 min under the environment that the ozone concentration is 5 ppb-15 ppb.
In one embodiment, in the ozone treatment in the step S40, the ozone is generated by at least one of high-voltage discharge, ultraviolet irradiation and electrolysis.
In one embodiment, in the step S20, the preparation methods of the first passivation layer and the second passivation layer are each independently selected from a method of plasma enhanced chemical vapor deposition, hot filament chemical vapor deposition or low pressure chemical vapor deposition.
In one embodiment, in the step S30, the preparation methods of the first doped layer and the second doped layer are each independently selected from a method of plasma enhanced chemical vapor deposition, hot filament chemical vapor deposition or low pressure chemical vapor deposition.
In one embodiment, in the step S50, the first transparent conductive layer and the second transparent conductive layer are prepared in a gas atmosphere having an oxygen content of 5% to 8%.
The invention also provides a battery which is manufactured according to the manufacturing method of the battery.
In one embodiment, the edge of at least one of the first transparent conductive layer and the second transparent conductive layer is 0.2mm to 0.5mm from the edge of the second doped layer.
In one embodiment, the substrate, the first doped layer and the second doped layer each have a conductivity type independently selected from N-type or P-type, the first doped layer and the second doped layer having a conductivity type different from each other.
Further, the invention also provides an electronic product, and the power supply device of the electronic product comprises the battery.
In the preparation process of the battery, at least one of the first doping layer and the second doping layer is subjected to ozone surface treatment, the surface of the doping layer after treatment can be effectively compounded with the transparent conductive layer, and the leakage risk of the battery piece caused by the winding plating of the doping layer can be restrained.
Further, after the ozone surface treatment is carried out on the doped layer, the area of the transparent conducting layer is increased to improve the short-circuit current performance of the battery, and other performances of the battery are not reduced, so that the battery with high battery conversion efficiency, which has higher short-circuit current, filling factor and lower battery failure proportion, is obtained.
Drawings
FIG. 1 is a schematic view of a battery structure according to the present invention;
Description of the drawings: 10: battery, 110: substrate, 120a: first passivation layer, 120b: second passivation layer, 130a: first doped layer, 130b: second doped layer, 140a: first transparent conductive layer, 140b: second transparent conductive layer, 150a: first electrode, 150b: and a second electrode.
Detailed Description
The present invention may be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete. They are, of course, merely examples and are not intended to limit the invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise. In the description of the present invention, the meaning of "several" means at least one, such as one, two, etc., unless specifically defined otherwise.
The words "preferably," "more preferably," and the like in the present invention refer to embodiments of the invention that may provide certain benefits in some instances. However, other embodiments may be preferred under the same or other circumstances. Furthermore, the recitation of one or more preferred embodiments does not imply that other embodiments are not useful, nor is it intended to exclude other embodiments from the scope of the invention.
When a range of values is disclosed herein, the range is considered to be continuous and includes both the minimum and maximum values for the range, as well as each value between such minimum and maximum values. Further, when a range refers to an integer, each integer between the minimum and maximum values of the range is included. Further, when multiple range description features or characteristics are provided, the ranges may be combined. In other words, unless otherwise indicated, all ranges disclosed herein are to be understood to include any and all subranges subsumed therein.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
The invention provides a preparation method of a battery 10 shown in fig. 1, which comprises the following steps S10-S60.
Step S10: a substrate 110 is provided, the substrate 110 having a first surface and a second surface opposite the first surface.
In a specific example, the substrate 110 is preferably a monocrystalline silicon substrate 110, and the substrate 110 is further cleaned and double-sided chemical polished before providing the substrate 110, so as to remove oil stains on the surface of the substrate 110, cut damaged layers and form pyramid light trapping structures with clean surfaces, wherein the thickness of the substrate 110 is 50 μm to 300 μm, and the thickness of the substrate 110 is preferably 100 μm to 200 μm.
Step S20: a first passivation layer 120a is prepared on the first surface and a second passivation layer 120b is prepared on the second surface.
In a specific example, in step S20, the preparation methods of the first passivation layer 120a and the second passivation layer 120b are each independently selected from the methods of plasma enhanced chemical vapor deposition, hot filament chemical vapor deposition, or low pressure chemical vapor deposition.
Further, the temperature of the substrate 110 in the preparation of the first passivation layer 120a and the second passivation layer 120b is 150 ℃ to 250 ℃, and the pressure in the process chamber is 10Pa to 400Pa.
Further, the thicknesses of the first passivation layer 120a and the second passivation layer 120b are 5nm to 10nm, and the material of the first passivation layer 120a and the material of the second passivation layer 120b are each independently selected from at least one of intrinsic amorphous silicon (a-Si: H (i)), intrinsic amorphous silicon oxide (a-SiOx: H (i)), and intrinsic amorphous silicon carbon (a-SiCx: H (i)).
Step S30: a first doped layer 130a is prepared on the first passivation layer 120a, and a second doped layer 130b is prepared on the second passivation layer 120 b.
In a specific example, in step S30, the preparation methods of the first doped layer 130a and the second doped layer 130b are each independently selected from the methods of plasma enhanced chemical vapor deposition, hot filament chemical vapor deposition or low pressure chemical vapor deposition.
Further, the host materials of the first doped layer 130a and the second doped layer 130b are each independently at least one of intrinsic amorphous silicon (a-Si: H (i)), intrinsic amorphous silicon oxide (a-SiOx: H (i)), and intrinsic amorphous silicon carbon (μc-SiOx: H (i)), and the thicknesses of the first doped layer 130a and the second doped layer 130b are 5nm to 15nm.
In a specific example, the conductivity type of the substrate 110, the first doped layer 130a, and the second doped layer 130b are each independently selected from N-type or P-type, the conductivity types of the first doped layer 130a and the second doped layer 130b are different, preferably one of the first doped layer 130a and the second doped layer 130b is the same as the conductivity type of the substrate 110, and the other is different from the conductivity type of the substrate 110.
As can be appreciated, the N-type conductivity is doped with at least one doping element selected from the group consisting of phosphorus, arsenic and antimony to the host material of the first doping layer 130a and the second doping layer 130 b; the P-type conductivity is doped with at least one doping element selected from the group consisting of boron, gallium and indium into the host material of the first and second doped layers 130a and 130 b.
Step S40: at least one of the first doped layer 130a and the second doped layer 130b is subjected to ozone surface treatment.
In a specific example, the step of ozone treatment in step S40 includes: at least one of the first doped layer 130a and the second doped layer 130b is treated in an environment having an ozone concentration of 5ppb to 15ppb for 1min to 5min.
It is understood that the doped layer to be subjected to the ozone treatment may be directly subjected to the ozone treatment after being prepared, for example, the doped layer to be subjected to the ozone treatment may be subjected to the ozone treatment after being prepared, or the ozone treatment may be performed after all the doped layers are prepared.
Further, in the ozone surface treatment, ozone is generated by at least one of high-voltage discharge, ultraviolet irradiation, and electrolysis.
Preferably, the ozone surface treatment is performed on a doped layer of the same conductivity type as the substrate 110.
Step S50: a first transparent conductive layer 140a is prepared on the first doped layer 130a, and a second transparent conductive layer 140b is prepared on the second doped layer 130 b.
Further, the preparation method of the first transparent conductive layer 140a and the second transparent conductive layer 140b is at least one selected from the group consisting of physical vapor deposition, chemical vapor deposition, and sol-gel method. It is understood that physical vapor deposition may be, but is not limited to, vacuum evaporation, sputtering, pulsed laser, or ion plating.
In a specific example, the first transparent conductive layer 140a and the second transparent conductive layer 140b are prepared by physical vapor deposition in a gas environment with an oxygen content of 5% -8%, where the gas environment may include argon or a mixed gas of argon and hydrogen in addition to oxygen, and if the gas environment includes argon and hydrogen in addition to oxygen, the content of hydrogen is less than 2%.
The materials of the first transparent conductive layer 140a and the second transparent conductive layer 140b are each independently selected from at least one of Indium Tin Oxide (ITO), indium tungsten oxide (IWO), indium Cesium Oxide (ICO), and zinc aluminum oxide (AZO).
Step S60: a first electrode 150a is prepared on the first transparent conductive layer 140a, and a second electrode 150b is prepared on the second transparent conductive layer 140 b.
In a specific example, the method of preparing the first electrode 150a and the second electrode 150b is selected from at least one of screen printing, evaporation, magnetron sputtering, inkjet printing, and electroplating.
The materials of the first electrode 150a and the second electrode 150b are each independently selected from silver or copper, and it is understood that they may be, but are not limited to, silver paste, silver-coated copper, or copper.
Further, the first and second electrodes 150a and 150b include a main gate line and a thin gate line, the height of the main gate line is 5 μm to 50 μm, and the width of the main gate line is 60 μm to 150 μm; the height of the fine grid line is 5-50 μm, and the width of the fine grid line is 30-100 μm.
In the above battery manufacturing process, at least one of the first doped layer 130a and the second doped layer 130b is subjected to ozone surface treatment, and the surface of the treated doped layer can be effectively compounded with the transparent conductive layer, so that the risk of electric leakage of the battery piece due to the winding plating of the doped layer can be suppressed.
The invention also provides a battery 10, which is manufactured according to the manufacturing method of the battery 10.
In a specific example, an edge of at least one of the first transparent conductive layer 140a and the second transparent conductive layer 140b is 0.2mm to 0.5mm from an edge of the second doped layer 130b, and it is understood that the above distance is a dashed frame portion in fig. 1.
Further, after the ozone surface treatment is carried out on the doped layer, the area of the transparent conductive layer is increased, so that the short-circuit current performance of the battery is improved, other performances of the battery are not reduced, and the battery with high battery efficiency, which has high short-circuit current, filling factor and low battery failure proportion, is obtained.
It can be appreciated that the heterojunction solar cell IV tested leakage current (IRev 2) is greater than 0.2A or the parallel resistance (Rsh) is less than 50Ω, which is determined to be a failed sheet. On the production line, the above-mentioned failure sheet is also defined as a rejected product or a defective product, because after being made into a photovoltaic module, such a battery sheet has serious leakage risk under illumination, which causes breakdown of the module, and causes rejection of the whole module, thereby causing serious battery parameter defects and appearance defects.
Further, the invention also provides an electronic product, and the power supply device of the electronic product comprises the battery.
Specific examples are provided below to illustrate the method of making the battery of the present invention and the battery in further detail. The raw materials according to the following embodiments may be commercially available unless otherwise specified.
Example 1
The embodiment provides a battery, and the preparation method comprises the following steps:
Taking 150 mu m N-thick monocrystalline silicon as a substrate, and cleaning and texturing the substrate to form a pyramid-shaped light trapping structure;
depositing 10 nm-thick intrinsic amorphous silicon on the front surface of the N-type monocrystalline silicon by utilizing plasma enhanced chemical vapor deposition as a first passivation layer, and then continuously depositing 10 nm-thick N-type doped amorphous silicon on the first passivation layer as a first doping layer;
Carrying out ozone treatment on the surface of the battery after the plating of the N-type first doped layer is finished by adopting a high-voltage discharge type ozone generator, wherein the surface ozone concentration is 10ppb, and the ozone treatment time is 5min;
depositing 10 nm-thick intrinsic amorphous silicon on the back surface of the N-type monocrystalline silicon substrate as a second passivation layer, and then continuously depositing 12 nm-thick P-type doped amorphous silicon on the second passivation layer as a second doping layer;
Depositing a tin-doped 10wt.% indium oxide-based second transparent conductive layer with a thickness of 80nm on the P-type second doped layer by using a carrier plate with a mask of 0.4mm by using a physical vapor deposition technology, wherein the percentage of oxygen in the gas atmosphere is 6% during deposition; then, depositing a tin-doped 3wt.% indium oxide-based first transparent conductive layer with a thickness of 80nm on the N-type first doped layer by using a physical vapor deposition technology;
Printing a silver grid line on the first transparent conductive layer by using a screen printing method as a first electrode, wherein the height of the fine grid is 20 mu m, the width of the fine grid is 55 mu m, the height of the main grid is 22 mu m, and the width of the main grid is 110 mu m; silver grid lines are printed on the second transparent conductive layer by a screen printing method to serve as a second electrode, the height of the fine grid is 20 microns, the width of the fine grid is 75 microns, the height of the main grid is 22 microns, and the width of the main grid is 115 microns.
Example 2
In comparison with example 1, this example did not ozone treat the N-type first doped layer but ozone treat the P-type second doped layer, and the parameters were the same as those of example 1, and the rest of the steps were the same as those of example 1.
Comparative example 1
The comparative example provides a battery, the preparation method comprising the steps of:
Taking 150 mu m N-thick monocrystalline silicon as a substrate, and cleaning and texturing the substrate to form a pyramid-shaped light trapping structure;
depositing 10 nm-thick intrinsic amorphous silicon on the front surface of the N-type monocrystalline silicon by utilizing plasma enhanced chemical vapor deposition as a first passivation layer, and then continuously depositing 10 nm-thick N-type doped amorphous silicon on the first passivation layer as a first doping layer;
depositing 10 nm-thick intrinsic amorphous silicon on the back surface of the N-type monocrystalline silicon substrate as a second passivation layer, and then continuously depositing 12 nm-thick P-type doped amorphous silicon on the second passivation layer as a second doping layer;
Depositing a tin-doped 10wt.% indium oxide-based second transparent conductive layer with a thickness of 80nm on the P-type second doped layer by using a carrier plate with a mask of 0.9mm by using a physical vapor deposition technology, wherein the percentage of oxygen in the gas atmosphere is 6% during deposition; then, depositing a tin-doped 3wt.% indium oxide-based first transparent conductive layer with a thickness of 80nm on the N-type first doped layer by using a physical vapor deposition technology;
Printing a silver grid line on the first transparent conductive layer by using a screen printing method as a first electrode, wherein the height of the fine grid is 20 mu m, the width of the fine grid is 55 mu m, the height of the main grid is 22 mu m, and the width of the main grid is 110 mu m; silver grid lines are printed on the second transparent conductive layer by a screen printing method to serve as a second electrode, the height of the fine grid is 20 microns, the width of the fine grid is 75 microns, the height of the main grid is 22 microns, and the width of the main grid is 115 microns.
Comparative example 2
The comparative example provides a battery, the preparation method comprising the steps of:
Taking 150 mu m N-thick monocrystalline silicon as a substrate, and cleaning and texturing the substrate to form a pyramid-shaped light trapping structure;
depositing 10 nm-thick intrinsic amorphous silicon on the front surface of the N-type monocrystalline silicon by utilizing plasma enhanced chemical vapor deposition as a first passivation layer, and then continuously depositing 10 nm-thick N-type doped amorphous silicon on the first passivation layer as a first doping layer;
depositing 10 nm-thick intrinsic amorphous silicon on the back surface of the N-type monocrystalline silicon substrate as a second passivation layer, and then continuously depositing 12 nm-thick P-type doped amorphous silicon on the second passivation layer as a second doping layer;
depositing a tin-doped 10wt.% indium oxide-based second transparent conductive layer with a thickness of 80nm on the P-type second doped layer by using a carrier plate with a mask of 0.9mm by using a physical vapor deposition technology, wherein the percentage of oxygen in the gas atmosphere is 7% during deposition; then, depositing a tin-doped 3wt.% indium oxide-based first transparent conductive layer with a thickness of 80nm on the N-type first doped layer by using a physical vapor deposition technology;
Printing a silver grid line on the first transparent conductive layer by using a screen printing method as a first electrode, wherein the height of the fine grid is 20 mu m, the width of the fine grid is 55 mu m, the height of the main grid is 22 mu m, and the width of the main grid is 110 mu m; silver grid lines are printed on the second transparent conductive layer by a screen printing method to serve as a second electrode, the height of the fine grid is 20 microns, the width of the fine grid is 75 microns, the height of the main grid is 22 microns, and the width of the main grid is 115 microns.
Comparative example 3
The comparative example provides a battery, the preparation method comprising the steps of:
Taking 150 mu m N-thick monocrystalline silicon as a substrate, and cleaning and texturing the substrate to form a pyramid-shaped light trapping structure;
depositing 10 nm-thick intrinsic amorphous silicon on the front surface of the N-type monocrystalline silicon by utilizing plasma enhanced chemical vapor deposition as a first passivation layer, and then continuously depositing 10 nm-thick N-type doped amorphous silicon on the first passivation layer as a first doping layer;
depositing 10 nm-thick intrinsic amorphous silicon on the back surface of the N-type monocrystalline silicon substrate as a second passivation layer, and then continuously depositing 12 nm-thick P-type doped amorphous silicon on the second passivation layer as a second doping layer;
Depositing a tin-doped 10wt.% indium oxide-based second transparent conductive layer with a thickness of 80nm on the P-type second doped layer by using a carrier plate with a mask of 0.4mm by using a physical vapor deposition technology, wherein the percentage of oxygen in the gas atmosphere is 6% during deposition; then, depositing a tin-doped 3wt.% indium oxide-based first transparent conductive layer with a thickness of 80nm on the N-type first doped layer by using a physical vapor deposition technology;
Printing a silver grid line on the first transparent conductive layer by using a screen printing method as a first electrode, wherein the height of the fine grid is 20 mu m, the width of the fine grid is 55 mu m, the height of the main grid is 22 mu m, and the width of the main grid is 110 mu m; silver grid lines are printed on the second transparent conductive layer by a screen printing method to serve as a second electrode, the height of the fine grid is 20 microns, the width of the fine grid is 75 microns, the height of the main grid is 22 microns, and the width of the main grid is 115 microns.
Comparative example 4
The comparative example provides a battery, the preparation method comprising the steps of:
Taking 150 mu m N-thick monocrystalline silicon as a substrate, and cleaning and texturing the substrate to form a pyramid-shaped light trapping structure;
depositing 10 nm-thick intrinsic amorphous silicon on the front surface of the N-type monocrystalline silicon by utilizing plasma enhanced chemical vapor deposition as a first passivation layer, and then continuously depositing 10 nm-thick N-type doped amorphous silicon on the first passivation layer as a first doping layer;
Carrying out ozone treatment on the surface of the battery after the plating of the N-type first doped layer is finished by adopting a high-voltage discharge type ozone generator, wherein the surface ozone concentration is 10ppb, and the ozone treatment time is 5min;
depositing 10 nm-thick intrinsic amorphous silicon on the back surface of the N-type monocrystalline silicon substrate as a second passivation layer, and then continuously depositing 12 nm-thick P-type doped amorphous silicon on the second passivation layer as a second doping layer;
Depositing a tin-doped 10wt.% indium oxide-based second transparent conductive layer with a thickness of 80nm on the P-type second doped layer by using a carrier plate with a mask of 0.9mm by using a physical vapor deposition technology, wherein the percentage of oxygen in the gas atmosphere is 6% during deposition; then, depositing a tin-doped 3wt.% indium oxide-based first transparent conductive layer with a thickness of 80nm on the N-type first doped layer by using a physical vapor deposition technology;
Printing a silver grid line on the first transparent conductive layer by using a screen printing method as a first electrode, wherein the height of the fine grid is 20 mu m, the width of the fine grid is 55 mu m, the height of the main grid is 22 mu m, and the width of the main grid is 110 mu m; silver grid lines are printed on the second transparent conductive layer by a screen printing method to serve as a second electrode, the height of the fine grid is 20 microns, the width of the fine grid is 75 microns, the height of the main grid is 22 microns, and the width of the main grid is 115 microns.
The battery properties obtained in each of the above examples and comparative examples are shown in the following table:
Comparative example 1 differs from example 1 in that the doped layer was prepared without ozone surface treatment using an ozone generator, and a carrier plate having a 0.9mm mask for the second transparent conductive layer was prepared;
Comparative example 2 is different from example 1 in that, in order to prepare the doped layer without performing ozone surface treatment using an ozone generator, a carrier plate with a 0.9mm mask is used for preparing the second transparent conductive layer, the process parameters of preparing the first transparent conductive layer are adjusted to be 7.1% of O 2 with 6% of O 2 in the atmosphere environment, the final short-circuit current (Isc) is increased, but the Fill Factor (FF) is decreased, and the final battery efficiency (Eta) is not increased, namely, compared with comparative example 1, although the short-circuit current (Isc) can be increased, the decrease of the Fill Factor (FF) is obvious, but the purpose of increasing the battery efficiency is not achieved;
comparative example 3 is different from example 1 in that the doped layer is not subjected to ozone surface treatment by using an ozone generator after being prepared, although the short-circuit current (Isc) of the battery is obviously improved, other parameters are greatly reduced, the failure proportion is greatly increased, and finally the efficiency (Eta) has no gain;
Comparative example 4 differs from example 1 in that the carrier plate using a 0.9mm mask for the second transparent conductive layer was prepared, and the electrical properties, except for the leakage current (IRev 2) and the failure ratio, were small, and it can be seen that the other electrical properties were not much different from comparative example 1, and the efficiency (Eta) was not increased;
In example 1, after the doped layer is prepared, an ozone generator is used to perform ozone surface treatment on the doped layer, and a carrier plate with a mask of 0.4mm is used for preparing the second transparent conductive layer, so that the short-circuit current (Isc) is obviously improved under the condition that the influence of other electrical performance parameters is not greatly ensured, and the efficiency (Eta) is finally improved.
According to the preparation method of the battery, after the doped layer is subjected to ozone surface treatment, the short-circuit current performance of the battery is improved through cooperation with the increase of the area of the transparent conductive layer, and other performances of the battery are not reduced, so that the battery with high battery efficiency, which has high short-circuit current, filling factor and low battery failure proportion, is obtained.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples merely represent a few embodiments of the present invention, which facilitate a specific and detailed understanding of the technical solutions of the present invention, but are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. It should be understood that those skilled in the art, based on the technical solutions provided by the present invention, can obtain technical solutions through logical analysis, reasoning or limited experiments, all fall within the protection scope of the appended claims. The scope of the patent is therefore intended to be covered by the appended claims, and the description and drawings may be interpreted as illustrative of the contents of the claims.

Claims (9)

1. A method of making a battery comprising the steps of:
S10: providing a substrate, wherein the substrate is provided with a first surface and a second surface opposite to the first surface;
S20: preparing a first passivation layer on the first surface and preparing a second passivation layer on the second surface;
S30: preparing a first doping layer on the first passivation layer, and preparing a second doping layer on the second passivation layer;
s40: performing ozone surface treatment on at least one of the first doped layer and the second doped layer;
s50: preparing a first transparent conductive layer on the first doped layer, and preparing a second transparent conductive layer on the second doped layer;
s60: preparing a first electrode on the first transparent conductive layer, and preparing a second electrode on the second transparent conductive layer;
wherein, the edge of at least one layer of the first transparent conductive layer and the second transparent conductive layer is 0.2 mm-0.5 mm away from the edge of the second doping layer.
2. The method of manufacturing a battery according to claim 1, wherein the step of ozone treatment in step S40 includes: and placing 1-5 min of at least one of the first doping layer and the second doping layer in an environment with the ozone concentration of 5 ppb-15 ppb.
3. The method of manufacturing a battery according to claim 1, wherein the ozone is generated by at least one of high-voltage discharge, ultraviolet irradiation and electrolysis in the ozone treatment in the step S40.
4. The method of claim 1, wherein in step S20, the first passivation layer and the second passivation layer are prepared by a method selected from the group consisting of plasma enhanced chemical vapor deposition, hot filament chemical vapor deposition and low pressure chemical vapor deposition.
5. The method of claim 1, wherein in step S30, the first doped layer and the second doped layer are prepared by a method selected from the group consisting of plasma enhanced chemical vapor deposition, hot filament chemical vapor deposition and low pressure chemical vapor deposition.
6. The method according to claim 1, wherein in the step S50, the first transparent conductive layer and the second transparent conductive layer are prepared in a gas atmosphere having an oxygen content of 5% -8%.
7. A battery, characterized by being manufactured according to the manufacturing method of a battery according to any one of claims 1 to 6.
8. The battery of claim 7, wherein the conductivity types of the substrate, the first doped layer, and the second doped layer are each independently selected from N-type or P-type, the first doped layer and the second doped layer being of a different conductivity type.
9. An electronic product, characterized in that the power supply device of the electronic product comprises the battery according to any one of claims 7-8.
CN202211144583.6A 2022-09-20 2022-09-20 Battery preparation method, battery and electronic product Active CN115498071B (en)

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