CN115472602A - 封装结构及其制作方法 - Google Patents
封装结构及其制作方法 Download PDFInfo
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- CN115472602A CN115472602A CN202110655877.4A CN202110655877A CN115472602A CN 115472602 A CN115472602 A CN 115472602A CN 202110655877 A CN202110655877 A CN 202110655877A CN 115472602 A CN115472602 A CN 115472602A
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- layer
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 114
- 229910052751 metal Inorganic materials 0.000 claims abstract description 114
- 230000017525 heat dissipation Effects 0.000 claims abstract description 94
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- 150000001875 compounds Chemical class 0.000 claims description 42
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- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 2
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- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
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- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
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- 239000000956 alloy Substances 0.000 description 2
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Abstract
本发明提供一种具有封装结构及其制作方法,封装结构包括至少两个电性元件、第二重构层和金属引线框架,其中,至少一个电性元件为芯片,至少一个电性元件有第一重构层,且第二重构层引脚间距小于金属引线框架引脚间距;第二重构层具有相对的第一面和第二面,电性元件功能面设置于第二重构层第一面上,并与其电性连接,其中,至少一个电性元件通过设于其功能面的第一重构层与第二重构层电性连接;第二重构层第二面设置于金属引线框架上,并与其电性连接。在具有低成本、可靠性高、易于进行热管理等优点的金属引线框架上形成高密度布线扇出型封装结构,提高了芯片的散热能力,使得封装结构具有高密度布线的同时,也有优良的散热性能和可靠性。
Description
技术领域
本发明涉及封装技术领域,具体地涉及一种封装结构及其制作方法。
背景技术
随着电子产品不断向小型化,多功能化,高度集成方向发展,对芯片封装结构的成本要求、散热要求、可靠性要求等也越来越高。扇出型封装能够形成多层高密度的布线,但其可靠性较差,并且其散热能力较差,随着封装结构进一步高度集成化,其散热问题也更加突出。芯片引线框架类封装(如QFN和 QFP等)具有低成本、易于进行热管理和可靠性性能高的特点,但其难以进行较高密度布线,特别是无法进行多层布线。因此,如何将扇出型封装和引线框架类封装进行结合,成为解决问题的关键。
发明内容
本发明的目的在于提供一种封装结构及其制作方法。
本发明提供一种具有封装结构,包括至少两个电性元件、第二重构层和金属引线框架,其中,至少一个电性元件为芯片,至少一个电性元件有第一重构层、且所述第二重构层引脚间距小于所述金属引线框架引脚间距;
所述第二重构层具有相对的第一面和第二面,所述电性元件功能面设置于所述第二重构层第一面上,并与其电性连接,其中,所述电性元件通过设于其功能面的所述第一重构层与所述第二重构层电性连接;
所述第二重构层第二面设置于所述金属引线框架上,并与其电性连接。
作为本发明的进一步改进,所述第一重构层为第一重布线层或第一中介层,所述第二重构层为第二重布线层。
作为本发明的进一步改进,所述第二重布线层内金属布线区至少超出所述电性元件一侧的外边缘。
作为本发明的进一步改进,所述第二重布线层通过金属凸块设置于所述金属引线框架上。金属引线框架外表面与芯片的功能面间距至少大于50um.
作为本发明的进一步改进,还包括第一塑封层和第二塑封层,所述第一塑封层包覆所述电性元件和所述第一重构层,所述第二塑封层包覆所述第一塑封层、所述第二重构层和所述金属引线框架,所述第一塑封层和所述第二塑封层分别包括位于所述电性元件非功能面侧的第一面和与其相对的第二面。
作为本发明的进一步改进,所述第一塑封层第二面暴露所述第一重构层,所述第二重构层设置于所述第一重布线层和所述第一塑封层第二面。
作为本发明的进一步改进,所述第一塑封层和所述第二塑封层第一面暴露所述芯片非功能面。
作为本发明的进一步改进,所述第一塑封层、所述第二塑封层第一面和所述芯片非功能面上设置有散热层或散热结构件。
作为本发明的进一步改进,所述芯片非功能面上设置有散热层或散热结构件,所述第一塑封层包覆所述散热层或所述散热结构件,且所述第一塑封层和所述第二塑封层暴露所述散热层或所述散热结构件表层区域。
作为本发明的进一步改进,所述第一塑封层暴露所述芯片非功能面,所述芯片非功能面上设有散热片,所述散热片连接于所述金属引线框架,所述第二塑封层包覆所述散热片,且暴露所述散热片表层区域。
作为本发明的进一步改进,所述芯片非功能面和所述散热片之间设有所散热层或散热结构件。
作为本发明的进一步改进,所述金属引线框架上设置有框架上芯片和/或框架上器件。
本发明还提供一种封装结构制作方法,包括步骤:
提供至少两个电性元件,其中,至少一个所述电性元件为芯片,并至少在所述一个电性元件功能面上形成第一重构层;
对所述电性元件组进行塑封,形成第一塑封层;
在所述第一重构层、所述第一塑封层和未设置所述第一重构层的部分所述电性元件上形成第二重构层;
切割获得单颗封装体,将所述封装体倒装设于金属引线框架上,将所述第二重构层电性连接至所述金属引线框架;
对所述封装体和所述金属引线框架进行塑封,形成第二塑封层。
作为本发明的进一步改进,所述第一重构层为第一重布线层或第一中介层,所述第二重构层为第二重布线层。
作为本发明的进一步改进,所述第二重布线层内金属布线至少超出所述电性元件一侧的外边缘。
作为本发明的进一步改进,还包括步骤:
在所述第二重构层上设置金属凸块,将所述第二重构层通过金属凸块倒装设于所述金属引线框架上,并将所述金属引线框架与所述芯片功能面之间的间距控制在至少大于50μm。
作为本发明的进一步改进,还包括步骤:
减薄所述第一塑封层和所述第二塑封层暴露出所述芯片非功能面,并于其上形成散热层或设置散热结构件。
作为本发明的进一步改进,还包括步骤:
在形成第一塑封层之前,于所述芯片非功能面上形成散热层或设置散热结构件;
减薄所述第一塑封层和所述第二塑封层暴露出所述散热层或所述散热结构件的表层区域。
作为本发明的进一步改进,还包括步骤:
减薄所述第一塑封层暴露出所述芯片非功能面;
在形成第二塑封层之前,在所述芯片非功能面上设置散热片,并将所述散热片连接至所述引线金属引线框架;
减薄所述第二塑封层暴露所述散热片表层区域。
作为本发明的进一步改进,还包括步骤:
在所述金属引线框架上设置框架上芯片和/或框架上器件。
本发明的有益效果是:本发明通过将具有高密度I/O端口的芯片组依次通过第一重布线层或第一中介层、第二重布线层与金属引线框架之间形成电性互连,使得在具有低成本、可靠性高、易于进行热管理等优点的金属引线框架上形成高密度布线扇出型封装结构,通过金属引线框架大幅提高了芯片功能面的散热能力,从而使得封装结构具有高密度布线的同时,也具有优良的散热性能和可靠性。
附图说明
图1是本发明实施例一中的封装结构示意图。
图2是本发明实施例二中的封装结构示意图。
图3是本发明实施例三中的封装结构示意图。
图4是本发明实施例四中的封装结构示意图。
图5是本发明实施例五中的封装结构制造方法流程示意图。
图6至图10是本发明实施例五中的封装结构制造方法各步骤示意图。
图11至图13是本发明实施例七中的封装结构制造方法与实施例五的区别步骤示意图。
图14和图15是本发明实施例八中的封装结构制造方法与实施例五的区别步骤示意图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚,下面将结合本申请具体实施方式及相应的附图对本申请技术方案进行清楚、完整地描述。显然,所描述的实施方式仅是本申请一部分实施方式,而不是全部的实施方式。基于本申请中的实施方式,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施方式,都属于本申请保护的范围。
下面详细描述本发明的实施方式,实施方式的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施方式是示例性的,仅用于解释本发明,而不能理解为对本发明的限制。
为方便说明,本文使用表示空间相对位置的术语来进行描述,例如“上”、“下”、“后”、“前”等,用来描述附图中所示的一个单元或者特征相对于另一个单元或特征的关系。空间相对位置的术语可以包括设备在使用或工作中除了图中所示方位以外的不同方位。例如,如果将图中的装置翻转,则被描述为位于其他单元或特征“下方”或“上方”的单元将位于其他单元或特征“下方”或“上方”。因此,示例性术语“下方”可以囊括下方和上方这两种空间方位。
如图1至图4所示,本发明提供一种具有封装结构,包括至少两个电性元件1、第一重构层2、第一塑封层3、第二重构层4、金属引线框架5和第二塑封层6。
电性元件1包括至少一个芯片11,其还可包括第二封装结构,或被动元件等。被动元件为诸如电容、电阻等常见电路元器件。第二封装结构为具有相对较小尺寸的封装结构,其内包括已进行封装、待与外界电路进行连接的芯片等器件。
金属引线框架引脚间距大于第二重构层引脚间距,金属引线框架具有良好的散热性和可靠性。并且,金属引线框架与芯片的功能面间距至少大于50μm。
示例性的,如图1所示,在实施例一中,电性元件1包括第一芯片11a和第二芯片11b,第一芯片11a为电源芯片,第二芯片11b为逻辑或内存芯片。在其他实施方式中,根据封装结构功能需要,可以调整芯片、被动元件和第二封装结构的分布位置及数量等,本发明对此并不做具体限制。
第二重构层4具有相对的第一面和第二面,电性元件1功能面111设置于第二重构层4第一面41上,并与其电性连接,其中,电性元件1中至少一个芯片11通过设于其功能面111的第一重构层2与第二重构层4电性连接。芯片功能面111通过设于其上的焊盘113与第一重构层2电性连接。
第一重构层2为第一重布线层或第一中介层,具体的,在本实施方式中第一重构层2为第一重布线层2a,第二重构层4为第二重布线层4a。
重布线层包括金属布线区和位于金属布线区之间的无机或有机绝缘介质区,用以对芯片11的I/O端口进行重新布局,将其布置到新的、间距占位可更为宽松的区域。中介层包括基板、基板内硅通孔和设于其上的重布线路等,其功能与重部线层类似,用以对芯片11的I/O端口进行重新布局。可以根据芯片11 设计需要,选择通过第一重布线层2a或第一中介层对芯片11进行第一次I/O 端口重构。
第一塑封层3包覆电性元件1和第一重构层2,其包括位于芯片功能面111 侧的第一面和与其相对的第二面,第一塑封层第二面32暴露第一重布线层2a。在制造过程中,先对电性元件1、和第一重构层2进行塑封,如可将电性元件1 置于临时载板上进行塑封后再剥离临时载板,形成的第一塑封层第二面32和第一重构层2表层位于同一平面。
塑封层所使用的材料为诸如带无机填料的有机高分子树脂,或带玻纤布与填料的有机高分子树脂,或环氧树脂、聚酰亚胺(PI)、干膜等带填料的聚合物复合材料。
示例性的,在实施例一中,第一芯片11a和第二芯片11b分别于其功能面 111的焊盘113上形成有第一重布线层2a,第一塑封层3包覆第一芯片11a和第二芯片11b及第一重布线层2a,第一塑封层第一面31与第一芯片11a以及第二芯片11b非功能面112平齐。
第二重布线层4a设置于第一重布线层2a和第一塑封层第二面32,用于将芯片11的I/O端口在第一重布线层2a的基础上进行第二次重构。金属引线框架5的引脚密度低,其引脚间距远大于电性元件1的引脚间距,因此需要通过第二重布线层4a对芯片11进行第二次I/O端口重构,以使芯片11的I/O端口能够与金属引线框架5之间形成电性互连。
进一步的,第二重布线层4a内金属布线区43至少超出电性元件1一侧的外边缘,即电性元件1在垂直方向上的投影位于第二重布线层4a金属布线区 43边缘轮廓之内。通过设置相对于电性元件1布线面积更大的第二重布线层4a,更有利于对芯片11的I/O端口的重构优化及封装结构热管理平面均匀化与降低热点。
第二重构层4第二面设置于金属引线框架5上,并与其电性连接。
进一步的,第二重构层4通过金属凸块7设置于金属引线框架5上,金属凸块7材质为铜、银、镍、锡等具有优良导电能力的金属材料与合金或它们的多层结合,利用金属凸块7将第二重构层4设置于金属引线框架5之上,可起到提高线路过流能力、加强散热性能和提高可靠性等作用。
进一步的,将所述金属引线框架与所述芯片功能面之间的间距控制在至少大于50μm。
综上,具有高密度I/O端口的芯片11依次通过第一重构层2、第二重构层4和金属凸块7与金属引线框架5之间形成电性互连,使得在具有低成本、可靠性高、易于进行热管理等优点的金属引线框架5上形成高密度布线扇出型封装结构,通过金属引线框架大幅提高了芯片功能面的散热能力,从而使得封装结构具有高密度布线的同时,也具有优良的散热性能和可靠性。
示例性的,在实施例一中,第二重布线层4a形成于第一塑封层第二面32 和第一重布线层2a上,并通过铜凸块倒装设于金属引线框架5之上。第二重布线层4a的金属布线区分别超出第一芯片11a和第二芯片11b的外边缘。
在本发明一些实施方式中,金属引线框架5上还设置有框架上芯片和/或框架上器件,其具有相对较低的I/O端口分布密度,能够直接设置于金属引线框架5之上,通过在金属引线框架5上设置框架上芯片和/或框架上器件,能够进一步提高封装结构的集成度。
示例性的,在实施例一中,于金属引线框架5上设置有一个框架上器件8。
第二塑封层6包覆第一塑封层3、第二重布线层4a和金属引线框架5,其包括位于电性元件1功能面111侧的第一面和与其相对的第二面。
进一步的,在本发明一些实施方式中,第一塑封层第一面31和第二塑封层第一面61暴露芯片非功能面112,从而提高封装结构的散热性能。
示例性的,在实施例一中,第二塑封层6包覆第一塑封层3、第二重布线层4a、金属引线框架5和框架上器件8,第一塑封层第一面31和第二塑封层第一面61与芯片非功能面112之间平齐,暴露与芯片非功能面112。
更进一步的,在本发明一些实施方式中,第一塑封层3、第二塑封层第二面62和芯片非功能面112上还设置有散热层或散热结构件,以进一步将强封装结构的散热能力,散热层为诸如通过物理溅射沉积的一层或多层金属层等具有优良散热性能的膜层,散热结构件为诸如金属散热片等结构件。
示例性的,如图2所示,在实施例二中,其与实施例一的区别在于,封装结构上表面还设置有散热层9a,散热层9a完整覆盖第一塑封层第一面31、第二塑封层第一面61以及芯片组的非功能面112。
在本发明一些其他实施方式中,芯片非功能面112设置有散热层或散热结构件,第一塑封层3包覆散热层或散热结构件,且第一塑封层3和第二塑封层 6暴露散热层或散热结构件表层区域。从而,仅在部分对散热性能需求高的芯片的非功能面上设置散热结构,有利于降低成本并使热管理更加均匀化。
示例性的,如图3所示,在实施例三中,其与实施例一的区别在于,仅在第一芯片11a的非功能面上设置有多层堆叠的金属散热层9a,第一芯片11a为电源芯片11,其相对于逻辑或存储芯片具有更高的散热需求,第一塑封层3包覆金属散热层9a,且第一塑封层3和第二塑封层6暴露金属散热层9a表层区域。
在本发明一些其他实施方式中,第一塑封层3暴露芯片非功能面112,芯片非功能面112上设有散热片9b,散热片9b连接于金属引线框架5,第二塑封层6包覆散热片9b,且暴露散热片9b上表层区域。散热片9b为金属散热片等具有一定结构强度的散热结构件,在封装结构内形成了一个从位于底部的金属引线框架5到上表层散热片9b的热传递通道,利用具有优良散热性能的金属引线框架5和散热片9b在封装结构内形成3D立体散热结构,进一步提高了封装结构散热能力。
根据热管理需要,可以调整散热片9b覆盖电性元件1的区域,选择覆盖全部电性元件1,或选择覆盖部分散热性能需求高的芯片非功能面112上。
进一步的,芯片非功能面112和散热片9b之间设有散热层9a或散热结构件,与散热片9b配合使用以进一步提高散热能力,并且通过设置金属散热层 9a,有利于将散热片9b与电性元件1之间形成固定关系。可选的,散热片9b 朝向金属散热层9a的底面设置有突出的金属块,以便于将散热片9b与金属层之间焊接固定。
散热片9b与金属引线框架5和金属散热层9a之间通过焊锡或金属间化合物焊接固定、或者通过散热胶粘结固定。
示例性的,如图4所示,在实施例四中,其与实施例一的区别在于,仅在第一芯片11a的非功能面112上设有金属散热层9a,并在金属散热层9a上设置有覆盖其的散热片9b,散热片9b为表面设有镀层的铜散热片9b,散热片9b 于电性元件1外侧向下延伸至金属引线框架5上,与其焊接连接。
如图5所示,本发明还提供一种封装结构制作方法,在实施例五中,其包括步骤:
S1:如图6所示,提供电性元件1,其中,至少一个电性元件1为芯片11,至少在芯片11非功能面上形成第一重构层。
第一重构层为第一重布线层或第一中介层。
具体的,在实施例五中,电性元件1包括第一芯片11a和第二芯片11b,分别于第一芯片11a和第二芯片11b功能面上形成有第一重布线层2a。
S2:如图7所示,对电性元件1进行塑封,形成第一塑封层3。
示例性的,可以提供一临时载板或载胶带,于其上贴装第一芯片11a和第二芯片11b,进行塑封后剥离临时载板或载胶带,临时载板或载胶带具有平整的上表面,以使贴装于其上的第一芯片11a和第二芯片11b下端面平齐,即形成的第一塑封层第二面32和第一重布线层2a位于同一平面。
S3:如图8所示,在第一重构层2、第一塑封层3和未设置所述第一重构层的部分所述电性元件上形成第二重构层4。
具体的,第二重构层4为第二重布线层4a。
进一步的,第二重布线层4a内金属布线至少超出电性元件1一侧的外边缘。
进一步的,步骤S3还包括:在第二重构层4上设置金属凸块7。
S4:如图9所示,切割获得单颗封装体,将封装体倒装设于金属引线框架 5上,将第二重构层4电性连接至金属引线框架5。
这里所说的封装体为形成第二重构层4后待进行后续封装步骤的中间封装结构。
选择性的,金属引线框架可以是带有支撑的载板,或是在支撑的载板上形成金属引线框架,并在形成第二塑封层至后去除或蚀刻掉载板。
具体的,形成第二重构层4后还包括步骤:将单颗封装体通过金属凸块7 焊接设于金属引线框架5上。
S5:如图10所示,对封装体和金属引线框架5进行塑封,形成第二塑封层6。
进一步的,减薄第一塑封层3和第二塑封层6暴露出芯片非功能面112。
进一步的,在本发明一些实施方式中,还包括步骤:在金属引线框架5上设置框架上芯片和/或框架上器件8。
在本发明一些其他实施方式中,还包括在芯片非功能面112设置不同的散热结构,下面就几个实施例进行具体说明。
在实施例六中,其与实施例五的区别在于:
在步骤S2中还包括:减薄第一塑封层3,暴露出芯片非功能面112。
在步骤S5中还包括:减薄第二塑封层6,暴露出芯片非功能面112,并于其上形成散热层9a。
在实施例七中,其与实施例五的区别在于:
如图11所示,在步骤S1中还包括:于芯片非功能面112上形成散热层9a 或设置散热结构件。
如图12所示,在步骤S2中还包括:减薄第一塑封层3,暴露出散热层9a 或散热结构件表层区域。
如图13所示,在步骤S5中还包括:减薄第二塑封层6,暴露出散热层9a 或散热结构件表层区域。
在实施例八中,其与实施例五的区别在于:
在步骤S2中还包括:减薄第一塑封层3暴露出芯片非功能面112。
如图14所示,在步骤S4中还包括:在芯片非功能面112上设置散热片9b,并将散热片9b连接至金属引线框架5。
进一步的,设置散热片9b之前,还可于芯片非功能面112上形成金属散热层9a或设置散热结构件,将散热片9b与金属引线框架5和金属散热层9a之间通过焊锡或金属间化合物焊接固定、或者通过散热胶粘结固定。
如图15所示,在步骤S5中还包括:减薄第二塑封层6暴露散热片9b上表层区域。
综上所述,本发明通过将具有高密度I/O端口的芯片组依次通过第一重布线层或第一中介层、第二重布线层与金属引线框架之间形成电性互连,使得在具有低成本、可靠性高、易于进行热管理等优点的金属引线框架上形成高密度布线扇出型封装结构,通过金属引线框架大幅提高了芯片功能面的散热能力,从而使得封装结构具有高密度布线的同时,也具有优良的散热性能和可靠性。
应当理解,虽然本说明书按照实施方式加以描述,但并非每个实施方式仅包含一个独立的技术方案,说明书的这种叙述方式仅仅是为清楚起见,本领域技术人员应当将说明书作为一个整体,各实施方式中的技术方案也可以经适当组合,形成本领域技术人员可以理解的其他实施方式。
上文所列出的一系列的详细说明仅仅是针对本发明的可行性实施方式的具体说明,并非用以限制本发明的保护范围,凡未脱离本发明技艺精神所作的等效实施方式或变更均应包含在本发明的保护范围之内。
Claims (20)
1.一种具有封装结构,其特征在于,
包括至少两个电性元件、第二重构层和金属引线框架,其中,至少一个电性元件为芯片,至少一个电性元件于其功能面设有第一重构层,且所述第二重构层引脚间距小于所述金属引线框架引脚间距;
所述第二重构层具有相对的第一面和第二面,所述电性元件功能面设置于所述第二重构层第一面上,并与其电性连接,其中,所述至少一个电性元件通过设于其功能面的所述第一重构层与所述第二重构层电性连接;
所述第二重构层第二面设置于所述金属引线框架上,并与其电性连接。
2.根据权利要求1所述的封装结构,其特征在于,所述第一重构层为第一重布线层或第一中介层,所述第二重构层为第二重布线层。
3.根据权利要求2所述的封装结构,其特征在于,所述第二重布线层内金属布线区至少超出所述电性元件一侧的外边缘。
4.根据权利要求3所述的封装结构,其特征在于,所述第二重布线层通过金属凸块设置于所述金属引线框架上,所述金属引线框架与所述芯片功能面之间的间距至少大于50μm。
5.根据权利要求1所述的封装结构,其特征在于,还包括第一塑封层和第二塑封层,所述第一塑封层包覆所述电性元件和所述第一重构层,所述第二塑封层包覆所述第一塑封层、所述第二重构层和所述金属引线框架,所述第一塑封层和所述第二塑封层分别包括位于所述电性元件非功能面侧的第一面和与其相对的第二面。
6.根据权利要求5所述的封装结构,其特征在于,所述第一塑封层第二面暴露所述第一重构层,所述第二重构层设置于所述第一重布线层和所述第一塑封层第二面。
7.根据权利要求5所述的封装结构,其特征在于,所述第一塑封层和所述第二塑封层第一面暴露所述芯片非功能面。
8.根据权利要求7所述的封装结构,其特征在于,所述第一塑封层、所述第二塑封层第一面和所述芯片非功能面上设置有散热层或散热结构件。
9.根据权利要求5所述的封装结构,其特征在于,所述芯片非功能面上设置有散热层或散热结构件,所述第一塑封层包覆所述散热层或所述散热结构件,且所述第一塑封层和所述第二塑封层暴露所述散热层或所述散热结构件表层区域。
10.根据权利要求5所述的封装结构,其特征在于,所述第一塑封层暴露所述芯片非功能面,所述芯片非功能面上设有散热片,所述散热片连接于所述金属引线框架,所述第二塑封层包覆所述散热片,且暴露所述散热片表层区域。
11.根据权利要求10所述的封装结构,其特征在于,所述芯片非功能面和所述散热片之间设有所散热层或散热结构件。
12.根据权利要求11所述的封装结构,其特征在于,所述金属引线框架上设置有框架上芯片和/或框架上器件。
13.一种封装结构制作方法,其特征在于,包括步骤:
提供至少两个电性元件,其中,至少一个所述电性元件为芯片,并至少在所述一个电性元件功能面上形成第一重构层;
对所述电性元件组进行塑封,形成第一塑封层;
在所述第一重构层、所述第一塑封层和未设置所述第一重构层的部分所述电性元件上形成第二重构层;
切割获得单颗封装体,将所述封装体倒装设于引线金属引线框架上,将所述第二重构层电性连接至所述金属引线框架;
对所述封装体和所述金属引线框架进行塑封,形成第二塑封层。
14.根据权利要求13所述的封装结构制作方法,其特征在于,所述第一重构层为第一重布线层或第一中介层,所述第二重构层为第二重布线层。
15.根据权利要求14所述的封装结构制作方法,其特征在于,所述第二重布线层内金属布线至少超出所述电性元件一侧的外边缘。
16.根据权利要求13所述的封装结构制作方法,其特征在于,还包括步骤:
在所述第二重构层上设置金属凸块,将所述第二重构层通过金属凸块倒装设于所述金属引线框架上,并将所述金属引线框架与所述芯片功能面之间的间距控制在至少大于50μm。
17.根据权利要求13所述的封装结构制作方法,其特征在于,还包括步骤:
减薄所述第一塑封层和所述第二塑封层暴露出所述芯片非功能面,并于其上形成散热层或设置散热结构件。
18.根据权利要求13所述的封装结构制作方法,其特征在于,还包括步骤:
在形成第一塑封层之前,于所述芯片非功能面上形成散热层或设置散热结构件;
减薄所述第一塑封层和所述第二塑封层暴露出所述散热层或所述散热结构件的表层区域。
19.根据权利要求13所述的封装结构制作方法,其特征在于,还包括步骤:
减薄所述第一塑封层暴露出所述芯片非功能面;
在形成第二塑封层之前,在所述芯片非功能面上设置散热片,并将所述散热片连接至所述金属引线框架;
减薄所述第二塑封层暴露所述散热片表层区域。
20.根据权利要求13所述的封装结构制作方法,其特征在于,还包括步骤:
在所述金属引线框架上设置框架上芯片和/或框架上器件。
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