CN115443413A - 芯片测试电路及电路测试方法 - Google Patents

芯片测试电路及电路测试方法 Download PDF

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Publication number
CN115443413A
CN115443413A CN202080100077.XA CN202080100077A CN115443413A CN 115443413 A CN115443413 A CN 115443413A CN 202080100077 A CN202080100077 A CN 202080100077A CN 115443413 A CN115443413 A CN 115443413A
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China
Prior art keywords
circuit
test
data distribution
output
tested
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Pending
Application number
CN202080100077.XA
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English (en)
Inventor
崔昌明
黄俊林
黄宇
付海涛
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Publication of CN115443413A publication Critical patent/CN115443413A/zh
Pending legal-status Critical Current

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318558—Addressing or selecting of subparts of the device under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3172—Optimisation aspects, e.g. using functional pin as test pin, pin multiplexing
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31722—Addressing or selecting of test units, e.g. transmission protocols for selecting test units
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31723—Hardware for routing the test signal within the device under test to the circuits to be tested, e.g. multiplexer for multiple core testing, accessing internal nodes
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318544—Scanning methods, algorithms and patterns
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572—Input/Output interfaces
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836—Fault-finding or characterising
    • G01R31/2844—Fault-finding or characterising using test interfaces, e.g. adapters, test boxes, switches, PIN drivers

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

一种芯片测试电路及电路测试方法，可用于EDA软件中对芯片电路进行测试，用于解决目前的测试方案中的绕线拥塞和测试配置复杂的问题。该测试电路将测试向量的输入数据通过测试总线的输入传输至数据分发电路(301)中，通过数据分发电路(301)传输至被测电路(01)的扫描输入通道，被测电路(01)扫描结束后，被测电路(01)的扫描输出通道的测试向量的输出数据通过数据分发电路(301)传输至测试总线的输出完成被测电路(01)的测试，通过对第一选择器(302)的配置实现数据分发电路(301)与测试总线(02)的动态对应关系，使得测试资源能够得以动态分配，极大程度地优化了绕线拥塞的问题，以便降低测试成本，并且可以简化配置过程，从而提高测试效率。

Description

PCT国内申请，说明书已公开。

Claims (19)

  1. PCT国内申请，权利要求书已公开。
CN202080100077.XA 2020-08-31 2020-08-31 芯片测试电路及电路测试方法 Pending CN115443413A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/112660 WO2022041232A1 (zh) 2020-08-31 2020-08-31 芯片测试电路及电路测试方法

Publications (1)

Publication Number Publication Date
CN115443413A true CN115443413A (zh) 2022-12-06

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US (1) US20230204660A1 (zh)
EP (1) EP4194865A4 (zh)
CN (1) CN115443413A (zh)
WO (1) WO2022041232A1 (zh)

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7328387B2 (en) * 2004-12-10 2008-02-05 Texas Instruments Incorporated Addressable tap domain selection circuit with selectable ⅗ pin interface
JP2010081009A (ja) * 2008-09-24 2010-04-08 Nec Corp 通信ネットワーク試験方法およびネットワーク装置
CN201434901Y (zh) * 2009-07-08 2010-03-31 天津渤海易安泰电子半导体测试有限公司 用于芯片测试机上的数字模拟混合信号芯片测试卡
CN101923133B (zh) * 2010-01-21 2012-11-07 上海大学 集成电路片上系统核间连线故障的测试系统和方法
EP2372379B1 (en) * 2010-03-26 2013-01-23 Imec Test access architecture for TSV-based 3D stacked ICS
CN104122497B (zh) * 2014-08-11 2016-09-21 中国科学院自动化研究所 集成电路内建自测试所需测试向量的生成电路及方法
US10162006B2 (en) * 2015-04-16 2018-12-25 Western Digital Technologies, Inc. Boundary scan testing a storage device via system management bus interface
CN105486999A (zh) * 2015-11-27 2016-04-13 中国电子科技集团公司第三十八研究所 基于pxi总线的边界扫描数字电路测试系统及其测试方法
CN105911454B (zh) * 2016-04-18 2018-10-26 西北核技术研究所 一种模块化数字集成电路辐射效应在线测试系统及测试方法
WO2020063414A1 (en) * 2018-09-28 2020-04-02 Changxin Memory Technologies, Inc. Test method and test system
US10866283B2 (en) * 2018-11-29 2020-12-15 Nxp B.V. Test system with embedded tester

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Publication number Publication date
US20230204660A1 (en) 2023-06-29
EP4194865A4 (en) 2023-10-04
EP4194865A1 (en) 2023-06-14
WO2022041232A1 (zh) 2022-03-03

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