CN115411056A - 复合半导体衬底、半导体装置及其制造方法 - Google Patents
复合半导体衬底、半导体装置及其制造方法 Download PDFInfo
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Abstract
本发明实施例揭露复合半导体衬底、半导体装置及其制造方法。一种复合半导体衬底,其包含半导体衬底、氧掺杂结晶半导体层及绝缘层。所述氧掺杂结晶半导体层在所述半导体衬底上方,且所述氧掺杂结晶半导体层包含结晶半导体材料及多种氧掺杂剂。所述绝缘层在所述氧掺杂结晶半导体层上方。
Description
技术领域
本发明实施例涉及复合半导体衬底、半导体装置及其制造方法。
背景技术
通过各种制造操作(例如沉积、光刻、蚀刻、植入或类似操作)在半导体衬底上制造半导体裸片。近年来,已经开发复合半导体衬底(例如绝缘体上硅(SOI)衬底)作为替代衬底。SOI衬底是具有通过绝缘层与底层处置硅晶片分离的装置硅层的衬底。SOI衬底具有例如减小的寄生电容、减小的功率消耗、减小的电流泄漏及在更高温下操作的增大能力的优点。
处置硅晶片具有高电阻率,这允许满足一些应用要求(例如装置间隔离、无源装置质量因数等)。归因于处置硅晶片的低掺杂剂,载子趋于邻近处置硅晶片与绝缘层之间的界面累积。施加到上覆装置的电压可与累积的载子相互作用,从而使上覆装置的性能劣化。在一些应用(例如射频(RF)应用)中,RF信号可遭受串扰及非线性失真。
发明内容
本发明的一实施例揭露一种复合半导体衬底,其包括:半导体衬底;氧掺杂结晶半导体层,其在所述半导体衬底上方,其中所述氧掺杂结晶半导体层包含结晶半导体材料及多种氧掺杂剂;及绝缘层,其在所述氧掺杂结晶半导体层上方。
本发明的一实施例揭露一种半导体装置,其包括:复合半导体衬底,其包括:半导体衬底;富阱层,其在所述半导体衬底上方,所述富阱层包括:结晶材料;及多种氧掺杂剂,其在所述结晶材料中;绝缘层,其在所述富阱层上方;及半导体组件,其在所述复合半导体衬底上方。
本发明的一实施例揭露一种用于制造复合半导体衬底的方法,其包括:接纳半导体衬底;在所述半导体衬底上方形成包括结晶材料的富阱层;在所述结晶材料中形成多种氧掺杂剂;及在所述富阱层上方形成绝缘层。
附图说明
在结合附图阅读时,从以下详细描述最好地理解本揭露的实施例的方面。应注意,根据产业中的标准惯例,各个结构未按比例绘制。实际上,为了论述的清楚起见,可任意增大或减小各个结构的尺寸。
图1为绘示根据本揭露的一或多个实施例的各种方面的用于制造复合衬底的方法的流程图。
图2A、2B、2C及2D为根据本揭露的一或多个实施例的制造复合半导体衬底的各种操作中的一者处的示意图。
图3文根据本揭露的一些实施例的半导体装置的示意图。
具体实施方式
下列揭露提供用于实施所提供主题的不同构件的许多不同实施例或实例。下文描述元件及布置的特定实例以简化本揭露。当然,这些仅为实例且不旨在限制。举例来说,在下列描述中的第一构件形成于第二构件上方或上可包含其中所述第一构件及所述第二构件经形成为直接接触的实施例,且还可包含其中额外构件可形成在所述第一构件与所述第二构件之间,使得所述第一构件及所述第二构件可不直接接触的实施例。另外,本揭露可在各个实例中重复参考数字及/或字母。所述重复用于简单及清楚的目的且本身并不指示所论述的各个实施例及/或配置之间的关系。
此外,为便于描述,可在本文中使用空间相对术语(例如“在…下方”、“在…下”、“下”、“在…上”、“上”、“在…上方”等)以描述一个元件或构件与另一(些)元件或构件的关系,如图中绘示。除图中描绘的定向之外,空间相关术语还打算涵盖装置在使用或操作中的不同定向。设备可以其它方式定向(旋转90度或成其它定向),且因此可同样解释本文中所使用的空间相关描述词。
如本文中使用,例如“第一”、“第二”及“第三”的术语描述各种元件、组件、区、层及/或区段,这些元件、组件、区、层及/或区段不应受限于这些术语。这些术语仅可用以区分一个元件、组件、区、层或区段与另一元件、组件、区、层或区段。当本文中使用例如“第一”、“第二”及“第三”的术语时,所述术语并不意指序列或顺序,除非上下文清楚指示。
如本文中使用,术语“近似”、“大体上”、“实质”及“约”用以描述且解释小变动。当结合事件或境况使用时,所述术语可指代其中确切地发生所述事件或境况的例项以及其中近似发生所述事件或境况的例项。例如,当结合数值使用时,所述术语可指代小于或等于所述数值的±10%(例如小于或等于±5%、小于或等于±4%、小于或等于±3%、小于或等于±2%、小于或等于±1%、小于或等于±0.5%、小于或等于±0.1%或小于或等于±0.05%)的变动范围。例如,如果两个数值之间的差小于或等于所述值的平均值的±10%(例如小于或等于±5%、小于或等于±4%、小于或等于±3%、小于或等于±2%、小于或等于±1%、小于或等于±0.5%、小于或等于±0.1%或小于或等于±0.05%),那么所述值可被认为“大体上”相同或相等。例如,“大体上”平行可直线相对于0°小于或等于±10°(例如小于或等于±5°、小于或等于±4°、小于或等于±3°、小于或等于±2°、小于或等于±1°、小于或等于±0.5°、小于或等于±0.1°或小于或等于±0.05°)的角度变动范围。例如,“大体上”垂直可指代相对于90°小于或等于±10°(例如小于或等于±5°、小于或等于±4°、小于或等于±3°、小于或等于±2°、小于或等于±1°、小于或等于±0.5°、小于或等于±0.1°或小于或等于±0.05°)的角度变动范围。
复合半导体衬底的特性在于其中形成电路的半导体区通过电绝缘层与块体衬底隔离。将电路与块体衬底隔离的一个优点在于寄生电容减小。因此,复合半导体衬底对于高频应用(例如射频(RF)通讯电路)具吸引力。随着对RF装置的质量及性能的需求增加,对RF电路的高线性度及精度的要求也持续增加。在其它要求中,已经尝试阻止电路的一个部分中的信号影响电路的另一部分中的信号并使其等信号降级。这种效应称为串扰。减轻串扰对于RF通讯电路是至关重要的,因为电路内的特定寄生路径的阻抗趋于在用于携载RF电路中的信号的频率下达到最小值。由于这些相同寄生路径连接电路内携载不同信号的节点,因此串扰的问题对于RF应用尤其是有问题的。另外,至关重要的是,电路内的信号可暴露到的寄生电容并非信号相依。这种要求是关键的,因为难以校准出信号相依的错误,且这些错误本质上是非线性的。
在本揭露的一或多个实施例中,提供一种复合半导体衬底(例如绝缘体上硅(SOI)衬底)。复合半导体衬底包含块体衬底(例如半导体衬底)、氧掺杂结晶半导体层及绝缘层。氧掺杂结晶半导体层经配置为富阱层。氧掺杂结晶半导体层包含经配置以捕获载子的一或多种结晶材料。结晶材料可包含多晶半导体材料(例如多晶硅)。氧掺杂结晶半导体层进一步包含经配置以帮助在热操作期间抑制富阱层中的裸片尺寸的再生长且同时帮助增加富阱层的电阻率的氧掺杂剂。因此,可减小寄生电容,并可缓解泄漏电流。对于一些高频应用(例如RF应用),经减小寄生电容及经减小泄漏电流可帮助缓解RF信号的非线性失真并减轻串扰,且帮助改进RF装置性能。氧掺杂结晶半导体层可由沉积形成,且因此具有更平坦表面。因此,可省略平面化操作(例如CMP操作)。
图1为绘示根据本揭露的一或多个实施例的各种方面的用于制造复合半导体衬底的方法的流程图。方法100开始于操作110,其中接纳半导体衬底。方法100继续操作120,其中在半导体衬底上方形成包括结晶材料的富阱层。方法100继续操作130,其中在结晶材料中形成多种氧掺杂剂。方法100继续操作140,其中在富阱层上方形成绝缘层。
方法100仅为实例,且并不打算限制本揭露超出发明权利要求书中明确叙述的内容。可在方法100之前、期间及之后提供额外操作,且可针对方法的额外实施例替换、消除或移动所描述的一些操作。
图2A、2B、2C及2D为根据本揭露的一或多个实施例的制造复合半导体衬底的各种操作中的一者处的示意图。如图2A中及图1中的操作110中所示,接纳半导体衬底10。半导体衬底10可包含块体衬底。半导体衬底10具有第一表面101及与第一表面101相对的第二表面102。在一些实施例中,半导体衬底10为配置成用于处置并建立待形成的上覆层的基部的处置衬底。在一些实施例中,半导体衬底10为高电阻率处置衬底。通过实例,半导体衬底10可具有大于1KΩ-cm的电阻率,但不限于此。在一些实施例中,半导体衬底10包含硅晶片(例如单晶硅衬底),但不限于此。在一些实施例中,半导体衬底10的材料可包含其它半导体材料(例如III-V族半导体材料、碳化硅、硅锗、锗、砷化镓等)。
如图2B中及图1中的操作120中所示,在半导体衬底10上方形成富阱层12。富阱层12可与半导体衬底10接触。富阱层12包含结晶材料。结晶材料可包含晶体缺陷,其可经配置以捕获载子。在一些实施例中,结晶材料可包含结晶半导体材料(例如多晶半导体材料)。通过实例,多晶半导体材料可包含多晶硅等。在一些实施例中,可从非晶半导体材料再结晶多晶半导体材料。
在一些实施例中,富阱层12指代具有能够捕获载子的晶体缺陷的半导体层。富阱层12的晶体缺陷可包含位错(即,原子不在适当位置或在晶格内错位的区域)及/或氧化诱发的叠差(OISF)。晶体缺陷可为经配置以捕获来自绝缘层的载子的重组中心。一旦经捕获于重组中心内,载子的寿命会减少。因此,沿着半导体衬底10的顶部表面的载子累积减少,从而减轻将非线性失真引入到射频(RF)信号中的寄生表面传导。
在一些实施例中,富阱层12可由沉积操作形成,但不限于此。如图2B中所示,可将半导体衬底10装载于熔炉工具的反应腔室50中,并放置于支撑器52(例如反应腔室50中的卡盘)上。可通过将源气体54A引入到反应腔室50而在半导体衬底10上方形成结晶材料(例如多晶硅)。熔炉工具包含加热器,以加热反应腔室50中的源气体54A。源气体54A被分解,借此在半导体衬底10上方形成富阱层12。在一些实施例中,源气体54A可包含含硅气体(例如硅烷、二氯硅烷(DCS)、其组合等)。在一些实施例中,与外延操作中的温度相比,在形成富阱层12时反应腔室50中的温度被控制于相对低的温度,以减轻多晶硅的裸片尺寸的过度生长。在一些实施例中,在形成富阱层12时反应腔室50中的温度低于900℃。通过实例,反应腔室50中的温度在约550℃到约650℃的范围内,但不限于此。在一些实施例中,在形成富阱层12时反应腔室50中的压力相对低,例如,压力在约0.25托到约20托的范围内,但不限于此。
如图2B中及图1中的操作130中所示,在结晶材料中形成多种氧掺杂剂。在一些实施例中,氧掺杂剂可连同结晶材料的形成一起形成。例如,可通过在形成多晶硅期间将含氧气体54B引入到反应腔室50而形成多种氧掺杂剂。通过实例,含氧气体54B可包含过氧化氢气体、一氧化二氮气体、氧气、其组合等。在一些实施例中,可将载气54C(例如氮气、氩气或类似物)引入到反应腔室50中以载送源气体54A及/或含氧气体54B。可调整相对于源气体54A的量的含氧气体54B的量以修改氧与多晶硅的比率。
在一些实施例中,可调整相对于源气体54A的量的含氧气体54B的量,以便进一步修改富阱层12的电阻率。例如,当需要富阱层12的相对较高电阻率时,可增加相对于源气体54A的量的含氧气体54B的量。当需要富阱层12的相对较低电阻率时,可减小相对于源气体54A的量的含氧气体54B的量。在一些实施例中,富阱层12的电阻率可在约1KΩ-cm到约9KΩ-cm的范围内,但不限于此。
包含结晶材料(例如,多晶硅)的富阱层12及氧掺杂剂形成氧掺杂结晶半导体层。氧掺杂结晶半导体层中的多晶硅经配置以捕获载子,借此帮助减轻寄生电容及泄漏电流。当形成多晶硅材料时,氧掺杂结晶半导体层中的氧掺杂剂可帮助抑制多晶硅的裸片尺寸的生长。氧掺杂结晶半导体层中的氧掺杂剂可在连续热操作期间进一步抑制多晶硅的裸片尺寸的再生长。在一些实施例中,氧掺杂结晶半导体层中的结晶半导体材料的裸片尺寸小于或等于0.1微米。通过实例,氧掺杂结晶半导体层中的结晶半导体材料的裸片尺寸大体上在0.03微米到0.1微米的范围内。氧掺杂结晶半导体层中的结晶半导体材料的裸片尺寸大体上在0.03微米到0.08微米的范围内。氧掺杂结晶半导体层中的结晶半导体材料的裸片尺寸大体上在0.03微米到0.05微米的范围内。由于多晶硅的裸片尺寸受控较小,更多晶界产生于多晶硅中。因此,可增加富阱层12的载子捕获能力。
在一些实施例中,氧掺杂剂的量与结晶半导体材料的量的比率在约0.05到约0.2的范围内,在约0.05到约0.15的范围内或在0.05到约0.1的范围内,但不限于此。例如,富阱层12中的氧掺杂剂的浓度可在约5E19个原子/cm3到约1E21个原子/cm3的范围中,且多晶硅的浓度可为约1E22个原子/cm3。在一些实施例中,富阱层12中的氧掺杂剂的浓度可为大体上恒定的。在一些其它实施例中,富阱层12中的氧掺杂剂的浓度可沿着深度方向变化。通过实例,富阱层12中的氧掺杂剂的浓度可沿着深度方向从远离半导体衬底10的上表面到接近半导体衬底10的底部表面增加。富阱层12中的氧掺杂剂的浓度可沿着深度方向从上表面到底部表面减小。富阱层12中的氧掺杂剂的浓度可以连续方式或以多级方式沿着深度方向变化。
与外延生长结晶半导体层相比,通过沉积操作形成的富阱层12可具有相对较平坦表面。由于富阱层12具有较平坦表面,所以富阱层12的原始形成的厚度可与其目标厚度相同,且可省略连续平面化操作(例如CMP操作)。因此,可减少制造成本。在一些实施例中,富阱层12的厚度可小于或等于2.5微米(例如,在约1.8微米与2.0微米之间),但不限于此。
在一些实施例中,富阱层12可与半导体衬底10电接触。在一些替代实施例中,不干扰富阱层12与半导体衬底10之间的载子传送的中间层可存在于富阱层12与半导体衬底10之间。
如图2C中及图1中的操作140中所示,在富阱层12上方形成绝缘层14。在一些实施例中,绝缘层14包含埋藏氧化物层。通过实例,绝缘层14为埋藏氧化硅层(例如热氧化硅层)。在一些实施例中,埋藏氧化物层可为通过熔炉中的氧化形成的热氧化物层。绝缘层14可由其它适合氧化操作形成。绝缘层14经配置以将待形成的有源半导体层与半导体衬底10电隔离。在一些实施例中,可对绝缘层14执行平面化操作(例如CMP操作),以平面化绝缘层14的表面。在一些其它实施例中,由于绝缘层14生长于富阱层12的平坦表面上,故还可省略用于平面化绝缘层14的CMP操作。
如图2D中所示,可在绝缘层14上方形成有源层16,以形成复合半导体衬底1。有源层16可与富阱层12接触。在一些实施例中,有源层16可包含有源半导体层(例如表面硅层或其它半导体层)。在一些实施例中,可通过将半导体晶片(例如硅晶片)接合到绝缘层14而形成有源层16。在一些实施例中,半导体晶片可通过(例如)研磨或抛光而薄化到适合厚度。在一些实施例中,有源层16可经配置为用于制造半导体组件(例如无源装置及/或有源装置)的有源区。在一些实施例中,半导体组件可包含射频(RF)装置。
如图2D中所示,复合半导体衬底1包含插置于半导体衬底10与绝缘层14之间的富阱层12。富阱层12可为氧掺杂结晶半导体层,其包含结晶半导体材料(例如多晶硅)及分布于结晶半导体材料中的氧掺杂剂。氧掺杂结晶半导体层经配置以捕获载子。当形成结晶半导体材料时,氧掺杂结晶半导体层中的氧掺杂剂可帮助抑制结晶半导体材料的裸片尺寸的生长。氧掺杂结晶半导体层中的氧掺杂剂可进一步帮助在连续热操作期间抑制多晶硅的裸片尺寸的再生长。借助于氧掺杂剂,可将氧掺杂结晶半导体层中的结晶半导体材料的裸片尺寸控制为小于或等于0.1微米。氧掺杂结晶半导体层中的氧掺杂剂还可帮助在结晶半导体材料中产生具有晶体缺陷的更多晶界,且因此可增加氧掺杂结晶半导体层的载子捕获能力。因此,可减小复合半导体衬底的寄生电容,并可缓解泄漏电流。对于一些高频应用(例如射频(RF)通讯电路应用),经减小寄生电容及经减小泄漏电流可帮助缓解RF信号的非线性失真,且帮助改进RF装置性能。在装置(例如RF开关)的制造期间,复合半导体衬底可经历一些退火操作或经历高温。氧掺杂结晶半导体层的氧掺杂剂经配置以阻挡结晶半导体材料的裸片彼此邻接,且因此可帮助在退火操作期间或在高温下抑制裸片的再生长。
本揭露的复合半导体衬底及半导体装置不限于上文提及的实施例,且可具有其它不同实施例。为了简化描述且为了方便本揭露的实施例的各者之间的比较起见,以下实施例的各者中的相同组件由相同数字标记。为了更容易比较实施例之间的差别,下文描述将详述不同实施例之间的不同的处,且相同特征将不再赘述。
图3为根据本揭露的一些实施例的半导体装置的示意图。如图3中所示,半导体装置30可包含复合半导体衬底2及半导体组件40。复合半导体衬底2包含半导体衬底10、富阱层12、绝缘层14及有源层16。富阱层12可为氧掺杂结晶半导体层,其包含结晶半导体材料(例如多晶硅)及分布于结晶半导体材料中的氧掺杂剂。富阱层12可经配置以捕获载子。半导体衬底10、富阱层12、绝缘层14及有源层16的配置可类似于如图2D中所绘示的复合半导体衬底1。
半导体组件40经放置于复合半导体衬底2上方。在一些实施例中,半导体组件40可包含RF(射频)晶体管等。在一些实施例中,半导体组件40可包含栅极电极42、栅极绝缘层44、源极/漏极区46及间隔件结构48。栅极电极42可经放置于有源层16上方。栅极绝缘层44可经放置于栅极电极42与有源层16之间。源极/漏极区46可形成于有源层16中栅极电极42的相对侧处。间隔件结构48可经放置于栅极电极42的相对侧上。在一些替代实施例中,半导体组件40可包含RF装置(例如RF开关装置等)。
在RF信号的周期短于多数载子松弛时间的情况下,半导体衬底10中的多数载子可不响应于RF信号。多数载子可看似被冻结,且半导体衬底10可表达为介电质。然而,硅具有可在一些RF应用中产生非所要行为的特定特性。例如,高电阻率半导体衬底10中的掺杂电平是非常低的或不存在的。因此,半导体衬底10的表面处的氧化物电荷或半导体衬底10中的弱电场可引发反转或累积层,其可用作半导体衬底10的表面处的表面传导层。在半导体衬底10的表面上方横越的RF信号可调制表面传导层,其可导致非线性电容、非线性传导性或两者影响半导体衬底10与其它上覆层之间的RF相互作用。非线性特性可引入RF信号中可超过可允许限制的谐波失真。富阱层12包含结晶材料(例如,多晶硅)及氧掺杂剂。富阱层12的结晶材料包含具有位错的晶体缺陷。晶体缺陷经配置以捕获半导体衬底10及/或绝缘层14中的载子。通过将载子捕获于富阱层12的结晶材料的晶体缺陷内,可减轻可导致RF信号的非线性失真的寄生表面传导。在一些实施例中,SOI衬底2可经历一些退火操作或经历高温。富阱层12的氧掺杂剂经配置以阻挡结晶材料的裸片彼此邻接,且因此可帮助在退火操作期间或在高温下抑制裸片的再生长。凭借氧掺杂剂,可将结晶材料的裸片控制为具有较小裸片尺寸及细粒结构,且因此可增加富阱层12的陷阱密度。
在本揭露的一些实施例中,复合半导体衬底包含插置于半导体块体衬底与绝缘层之间的富阱层。富阱层可为氧掺杂结晶半导体层,其包含结晶半导体材料(例如多晶硅)及分布于结晶半导体材料中的氧掺杂剂。氧掺杂结晶半导体层经配置以捕获载子。当形成结晶半导体材料时,氧掺杂结晶半导体层中的氧掺杂剂可帮助抑制结晶半导体材料的裸片尺寸的生长。氧掺杂结晶半导体层中的氧掺杂剂可进一步帮助在连续热操作期间抑制多晶硅的裸片尺寸的再生长。借助于氧掺杂剂,可将氧掺杂结晶半导体层中的结晶半导体材料的裸片尺寸控制为小于或等于0.1微米。氧掺杂结晶半导体层中的氧掺杂剂还可帮助在结晶半导体材料中产生具有更多晶体缺陷的更多晶界,且因此可增加氧掺杂结晶半导体层的载子捕获能力。因此,可减小复合半导体衬底的寄生电容,并可缓解泄漏电流。对于一些高频应用(例如射频(RF)通讯电路应用),经减小寄生电容及经减小泄漏电流可帮助缓解RF信号的非线性失真,并帮助改进RF装置性能。
在一些实施例中,复合半导体衬底包含半导体衬底、氧掺杂结晶半导体层及绝缘层。所述氧掺杂结晶半导体层在所述半导体衬底上方,且所述氧掺杂结晶半导体层包含结晶半导体材料及多种氧掺杂剂。所述绝缘层在所述氧掺杂结晶半导体层上方。
在一些实施例中,半导体装置可包含复合半导体衬底及半导体组件。所述复合半导体衬底包含半导体衬底、富阱层及绝缘层。所述富阱层在所述半导体衬底上方。所述富阱层包含结晶材料及所述结晶材料中的多种氧掺杂剂。所述绝缘层在所述富阱层上方。所述半导体组件处于所述复合半导体衬底上方。
在一些实施例中,用于制造复合半导体衬底的方法包含以下操作。接纳半导体衬底。在所述半导体衬底上方形成包含结晶材料的富阱层。在所述结晶材料中形成多种氧掺杂剂。在所述富阱层上方形成绝缘层。
前文概述数个实施例的结构,使得本领域技术人员可更好地理解本揭露的方面。本领域技术人员应明白,其可容易将本揭露用作设计或修改用于实行本文中介绍的实施例的相同目的及/或达成相同优点的其它程序及结构的基础。本领域技术人员还应认识到,这些等效构造未脱离本揭露的精神及范围,且其可在不脱离本揭露的精神及范围的情况下在本文中进行各种改变、置换及更改。
符号说明
1 复合半导体衬底
2 复合半导体衬底/绝缘体上硅(SOI)衬底
10 半导体衬底
12 富阱层
14 绝缘层
16 有源层
30 半导体装置
40 半导体组件
42 栅极电极
44 栅极绝缘层
46 源极/漏极区
48 间隔件结构
50 反应腔室
52 支撑器
54A 源气体
54B 含氧气体
54C 载气
100 方法
101 第一表面
102 第二表面
110 操作
120 操作
130 操作
140 操作
Claims (10)
1.一种复合半导体衬底,其包括:
半导体衬底;
氧掺杂结晶半导体层,其在所述半导体衬底上方,其中所述氧掺杂结晶半导体层包含结晶半导体材料及多种氧掺杂剂,所述结晶半导体材料包含具有位错的晶体缺陷,所述氧掺杂剂经配置以阻挡所述结晶半导体材料的裸片彼此邻接;
绝缘层,其在所述氧掺杂结晶半导体层上方;及
有源层,其在所述绝缘层上方,其中所述氧掺杂结晶半导体层与所述有源层藉由所述绝缘层分离,所述有源层与所述绝缘层接触,且所述绝缘层与所述氧掺杂结晶半导体层接触,所述氧掺杂结晶半导体层的电阻率在1KΩ-cm到9KΩ-cm的范围内,包含所述晶体缺陷的所述结晶半导体材料经配置以捕获来自所述绝缘层的载子。
2.根据权利要求1所述的复合半导体衬底,其中所述结晶半导体材料包括多晶硅。
3.根据权利要求1所述的复合半导体衬底,其中所述绝缘层包括埋藏氧化物层。
4.根据权利要求1所述的复合半导体衬底,其中所述结晶半导体材料的裸片尺寸小于或等于0.1微米。
5.一种半导体装置,其包括:
复合半导体衬底,其包括:
半导体衬底;
富阱层,其在所述半导体衬底上方,所述富阱层包括:
结晶材料;及
多种氧掺杂剂,其在所述结晶材料中,其中所述富阱层的所述氧掺杂剂的浓度以多级方式沿着深度方向变化;
绝缘层,其在所述富阱层上方;及
有源层,其在所述绝缘层上方,其中所述富阱层与所述有源层分离,所述绝缘层具有面向且接触所述富阱层的第一表面以及面向且接触所述有源层的第二表面;及
半导体组件,其在所述复合半导体衬底上方,其中所述半导体组件与所述富阱层分离,所述半导体组件包含栅极电极及间隔件结构,所述栅极电极与所述间隔件结构分离,且所述富阱层经配置以捕获来自所述绝缘层的载子。
6.根据权利要求5所述的半导体装置,其中所述结晶材料包括多晶半导体材料。
7.根据权利要求5所述的半导体装置,其中所述绝缘层包括热氧化物层。
8.一种用于制造复合半导体衬底的方法,其包括:
接纳半导体衬底;
在所述半导体衬底上方形成包括结晶材料的富阱层;
在所述结晶材料中形成多种氧掺杂剂;
在所述富阱层上方形成绝缘层;及
在所述绝缘层上方形成有源层,其中所述有源层通过将半导体晶片接合到所述绝缘层而形成,所述有源层鄰接所述绝缘层,所述绝缘层直接鄰接所述富阱层,所述有源层直接接触所述富阱层,且所述富阱层经配置以捕获来自所述绝缘层的载子。
9.根据权利要求8所述的方法,其中所述结晶材料的裸片尺寸小于或等于0.1微米。
10.根据权利要求8所述的方法,其中所述氧掺杂剂的量与所述结晶材料的量的比率在0.05到0.2的范围内。
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