CN115332064B - 单片化方法 - Google Patents

单片化方法 Download PDF

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Publication number
CN115332064B
CN115332064B CN202210985262.2A CN202210985262A CN115332064B CN 115332064 B CN115332064 B CN 115332064B CN 202210985262 A CN202210985262 A CN 202210985262A CN 115332064 B CN115332064 B CN 115332064B
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CN
China
Prior art keywords
wafer
metal layer
irradiation
laser beam
laser light
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Active
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CN202210985262.2A
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English (en)
Chinese (zh)
Other versions
CN115332064A (zh
Inventor
原田刚史
太田博昭
松岛芳宏
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Nuvoton Technology Corp Japan
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Nuvoton Technology Corp Japan
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Publication of CN115332064A publication Critical patent/CN115332064A/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/08—Shaping or machining of piezoelectric or electrostrictive bodies
    • H10N30/085—Shaping or machining of piezoelectric or electrostrictive bodies by machining
    • H10N30/088—Shaping or machining of piezoelectric or electrostrictive bodies by machining by cutting or dicing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/30—Cleaning after the substrates have been singulated
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7422—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/501—Marks applied to devices, e.g. for alignment or identification for use before dicing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing

Landscapes

  • Dicing (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Laser Beam Processing (AREA)
CN202210985262.2A 2020-02-21 2021-02-17 单片化方法 Active CN115332064B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US202062980033P 2020-02-21 2020-02-21
US62/980,033 2020-02-21
PCT/JP2021/005957 WO2021166963A1 (ja) 2020-02-21 2021-02-17 個片化方法
CN202180005345.4A CN114424323B (zh) 2020-02-21 2021-02-17 单片化方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN202180005345.4A Division CN114424323B (zh) 2020-02-21 2021-02-17 单片化方法

Publications (2)

Publication Number Publication Date
CN115332064A CN115332064A (zh) 2022-11-11
CN115332064B true CN115332064B (zh) 2025-01-21

Family

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CN202210985262.2A Active CN115332064B (zh) 2020-02-21 2021-02-17 单片化方法
CN202180005345.4A Active CN114424323B (zh) 2020-02-21 2021-02-17 单片化方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN202180005345.4A Active CN114424323B (zh) 2020-02-21 2021-02-17 单片化方法

Country Status (4)

Country Link
US (2) US11488867B2 (https=)
JP (2) JP7062147B2 (https=)
CN (2) CN115332064B (https=)
WO (1) WO2021166963A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111816602A (zh) * 2020-07-21 2020-10-23 上海韦尔半导体股份有限公司 一种芯片制备方法及芯片
JP7729003B1 (ja) * 2023-12-26 2025-08-25 ヌヴォトンテクノロジージャパン株式会社 半導体装置および半導体モジュール

Citations (2)

* Cited by examiner, † Cited by third party
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CN105826253A (zh) * 2015-01-28 2016-08-03 株式会社东芝 包含衬底的装置的制造方法
CN109585370A (zh) * 2017-09-28 2019-04-05 英飞凌科技股份有限公司 包括自对准背侧导电层的半导体芯片及其制造方法

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US6420245B1 (en) * 1999-06-08 2002-07-16 Kulicke & Soffa Investments, Inc. Method for singulating semiconductor wafers
US6908784B1 (en) * 2002-03-06 2005-06-21 Micron Technology, Inc. Method for fabricating encapsulated semiconductor components
US7008861B2 (en) * 2003-12-11 2006-03-07 Cree, Inc. Semiconductor substrate assemblies and methods for preparing and dicing the same
US7129114B2 (en) * 2004-03-10 2006-10-31 Micron Technology, Inc. Methods relating to singulating semiconductor wafers and wafer scale assemblies
US7550367B2 (en) * 2004-08-17 2009-06-23 Denso Corporation Method for separating semiconductor substrate
US7435664B2 (en) * 2006-06-30 2008-10-14 Intel Corporation Wafer-level bonding for mechanically reinforced ultra-thin die
JP5408762B2 (ja) * 2008-02-08 2014-02-05 リンテック株式会社 レーザーダイシングシートおよびチップ体の製造方法
US8211781B2 (en) 2008-11-10 2012-07-03 Stanley Electric Co., Ltd. Semiconductor manufacturing method
JP5237764B2 (ja) * 2008-11-10 2013-07-17 スタンレー電気株式会社 半導体素子の製造方法
JP2010267638A (ja) * 2009-05-12 2010-11-25 Disco Abrasive Syst Ltd 保護膜の被覆方法及びウエーハのレーザ加工方法
US8252682B2 (en) * 2010-02-12 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method for thinning a wafer
US8383984B2 (en) 2010-04-02 2013-02-26 Electro Scientific Industries, Inc. Method and apparatus for laser singulation of brittle materials
US8673741B2 (en) 2011-06-24 2014-03-18 Electro Scientific Industries, Inc Etching a laser-cut semiconductor before dicing a die attach film (DAF) or other material layer
US8642385B2 (en) * 2011-08-09 2014-02-04 Alpha & Omega Semiconductor, Inc. Wafer level package structure and the fabrication method thereof
US8643148B2 (en) * 2011-11-30 2014-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Chip-on-Wafer structures and methods for forming the same
US9559005B2 (en) * 2014-01-24 2017-01-31 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of packaging and dicing semiconductor devices and structures thereof
PT2974822T (pt) 2014-07-14 2017-11-14 Asm Tech Singapore Pte Ltd Método de divisão de substratos semicondutores finos
JP2017069243A (ja) * 2015-09-28 2017-04-06 日本特殊陶業株式会社 積層体のレーザ除去加工方法
CN107214419B (zh) 2017-07-14 2018-10-09 中国科学院微电子研究所 一种激光加工晶圆的方法及装置
JP6981800B2 (ja) * 2017-07-28 2021-12-17 浜松ホトニクス株式会社 積層型素子の製造方法
JP7109862B2 (ja) * 2018-07-10 2022-08-01 株式会社ディスコ 半導体ウェーハの加工方法
CN109065444A (zh) * 2018-08-06 2018-12-21 甬矽电子(宁波)股份有限公司 晶圆切割方法
TWI761740B (zh) 2018-12-19 2022-04-21 日商新唐科技日本股份有限公司 半導體裝置
KR102751333B1 (ko) * 2020-06-01 2025-01-07 삼성전자주식회사 반도체 패키지

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105826253A (zh) * 2015-01-28 2016-08-03 株式会社东芝 包含衬底的装置的制造方法
CN109585370A (zh) * 2017-09-28 2019-04-05 英飞凌科技股份有限公司 包括自对准背侧导电层的半导体芯片及其制造方法

Also Published As

Publication number Publication date
US11646230B2 (en) 2023-05-09
JP2022067118A (ja) 2022-05-02
CN114424323A (zh) 2022-04-29
US11488867B2 (en) 2022-11-01
US20220238378A1 (en) 2022-07-28
CN115332064A (zh) 2022-11-11
JP7062147B2 (ja) 2022-05-02
JPWO2021166963A1 (https=) 2021-08-26
WO2021166963A1 (ja) 2021-08-26
US20230015582A1 (en) 2023-01-19
CN114424323B (zh) 2022-08-09

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