JPWO2021166963A1 - - Google Patents

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Publication number
JPWO2021166963A1
JPWO2021166963A1 JP2022501939A JP2022501939A JPWO2021166963A1 JP WO2021166963 A1 JPWO2021166963 A1 JP WO2021166963A1 JP 2022501939 A JP2022501939 A JP 2022501939A JP 2022501939 A JP2022501939 A JP 2022501939A JP WO2021166963 A1 JPWO2021166963 A1 JP WO2021166963A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2022501939A
Other languages
Japanese (ja)
Other versions
JPWO2021166963A5 (https=
JP7062147B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2021166963A1 publication Critical patent/JPWO2021166963A1/ja
Priority to JP2022032197A priority Critical patent/JP2022067118A/ja
Application granted granted Critical
Publication of JPWO2021166963A5 publication Critical patent/JPWO2021166963A5/ja
Publication of JP7062147B2 publication Critical patent/JP7062147B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/08—Shaping or machining of piezoelectric or electrostrictive bodies
    • H10N30/085—Shaping or machining of piezoelectric or electrostrictive bodies by machining
    • H10N30/088—Shaping or machining of piezoelectric or electrostrictive bodies by machining by cutting or dicing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/30—Cleaning after the substrates have been singulated
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7422—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/501—Marks applied to devices, e.g. for alignment or identification for use before dicing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing

Landscapes

  • Dicing (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Laser Beam Processing (AREA)
JP2022501939A 2020-02-21 2021-02-17 個片化方法 Active JP7062147B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2022032197A JP2022067118A (ja) 2020-02-21 2022-03-02 個片化方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US202062980033P 2020-02-21 2020-02-21
US62/980,033 2020-02-21
PCT/JP2021/005957 WO2021166963A1 (ja) 2020-02-21 2021-02-17 個片化方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2022032197A Division JP2022067118A (ja) 2020-02-21 2022-03-02 個片化方法

Publications (3)

Publication Number Publication Date
JPWO2021166963A1 true JPWO2021166963A1 (https=) 2021-08-26
JPWO2021166963A5 JPWO2021166963A5 (https=) 2022-05-02
JP7062147B2 JP7062147B2 (ja) 2022-05-02

Family

ID=77391277

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2022501939A Active JP7062147B2 (ja) 2020-02-21 2021-02-17 個片化方法
JP2022032197A Pending JP2022067118A (ja) 2020-02-21 2022-03-02 個片化方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2022032197A Pending JP2022067118A (ja) 2020-02-21 2022-03-02 個片化方法

Country Status (4)

Country Link
US (2) US11488867B2 (https=)
JP (2) JP7062147B2 (https=)
CN (2) CN115332064B (https=)
WO (1) WO2021166963A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111816602A (zh) * 2020-07-21 2020-10-23 上海韦尔半导体股份有限公司 一种芯片制备方法及芯片

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7729003B1 (ja) * 2023-12-26 2025-08-25 ヌヴォトンテクノロジージャパン株式会社 半導体装置および半導体モジュール

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009188303A (ja) * 2008-02-08 2009-08-20 Lintec Corp レーザーダイシングシートおよびチップ体の製造方法
JP2010267638A (ja) * 2009-05-12 2010-11-25 Disco Abrasive Syst Ltd 保護膜の被覆方法及びウエーハのレーザ加工方法
JP2013524521A (ja) * 2010-04-02 2013-06-17 エレクトロ サイエンティフィック インダストリーズ インコーポレーテッド 脆性材料のレーザシンギュレーションのための改良された方法及び装置
JP2016139739A (ja) * 2015-01-28 2016-08-04 株式会社東芝 デバイスの製造方法
CN107214419A (zh) * 2017-07-14 2017-09-29 中国科学院微电子研究所 一种激光加工晶圆的方法及装置

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6420245B1 (en) * 1999-06-08 2002-07-16 Kulicke & Soffa Investments, Inc. Method for singulating semiconductor wafers
US6908784B1 (en) * 2002-03-06 2005-06-21 Micron Technology, Inc. Method for fabricating encapsulated semiconductor components
US7008861B2 (en) * 2003-12-11 2006-03-07 Cree, Inc. Semiconductor substrate assemblies and methods for preparing and dicing the same
US7129114B2 (en) * 2004-03-10 2006-10-31 Micron Technology, Inc. Methods relating to singulating semiconductor wafers and wafer scale assemblies
US7550367B2 (en) * 2004-08-17 2009-06-23 Denso Corporation Method for separating semiconductor substrate
US7435664B2 (en) * 2006-06-30 2008-10-14 Intel Corporation Wafer-level bonding for mechanically reinforced ultra-thin die
US8211781B2 (en) 2008-11-10 2012-07-03 Stanley Electric Co., Ltd. Semiconductor manufacturing method
JP5237764B2 (ja) * 2008-11-10 2013-07-17 スタンレー電気株式会社 半導体素子の製造方法
US8252682B2 (en) * 2010-02-12 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method for thinning a wafer
US8673741B2 (en) 2011-06-24 2014-03-18 Electro Scientific Industries, Inc Etching a laser-cut semiconductor before dicing a die attach film (DAF) or other material layer
US8642385B2 (en) * 2011-08-09 2014-02-04 Alpha & Omega Semiconductor, Inc. Wafer level package structure and the fabrication method thereof
US8643148B2 (en) * 2011-11-30 2014-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Chip-on-Wafer structures and methods for forming the same
US9559005B2 (en) * 2014-01-24 2017-01-31 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of packaging and dicing semiconductor devices and structures thereof
PT2974822T (pt) 2014-07-14 2017-11-14 Asm Tech Singapore Pte Ltd Método de divisão de substratos semicondutores finos
JP2017069243A (ja) * 2015-09-28 2017-04-06 日本特殊陶業株式会社 積層体のレーザ除去加工方法
JP6981800B2 (ja) * 2017-07-28 2021-12-17 浜松ホトニクス株式会社 積層型素子の製造方法
DE102017122650B4 (de) * 2017-09-28 2023-02-09 Infineon Technologies Ag Halbleiterchip einschliesslich einer selbstausgerichteten rückseitigen leitfähigen schicht und verfahren zum herstellen desselben
JP7109862B2 (ja) * 2018-07-10 2022-08-01 株式会社ディスコ 半導体ウェーハの加工方法
CN109065444A (zh) * 2018-08-06 2018-12-21 甬矽电子(宁波)股份有限公司 晶圆切割方法
TWI761740B (zh) 2018-12-19 2022-04-21 日商新唐科技日本股份有限公司 半導體裝置
KR102751333B1 (ko) * 2020-06-01 2025-01-07 삼성전자주식회사 반도체 패키지

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009188303A (ja) * 2008-02-08 2009-08-20 Lintec Corp レーザーダイシングシートおよびチップ体の製造方法
JP2010267638A (ja) * 2009-05-12 2010-11-25 Disco Abrasive Syst Ltd 保護膜の被覆方法及びウエーハのレーザ加工方法
JP2013524521A (ja) * 2010-04-02 2013-06-17 エレクトロ サイエンティフィック インダストリーズ インコーポレーテッド 脆性材料のレーザシンギュレーションのための改良された方法及び装置
JP2016139739A (ja) * 2015-01-28 2016-08-04 株式会社東芝 デバイスの製造方法
CN107214419A (zh) * 2017-07-14 2017-09-29 中国科学院微电子研究所 一种激光加工晶圆的方法及装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111816602A (zh) * 2020-07-21 2020-10-23 上海韦尔半导体股份有限公司 一种芯片制备方法及芯片

Also Published As

Publication number Publication date
US11646230B2 (en) 2023-05-09
JP2022067118A (ja) 2022-05-02
CN114424323A (zh) 2022-04-29
US11488867B2 (en) 2022-11-01
US20220238378A1 (en) 2022-07-28
CN115332064A (zh) 2022-11-11
JP7062147B2 (ja) 2022-05-02
CN115332064B (zh) 2025-01-21
WO2021166963A1 (ja) 2021-08-26
US20230015582A1 (en) 2023-01-19
CN114424323B (zh) 2022-08-09

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