CN115048144A - 用于处理文本串的指令和逻辑 - Google Patents

用于处理文本串的指令和逻辑 Download PDF

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Publication number
CN115048144A
CN115048144A CN202210391590.XA CN202210391590A CN115048144A CN 115048144 A CN115048144 A CN 115048144A CN 202210391590 A CN202210391590 A CN 202210391590A CN 115048144 A CN115048144 A CN 115048144A
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China
Prior art keywords
data elements
data
bits
bit
operand
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CN202210391590.XA
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Chinese (zh)
Inventor
M·朱利耶
J·格雷
S·米克斯
M·塞科尼
S·陈努帕蒂
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Intel Corp
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Intel Corp
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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
CN202210391590.XA 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑 Pending CN115048144A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/525,981 2006-09-22
US11/525,981 US9069547B2 (en) 2006-09-22 2006-09-22 Instruction and logic for processing text strings
CN200710305776.4A CN101251791B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑

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CN200710305776.4A Division CN101251791B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑

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CN115048144A true CN115048144A (zh) 2022-09-13

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Family Applications (10)

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CN201410452395.9A Expired - Fee Related CN105607890B (zh) 2006-09-22 2007-09-24 处理器和响应于单个simd紧缩比较指令而执行的方法
CN201410822302.7A Expired - Fee Related CN104657113B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN201410826057.7A Expired - Fee Related CN104484157B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN201810003932.XA Expired - Fee Related CN108052348B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN201410820208.8A Expired - Fee Related CN104657112B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和相关联的处理器
CN201110022470.4A Expired - Fee Related CN102073478B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN202210391590.XA Pending CN115048144A (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN201610875178.XA Expired - Fee Related CN107015784B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN201210381275.5A Expired - Fee Related CN102999315B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN200710305776.4A Expired - Fee Related CN101251791B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑

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Application Number Title Priority Date Filing Date
CN201410452395.9A Expired - Fee Related CN105607890B (zh) 2006-09-22 2007-09-24 处理器和响应于单个simd紧缩比较指令而执行的方法
CN201410822302.7A Expired - Fee Related CN104657113B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN201410826057.7A Expired - Fee Related CN104484157B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN201810003932.XA Expired - Fee Related CN108052348B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN201410820208.8A Expired - Fee Related CN104657112B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和相关联的处理器
CN201110022470.4A Expired - Fee Related CN102073478B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑

Family Applications After (3)

Application Number Title Priority Date Filing Date
CN201610875178.XA Expired - Fee Related CN107015784B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN201210381275.5A Expired - Fee Related CN102999315B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑
CN200710305776.4A Expired - Fee Related CN101251791B (zh) 2006-09-22 2007-09-24 用于处理文本串的指令和逻辑

Country Status (7)

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US (20) US9069547B2 (enExample)
JP (10) JP5575477B2 (enExample)
KR (2) KR101300362B1 (enExample)
CN (10) CN105607890B (enExample)
BR (1) BRPI0717068A2 (enExample)
DE (4) DE102007045496B4 (enExample)
WO (1) WO2008036945A1 (enExample)

Families Citing this family (76)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7958181B2 (en) * 2006-09-21 2011-06-07 Intel Corporation Method and apparatus for performing logical compare operations
US9069547B2 (en) 2006-09-22 2015-06-30 Intel Corporation Instruction and logic for processing text strings
US7991987B2 (en) * 2007-05-10 2011-08-02 Intel Corporation Comparing text strings
US8954484B2 (en) 2009-06-12 2015-02-10 Cray Inc. Inclusive or bit matrix to compare multiple corresponding subfields
US8515052B2 (en) 2007-12-17 2013-08-20 Wai Wu Parallel signal processing system and method
US8200947B1 (en) * 2008-03-24 2012-06-12 Nvidia Corporation Systems and methods for voting among parallel threads
US8755515B1 (en) 2008-09-29 2014-06-17 Wai Wu Parallel signal processing system and method
US9747105B2 (en) * 2009-12-17 2017-08-29 Intel Corporation Method and apparatus for performing a shift and exclusive or operation in a single instruction
US9003170B2 (en) 2009-12-22 2015-04-07 Intel Corporation Bit range isolation instructions, methods, and apparatus
US9009447B2 (en) * 2011-07-18 2015-04-14 Oracle International Corporation Acceleration of string comparisons using vector instructions
EP2788902B1 (en) * 2011-12-08 2019-04-17 Oracle International Corporation Techniques for more efficient usage of memory-to-cpu bandwidth
US20140108480A1 (en) * 2011-12-22 2014-04-17 Elmoustapha Ould-Ahmed-Vall Apparatus and method for vector compute and accumulate
US20140281369A1 (en) * 2011-12-23 2014-09-18 Ashish Jha Apparatus and method for sliding window data gather
CN104137053B (zh) * 2011-12-23 2018-06-26 英特尔公司 用于响应于单个指令来执行蝴蝶横向和交叉加法或减法的系统、装置和方法
CN104081336B (zh) * 2011-12-23 2018-10-23 英特尔公司 用于检测向量寄存器内的相同元素的装置和方法
CN104067224B (zh) 2011-12-23 2017-05-17 英特尔公司 在不同的粒度水平下对数据值进行广播和掩码的指令执行
US9946540B2 (en) 2011-12-23 2018-04-17 Intel Corporation Apparatus and method of improved permute instructions with multiple granularities
CN111831335A (zh) 2011-12-23 2020-10-27 英特尔公司 经改进的插入指令的装置和方法
CN107391086B (zh) * 2011-12-23 2020-12-08 英特尔公司 改进置换指令的装置和方法
CN108647044B (zh) * 2011-12-28 2022-09-13 英特尔公司 浮点缩放处理器、方法、系统和指令
WO2013101234A1 (en) * 2011-12-30 2013-07-04 Intel Corporation Unique packed data element identification processors, methods, systems, and instructions
US9454367B2 (en) 2012-03-15 2016-09-27 International Business Machines Corporation Finding the length of a set of character data having a termination character
US9459867B2 (en) 2012-03-15 2016-10-04 International Business Machines Corporation Instruction to load data up to a specified memory boundary indicated by the instruction
US9459864B2 (en) 2012-03-15 2016-10-04 International Business Machines Corporation Vector string range compare
US9459868B2 (en) 2012-03-15 2016-10-04 International Business Machines Corporation Instruction to load data up to a dynamically determined memory boundary
US9280347B2 (en) 2012-03-15 2016-03-08 International Business Machines Corporation Transforming non-contiguous instruction specifiers to contiguous instruction specifiers
US9710266B2 (en) 2012-03-15 2017-07-18 International Business Machines Corporation Instruction to compute the distance to a specified memory boundary
US9715383B2 (en) 2012-03-15 2017-07-25 International Business Machines Corporation Vector find element equal instruction
US9588762B2 (en) 2012-03-15 2017-03-07 International Business Machines Corporation Vector find element not equal instruction
US9575753B2 (en) * 2012-03-15 2017-02-21 International Business Machines Corporation SIMD compare instruction using permute logic for distributed register files
US9268566B2 (en) 2012-03-15 2016-02-23 International Business Machines Corporation Character data match determination by loading registers at most up to memory block boundary and comparing
US9454366B2 (en) 2012-03-15 2016-09-27 International Business Machines Corporation Copying character data having a termination character from one memory location to another
US9317285B2 (en) 2012-04-30 2016-04-19 Apple Inc. Instruction set architecture mode dependent sub-size access of register with associated status indication
US8838997B2 (en) * 2012-09-28 2014-09-16 Intel Corporation Instruction set for message scheduling of SHA256 algorithm
US9268567B2 (en) 2012-09-30 2016-02-23 Intel Corporation Instruction and logic for boyer-moore search of text strings
US9804839B2 (en) 2012-12-28 2017-10-31 Intel Corporation Instruction for determining histograms
US20140281418A1 (en) * 2013-03-14 2014-09-18 Shihjong J. Kuo Multiple Data Element-To-Multiple Data Element Comparison Processors, Methods, Systems, and Instructions
US9207941B2 (en) * 2013-03-15 2015-12-08 Intel Corporation Systems, apparatuses, and methods for reducing the number of short integer multiplications
JP6160259B2 (ja) 2013-05-30 2017-07-12 富士通株式会社 文字列探索方法、文字列探索装置および文字列探索プログラム
US9606803B2 (en) * 2013-07-15 2017-03-28 Texas Instruments Incorporated Highly integrated scalable, flexible DSP megamodule architecture
US11113054B2 (en) 2013-09-10 2021-09-07 Oracle International Corporation Efficient hardware instructions for single instruction multiple data processors: fast fixed-length value compression
US9639369B2 (en) 2013-11-11 2017-05-02 Apple Inc. Split register file for operands of different sizes
US10191743B2 (en) 2013-12-29 2019-01-29 Intel Corporation Versatile packed data comparison processors, methods, systems, and instructions
US10133570B2 (en) 2014-09-19 2018-11-20 Intel Corporation Processors, methods, systems, and instructions to select and consolidate active data elements in a register under mask into a least significant portion of result, and to indicate a number of data elements consolidated
US9772848B2 (en) * 2014-11-14 2017-09-26 Intel Corporation Three-dimensional morton coordinate conversion processors, methods, systems, and instructions
US9891913B2 (en) * 2014-12-23 2018-02-13 Intel Corporation Method and apparatus for performing conflict detection using vector comparison operations
US10203955B2 (en) * 2014-12-31 2019-02-12 Intel Corporation Methods, apparatus, instructions and logic to provide vector packed tuple cross-comparison functionality
GB2546465B (en) * 2015-06-05 2018-02-28 Advanced Risc Mach Ltd Modal processing of program instructions
US10423411B2 (en) 2015-09-26 2019-09-24 Intel Corporation Data element comparison processors, methods, systems, and instructions
US9996361B2 (en) * 2015-12-23 2018-06-12 Intel Corporation Byte and nibble sort instructions that produce sorted destination register and destination index mapping
US11106467B2 (en) * 2016-04-28 2021-08-31 Microsoft Technology Licensing, Llc Incremental scheduler for out-of-order block ISA processors
CN106201440B (zh) * 2016-06-28 2018-10-23 上海兆芯集成电路有限公司 字符串比较指令优化的中央处理单元以及其操作方法
US20190155603A1 (en) * 2016-07-27 2019-05-23 Intel Corporation System and method for multiplexing vector compare
US10783102B2 (en) 2016-10-11 2020-09-22 Oracle International Corporation Dynamically configurable high performance database-aware hash engine
US10725947B2 (en) 2016-11-29 2020-07-28 Oracle International Corporation Bit vector gather row count calculation and handling in direct memory access engine
CN106649836B (zh) * 2016-12-29 2019-11-29 武汉新芯集成电路制造有限公司 一种基于硬件查找表的模式字符的查找方法
US10423191B2 (en) 2017-01-19 2019-09-24 International Business Machines Corporation Clock comparator sign control
US10564965B2 (en) 2017-03-03 2020-02-18 International Business Machines Corporation Compare string processing via inline decode-based micro-operations expansion
US10789069B2 (en) 2017-03-03 2020-09-29 International Business Machines Corporation Dynamically selecting version of instruction to be executed
US10324716B2 (en) 2017-03-03 2019-06-18 International Business Machines Corporation Selecting processing based on expected value of selected character
US10613862B2 (en) 2017-03-03 2020-04-07 International Business Machines Corporation String sequence operations with arbitrary terminators
US10255068B2 (en) 2017-03-03 2019-04-09 International Business Machines Corporation Dynamically selecting a memory boundary to be used in performing operations
US10620956B2 (en) 2017-03-03 2020-04-14 International Business Machines Corporation Search string processing via inline decode-based micro-operations expansion
US10564967B2 (en) 2017-03-03 2020-02-18 International Business Machines Corporation Move string processing via inline decode-based micro-operations expansion
US10678506B2 (en) * 2017-08-01 2020-06-09 Arm Limited Matching consecutive values in a data processing apparatus
US10223114B1 (en) * 2017-09-29 2019-03-05 Intel Corporation Fixed point to floating point conversion
CN107832058B (zh) * 2017-10-31 2022-01-18 北京小米移动软件有限公司 数据处理方法及装置
US10691457B1 (en) 2017-12-13 2020-06-23 Apple Inc. Register allocation using physical register file bypass
JP6705473B2 (ja) * 2018-06-22 2020-06-03 日本電気株式会社 演算装置及び演算システム
CN112631657B (zh) * 2019-09-24 2024-06-11 阿里巴巴集团控股有限公司 用于字符串处理的字节比较方法以及指令处理装置
CN111209041B (zh) * 2019-12-31 2022-05-17 Oppo广东移动通信有限公司 神经网络处理器、片上系统及电子设备
US11809558B2 (en) * 2020-09-25 2023-11-07 Advanced Micro Devices, Inc. Hardware security hardening for processor devices
GB2599652B (en) 2020-10-06 2023-01-18 Advanced Risc Mach Ltd Masked-vector-comparison instruction
US11880263B2 (en) 2021-05-13 2024-01-23 Meta Platforms, Inc. Systems having disaggregated components coupled by optical media
KR102370851B1 (ko) 2021-08-18 2022-03-07 주식회사 로그프레소 벡터 연산 명령어를 통해 문자열을 고속으로 추출하는 방법
CN114675890B (zh) * 2022-05-26 2022-09-23 飞腾信息技术有限公司 一种指令执行方法、装置、设备及存储介质

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1174353A (zh) * 1996-08-19 1998-02-25 三星电子株式会社 采用多个向量寄存器组的单指令多数据处理方法及其装置
CN1287311A (zh) * 1999-01-29 2001-03-14 国际商业机器公司 一种用组预测来降低在组相关高速缓存器中的执行时间的方法及设备
US20040078556A1 (en) * 2002-10-21 2004-04-22 Sun Microsystems, Inc. Method for rapid interpretation of results returned by a parallel compare instruction
CN1492314A (zh) * 1994-12-02 2004-04-28 ض� 可以对复合操作数进行压缩操作的微处理器
US20040267857A1 (en) * 2003-06-30 2004-12-30 Abel James C. SIMD integer multiply high with round and shift
CN1577249A (zh) * 2003-06-30 2005-02-09 英特尔公司 执行符号乘法运算的方法、装置和指令
CN1595389A (zh) * 1998-03-31 2005-03-16 英特尔公司 执行部分宽度压缩数据指令
CN1688966A (zh) * 2002-08-09 2005-10-26 英特尔公司 包括对准或者广播指令的多媒体协处理器控制机制

Family Cites Families (99)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4068299A (en) * 1973-12-13 1978-01-10 Honeywell Information Systems, Inc. Data processing system incorporating a logical compare instruction
JPS57170344A (en) 1981-04-09 1982-10-20 Fujitsu Ltd Paper jointer
JPS5856207A (ja) 1981-09-30 1983-04-02 Hitachi Ltd Ｒａｍ制御装置
JPH0232663B2 (ja) 1981-09-30 1990-07-23 Fujitsu Ltd Jokentsukihikakuenzansochi
JPS58106636A (ja) 1981-12-18 1983-06-25 Hitachi Ltd パイプライン演算装置
JPS617976A (ja) 1984-06-22 1986-01-14 Mitsubishi Electric Corp ベクトル演算処理装置
US5210833A (en) * 1985-11-08 1993-05-11 Nec Corporation System for selectively masking data in a branch address register and replacing the microinstruction address register by the masked data
JPH0731669B2 (ja) 1986-04-04 1995-04-10 株式会社日立製作所 ベクトル・プロセツサ
JPS6320628A (ja) * 1986-07-15 1988-01-28 Nec Corp 記号列グル−プ分類方式
JPH0743672B2 (ja) * 1987-02-18 1995-05-15 株式会社東芝 メモリ保護違反検出装置
JPH01271875A (ja) 1988-04-22 1989-10-30 Nec Corp ベクトル演算制御方式
JP2790466B2 (ja) 1988-10-18 1998-08-27 株式会社日立製作所 文字列検索方法及び装置
JPH0769811B2 (ja) * 1988-12-21 1995-07-31 松下電器産業株式会社 データ処理装置
US5125092A (en) * 1989-01-09 1992-06-23 International Business Machines Corporation Method and apparatus for providing multiple condition code fields to to allow pipelined instructions contention free access to separate condition codes
US5138669A (en) * 1990-06-29 1992-08-11 Hitachi, Ltd. Range-conditional character string retrieving method and system
CA2045773A1 (en) 1990-06-29 1991-12-30 Compaq Computer Corporation Byte-compare operation for high-performance processor
US5268995A (en) 1990-11-21 1993-12-07 Motorola, Inc. Method for executing graphics Z-compare and pixel merge instructions in a data processor
US5553309A (en) * 1991-11-08 1996-09-03 Japan Atomic Energy Research Institute Device for high speed evaluation of logical expressions and high speed vector operations
JP2665111B2 (ja) * 1992-06-18 1997-10-22 日本電気株式会社 ベクトル処理装置
JPH0617976A (ja) 1992-06-29 1994-01-25 Mitsubishi Plastics Ind Ltd メカニカル継手
US6131092A (en) 1992-08-07 2000-10-10 Masand; Brij System and method for identifying matches of query patterns to document text in a document textbase
JPH0696124A (ja) 1992-09-11 1994-04-08 Sumitomo Metal Ind Ltd 情報検索装置
JPH06162067A (ja) 1992-11-24 1994-06-10 Hitachi Ltd ベクトル命令制御装置および制御方法
GB2273377A (en) * 1992-12-11 1994-06-15 Hughes Aircraft Co Multiple masks for array processors
US5651121A (en) 1992-12-18 1997-07-22 Xerox Corporation Using mask operand obtained from composite operand to perform logic operation in parallel with composite operand
US5465374A (en) * 1993-01-12 1995-11-07 International Business Machines Corporation Processor for processing data string by byte-by-byte
US5519649A (en) * 1993-06-04 1996-05-21 Nippon Steel Corporation Micro-processor having rapid condition comparison function
JP3637922B2 (ja) 1993-06-14 2005-04-13 アップル コンピュータ インコーポレイテッド プロセッサにおけるさまざまな長さの文字列中のターミネーション文字を発見する方法および装置
JPH07114469A (ja) * 1993-10-18 1995-05-02 Mitsubishi Electric Corp データ処理装置
EP0681236B1 (en) 1994-05-05 2000-11-22 Conexant Systems, Inc. Space vector data path
IT1268611B1 (it) * 1994-09-30 1997-03-06 Finmeccanica Spa Coprocessore per riconoscimento caratteri
US5717952A (en) * 1994-11-16 1998-02-10 Apple Computer, Inc. DMA controller with mechanism for conditional action under control of status register, prespecified parameters, and condition field of channel command
US5724572A (en) * 1994-11-18 1998-03-03 International Business Machines Corporation Method and apparatus for processing null terminated character strings
US5819101A (en) * 1994-12-02 1998-10-06 Intel Corporation Method for packing a plurality of packed data elements in response to a pack instruction
US5634119A (en) * 1995-01-06 1997-05-27 International Business Machines Corporation Computer processing unit employing a separate millicode branch history table
JP2931890B2 (ja) * 1995-07-12 1999-08-09 三菱電機株式会社 データ処理装置
US7301541B2 (en) 1995-08-16 2007-11-27 Microunity Systems Engineering, Inc. Programmable processor and method with wide operations
CN103092563B (zh) 1995-08-31 2016-05-18 英特尔公司 控制移位分组数据的位校正的装置
US5884059A (en) 1996-01-26 1999-03-16 Advanced Micro Devices, Inc. Unified multi-function operation scheduler for out-of-order execution in a superscalar processor
US5907842A (en) * 1995-12-20 1999-05-25 Intel Corporation Method of sorting numbers to obtain maxima/minima values with ordering
US5991874A (en) * 1996-06-06 1999-11-23 Intel Corporation Conditional move using a compare instruction generating a condition field
JPH1056027A (ja) 1996-08-09 1998-02-24 Furukawa Electric Co Ltd:The 素子接合装置
US6058465A (en) 1996-08-19 2000-05-02 Nguyen; Le Trong Single-instruction-multiple-data processing in a multimedia signal processor
TW380237B (en) * 1996-09-23 2000-01-21 Advanced Risc Mach Ltd Data processing system register control
US6377970B1 (en) * 1998-03-31 2002-04-23 Intel Corporation Method and apparatus for computing a sum of packed data elements using SIMD multiply circuitry
GB2338094B (en) 1998-05-27 2003-05-28 Advanced Risc Mach Ltd Vector register addressing
JP5052713B2 (ja) 1998-10-09 2012-10-17 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 条件付き命令を備えるベクトルデータプロセッサ
US6292886B1 (en) 1998-10-12 2001-09-18 Intel Corporation Scalar hardware for performing SIMD operations
US6430557B1 (en) * 1998-12-16 2002-08-06 Xerox Corporation Identifying a group of words using modified query words obtained from successive suffix relationships
EP1197875B1 (en) 1998-12-16 2006-03-22 Matsushita Electric Industrial Co., Ltd. Conditional vector operation method and device thereof
US6282628B1 (en) 1999-02-24 2001-08-28 International Business Machines Corporation Method and system for a result code for a single-instruction multiple-data predicate compare operation
US6356951B1 (en) * 1999-03-01 2002-03-12 Sun Microsystems, Inc. System for parsing a packet for conformity with a predetermined protocol using mask and comparison values included in a parsing instruction
US6745336B1 (en) 1999-05-20 2004-06-01 Princeton University System and method of operand value based processor optimization by detecting a condition of pre-determined number of bits and selectively disabling pre-determined bit-fields by clock gating
US6470440B1 (en) 1999-05-20 2002-10-22 International Business Machines Corporation Vector compare and maximum/minimum generation apparatus and method therefor
GB2355084B (en) 1999-07-21 2004-04-28 Element 14 Ltd Setting condition values in a computer
US6421696B1 (en) 1999-08-17 2002-07-16 Advanced Micro Devices, Inc. System and method for high speed execution of Fast Fourier Transforms utilizing SIMD instructions on a general purpose processor
US6484255B1 (en) 1999-09-20 2002-11-19 Intel Corporation Selective writing of data elements from packed data based upon a mask using predication
JP2001282820A (ja) 2000-01-25 2001-10-12 Sony Corp データ圧縮方法、検索方法、検索装置、データパケット信号および記録媒体
US20050228595A1 (en) * 2001-05-25 2005-10-13 Cooke Laurence H Processors for multi-dimensional sequence comparisons
US7861071B2 (en) 2001-06-11 2010-12-28 Broadcom Corporation Conditional branch instruction capable of testing a plurality of indicators in a predicate register
US6986025B2 (en) * 2001-06-11 2006-01-10 Broadcom Corporation Conditional execution per lane
US20040054877A1 (en) * 2001-10-29 2004-03-18 Macy William W. Method and apparatus for shuffling data
US7631025B2 (en) * 2001-10-29 2009-12-08 Intel Corporation Method and apparatus for rearranging data between multiple registers
US20030167460A1 (en) 2002-02-26 2003-09-04 Desai Vipul Anil Processor instruction set simulation power estimation method
US6928605B2 (en) 2002-03-29 2005-08-09 Intel Corporation Add-compare-select accelerator using pre-compare-select-add operation
US7793084B1 (en) 2002-07-22 2010-09-07 Mimar Tibet Efficient handling of vector high-level language conditional constructs in a SIMD processor
WO2004015563A1 (en) 2002-08-09 2004-02-19 Intel Corporation Multimedia coprocessor control mechanism including alignment or broadcast instructions
JP3958662B2 (ja) 2002-09-25 2007-08-15 松下電器産業株式会社 プロセッサ
US7103756B2 (en) * 2002-09-30 2006-09-05 Hewlett-Packard Development Company, L.P. Data processor with individually writable register subword locations
JP2004145493A (ja) 2002-10-23 2004-05-20 Hiroshima Industrial Promotion Organization マッチング演算回路
JP3837386B2 (ja) * 2003-02-18 2006-10-25 誠 小川 情報処理装置
US7472258B2 (en) 2003-04-21 2008-12-30 International Business Machines Corporation Dynamically shared group completion table between multiple threads
US20040252547A1 (en) * 2003-06-06 2004-12-16 Chengpu Wang Concurrent Processing Memory
US7043518B2 (en) * 2003-07-31 2006-05-09 Cradle Technologies, Inc. Method and system for performing parallel integer multiply accumulate operations on packed data
CN100545804C (zh) * 2003-08-18 2009-09-30 上海海尔集成电路有限公司 一种基于cisc结构的微控制器及其指令集的实现方法
US7475393B2 (en) 2003-08-29 2009-01-06 Motorola, Inc. Method and apparatus for parallel computations with incomplete input operands
US7315935B1 (en) 2003-10-06 2008-01-01 Advanced Micro Devices, Inc. Apparatus and method for port arbitration in a register file on the basis of functional unit issue slots
GB2409064B (en) * 2003-12-09 2006-09-13 Advanced Risc Mach Ltd A data processing apparatus and method for performing in parallel a data processing operation on data elements
GB2409067B (en) 2003-12-09 2006-12-13 Advanced Risc Mach Ltd Endianess compensation within a SIMD data processing system
GB2409065B (en) * 2003-12-09 2006-10-25 Advanced Risc Mach Ltd Multiplexing operations in SIMD processing
GB2409062C (en) * 2003-12-09 2007-12-11 Advanced Risc Mach Ltd Aliasing data processing registers
GB2411975B (en) 2003-12-09 2006-10-04 Advanced Risc Mach Ltd Data processing apparatus and method for performing arithmetic operations in SIMD data processing
US6915300B1 (en) 2003-12-19 2005-07-05 Xerox Corporation Method and system for searching indexed string containing a search string
CN1297888C (zh) * 2004-03-03 2007-01-31 浙江大学 32位媒体数字信号处理器
JP4129981B2 (ja) * 2004-04-02 2008-08-06 インターナショナル・ビジネス・マシーンズ・コーポレーション コンパイラ、コンパイラプログラム、記録媒体、制御方法、及び中央処理装置
US20050251644A1 (en) 2004-05-06 2005-11-10 Monier Maher Physics processing unit instruction set architecture
GB2414308B (en) * 2004-05-17 2007-08-15 Advanced Risc Mach Ltd Program instruction compression
US7284092B2 (en) 2004-06-24 2007-10-16 International Business Machines Corporation Digital data processing apparatus having multi-level register file
EP1622009A1 (en) 2004-07-27 2006-02-01 Texas Instruments Incorporated JSM architecture and systems
US7434034B2 (en) * 2004-09-13 2008-10-07 Ati Technologies Inc. SIMD processor executing min/max instructions
US7237094B2 (en) * 2004-10-14 2007-06-26 International Business Machines Corporation Instruction group formation and mechanism for SMT dispatch
US20060101256A1 (en) 2004-10-20 2006-05-11 Dwyer Michael K Looping instructions for a single instruction, multiple data execution engine
US7565514B2 (en) * 2006-04-28 2009-07-21 Freescale Semiconductor, Inc. Parallel condition code generation for SIMD operations
US7676647B2 (en) 2006-08-18 2010-03-09 Qualcomm Incorporated System and method of processing data using scalar/vector instructions
US9069547B2 (en) 2006-09-22 2015-06-30 Intel Corporation Instruction and logic for processing text strings
US7536532B2 (en) * 2006-09-27 2009-05-19 International Business Machines Corporation Merge operations of data arrays based on SIMD instructions
US20140280271A1 (en) 2013-03-15 2014-09-18 Intel Corporation Instruction and logic for processing text strings
JP6329412B2 (ja) * 2014-03-26 2018-05-23 株式会社メガチップス Ｓｉｍｄプロセッサ
JP6162067B2 (ja) 2014-03-27 2017-07-12 東レ株式会社 繊維製品の処理装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1492314A (zh) * 1994-12-02 2004-04-28 ض� 可以对复合操作数进行压缩操作的微处理器
CN1174353A (zh) * 1996-08-19 1998-02-25 三星电子株式会社 采用多个向量寄存器组的单指令多数据处理方法及其装置
CN1595389A (zh) * 1998-03-31 2005-03-16 英特尔公司 执行部分宽度压缩数据指令
CN1287311A (zh) * 1999-01-29 2001-03-14 国际商业机器公司 一种用组预测来降低在组相关高速缓存器中的执行时间的方法及设备
CN1688966A (zh) * 2002-08-09 2005-10-26 英特尔公司 包括对准或者广播指令的多媒体协处理器控制机制
US20040078556A1 (en) * 2002-10-21 2004-04-22 Sun Microsystems, Inc. Method for rapid interpretation of results returned by a parallel compare instruction
US20040267857A1 (en) * 2003-06-30 2004-12-30 Abel James C. SIMD integer multiply high with round and shift
CN1577249A (zh) * 2003-06-30 2005-02-09 英特尔公司 执行符号乘法运算的方法、装置和指令

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
严伟, 龚幼民: "高性能数字信号处理器的设计", 微处理机, no. 04, 30 August 2004 (2004-08-30) *
唐明哲, 邵志标, 赵宁, 许琪: "32位浮点嵌入式MCU设计研究", 微电子学与计算机, no. 07, 20 August 2004 (2004-08-20) *

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