CN114746583A - Strip for circuit with rose gold contact pads and method for manufacturing the strip - Google Patents

Strip for circuit with rose gold contact pads and method for manufacturing the strip Download PDF

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Publication number
CN114746583A
CN114746583A CN202080083794.6A CN202080083794A CN114746583A CN 114746583 A CN114746583 A CN 114746583A CN 202080083794 A CN202080083794 A CN 202080083794A CN 114746583 A CN114746583 A CN 114746583A
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China
Prior art keywords
layer
gold
copper
copper alloy
alloy layer
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CN202080083794.6A
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Chinese (zh)
Inventor
弗洛里安·万诺
斯蒂芬尼·柯奎拉德
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Linxens Holding SAS
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Linxens Holding SAS
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Priority claimed from EP20168312.5A external-priority patent/EP3892759B1/en
Application filed by Linxens Holding SAS filed Critical Linxens Holding SAS
Publication of CN114746583A publication Critical patent/CN114746583A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743External electrical contacts
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00Etching metallic material by chemical means
    • C23F1/02Local etching
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/56Electroplating: Baths therefor from solutions of alloys
    • C25D3/62Electroplating: Baths therefor from solutions of alloys containing more than 50% by weight of gold
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • C25D5/022Electroplating of selected surface areas using masking means
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • C25D5/12Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/54Electroplating of non-metallic surfaces
    • C25D5/56Electroplating of non-metallic surfaces of plastics
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/627Electroplating characterised by the visual appearance of the layers, e.g. colour, brightness or mat appearance
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07718Constructional details, e.g. mounting of circuits in the carrier the record carrier being manufactured in a continuous process, e.g. using endless rolls

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Electrochemistry (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

A strip for manufacturing a circuit having electrical contact pads, the strip comprising: -a flexible dielectric substrate (4), -a copper foil (10), said copper foil (10) at least partially covering said dielectric substrate (4), said copper foil (10) having an inner face (18) facing said dielectric substrate (4) and an outer face (19) opposite to said inner face (18), -an intermediate layer comprising at least a nickel-based layer at least partially covering said outer face (19) of said copper foil (10), a gold-copper alloy layer (13) being deposited on said intermediate layer. A method of manufacturing a circuit, the method comprising providing a strip having conductive pads, and plating the pads with a gold-copper alloy layer electrodeposited from an electrodeposition solution.

Description

Strip for a circuit having rose gold contact pads and method of making the strip
Technical Field
The invention relates to a circuit with contact pads. For example, the circuit is used to manufacture a smart card module comprising electrical contact pads designed to be connected to a connector of a smart card reader (the smart card is used for e.g. banking applications and identification documents).
Background
A connector module for smart cards comprises a dielectric substrate bearing electrical contact pads (see for example document WO2019051712a 1). Electrical contact pads are etched (by, for example, photolithographic and etching techniques) in a conductive layer supported by a flexible dielectric substrate. Alternatively, the electrical contact pads are cut in the conductive layer and then co-laminated to the flexible dielectric substrate (by, for example, lead frame technology). In both cases, the contact pads supported by the dielectric substrate are made as flexible strips. More generally, such flexible strips with electrical circuits can be used to make electrical contacts for connectors for memory keys (memory keys) or magnetic disks and the like. Accordingly, particular attention is directed to circuits made in connection with the field of the invention that are intended to be at least partially visible during ordinary use.
The invention is illustrated below by using an example of a circuit intended to form contacts of a smart card connector, but this example should not be understood as limiting, since in general the deposition process described below can be applied to any type of metallic conductive support.
In the field of smart cards, card manufacturers desire that the color of the card body match the color of the card module. For example, electrical contact pads having a so-called "rose gold" color (i.e., pink gold) on the visible face of the module may be desirable for aesthetic and/or customization purposes. However, producing electrical contact pads with new colors must not make their quality questionable, for example in terms of contact resistance, weather resistance (resistance to corrosion tests), corrosion resistance, fatigue resistance, etc. The colored contact pads must meet the requirements of the current standards and specifications for the intended application.
It is an object of the invention to obtain an electrical circuit comprising conductive tracks or pads with visible rose-gold colour on the finished product, while maintaining electrical and mechanical characteristics suitable for its use as contacts intended for electrical connection with a connector, in particular during many cycles of connection and disconnection.
Disclosure of Invention
This object is at least partly achieved by a strip according to claim 1 and a method according to claim 12. Further features of the strip and the method are set forth in the dependent claims, which should be considered independently of each other or in combination with one or more further features.
In order to provide an electrical contact pad having a "rose gold" colour which meets the strict specifications in terms of contact resistance, weather resistance, corrosion resistance, fatigue resistance, etc., the electrical contact pad is coated with at least one metal layer consisting of a gold-copper alloy having a specific copper content and a specific thickness, the at least one metal layer being deposited by means of an electrodeposition process.
Drawings
Other characteristics, aims and advantages of the above-described strip and method will appear on reading the following detailed description and with reference to the accompanying drawings, given by way of non-limiting example, in which:
fig. 1 schematically shows a perspective view of a smart card comprising an example of a module with a circuit made of a strip according to the invention.
Fig. 2 schematically shows a top view of a portion of a strip according to the invention;
FIG. 3 schematically shows a cross-sectional view of an example of a stack of layers that can be obtained by a method according to the invention;
fig. 4a to 4k schematically represent the steps of an implementation example of the method according to the invention.
Detailed Description
The following describes a disclosed example of a circuit made from a strip according to the present invention. This example is taken from the field of smart cards, but a person skilled in the art will be able to transfer this example to other circuit applications without involving the inventive step. In particular, the invention is particularly beneficial in cases where the use of all pink conductive contacts or traces can bring aesthetic added value (for example, connectors for SD memory cards or USB memory disks).
As shown in fig. 1, a smart card 1 comprises a module 2, for example with a connector 3. The modules 2 are typically made in the form of individual elements cut from a strip. This element is inserted into a cavity formed in the card 1. The element comprises a substantially flexible substrate 4 (see fig. 2) made of polyethylene terephthalate (PET), glass-epoxy (glass-epoxy) or the like, on which substrate 4 connectors 3 are made, after which the chip is connected to the connectors 3 (not shown).
Fig. 2 shows an example of a circuit portion. The circuit portion is a printed circuit 5 having six connectors 3. Each connector 3 comprises eight electrical contact pads 6 (connector 3 is essentially a module 2 without a chip, without connections between the chip and contact pads 6 and without encapsulation resin for protecting the chip and the connections). The contact pads 6 are cut (e.g. stamped or etched) from the conductive sheet 10.
Fig. 3 shows a schematic cross-section of an example of a multilayer structure forming a strip for manufacturing the connector 3. The multilayer structure comprises a substrate 4, an adhesive layer 9, a conductive sheet 10 (made of, for example, copper or a copper alloy) and a stack of more or less layers A, B and/or C, and a gold copper layer 13.
The conductive sheet 10 has an inner surface 18 facing the dielectric substrate 4 and an outer surface 19 facing the inner surface 18. More specifically, the conductive sheet 10 has an inner face 18 that is attached (e.g., glued or laminated with an adhesive layer) to the dielectric substrate 4. The inner face 18 is exposed at the bottom of the blind hole 14. The blind holes 14 are intended to establish electrical connections (by, for example, wire bonding techniques) with a chip that may be accommodated in the cavity 15. The outer face 19 corresponds to a contact surface intended to establish an electrical connection with another connector. The deposition layers A, B, C on the inner face 18 and the outer face 19, respectively, need not be of the same type and need not have the same thickness.
The following table shows possible layer stacks:
conductive sheet 10 A B C 13
Copper (Cu) Nickel (II) Gold (flash plating) Gold copper
Copper (Cu) Nickel (II) Nickel alloy Gold (flash plating) Gold copper
Copper (Cu) Lustrous nickel Nickel alloy Gold (flash plating) Gold copper
Copper (Cu) Nickel (II) Lustrous nickel Gold (flash plating) Gold copper
Copper (Cu) Nickel alloy Gold (flash plating) Gold copper
Copper (Cu) Lustrous copper Nickel (II) Gold (flash plating) Gold copper
Copper (Cu) Copper-tin alloy Gold (flash plating) Gold copper
The presence of a shine layer (shiny layer) under the gold-copper alloy layer 13 (under does not necessarily mean under contact with the gold-copper alloy layer 13) results in a brighter appearance and a stronger pink color of the upper surface. The glossy bottom layer may be obtained by plating, for example, copper and/or nickel and/or a nickel alloy on the conductive sheet 10, and the conductive sheet 10 may have been made of copper or a copper alloy. Alternatively, a glossy appearance may be obtained by subjecting at least one under-layer selected from the series consisting of copper, nickel alloys and copper-tin alloys to a polishing and/or electropolishing treatment.
For example, according to the process of the sixth row of the above table, the conductive sheet 10 is a copper sheet. A plated layer a of copper is deposited on at least a portion of the free surface of the copper sheet (the other surface being attached to the dielectric substrate). The copper plating layer a allows to reduce the roughness of the pad surface (i.e. the free surface of the layer of copper-gold alloy) in the finished product. For example, the roughness is equal to or close to 0.45 ± 0.15 microns (Rz measurement). In the case of the electroplated layer A of copper without electrodeposition, the roughness of the top surface is equal to or close to 0.90. + -. 0.20 microns (Rz measurement).
The roughness of the gloss layer deposited under the copper-gold alloy layer is the roughness average of the free surface of the copper-gold alloy layer divided by 2. This allows a semi-gloss finish to be obtained on the pad surface, rather than a matte finish of the bottom gloss layer (the bottom is not meant to be underneath contact with the gold copper alloy layer 13).
The gold layer C is optional. When deposited, the gold layer C is in the form of a "flash", i.e. electrodeposited to a thickness between 0 and 15 nm.
When selective masking of the inner face 18 is not envisaged, in particular when depositing the gold-copper alloy layer 13, a thin gold layer C is advantageously deposited on the inner face 18 in the blind hole 14 before depositing the gold-copper alloy layer 13, so as to increase the tensile strength of the wire bonded to this inner face 18.
Fig. 4a to 4k schematically show steps of an example of a manufacturing method for a strip as shown in fig. 2.
These steps may be performed by a roll-to-roll process, including:
providing a dielectric substrate 4 (fig. 4a) made of, for example, epoxy-glass (epoxy-glass), or polyimide (polyimide), or PET, etc.;
coating the face of the substrate 4 with an adhesive layer 9 (fig. 4 b);
punching the substrate 4 with the adhesive layer 9 to form the holes 14 and possibly the cavities 15, in which cavities 15 the chips can be housed (acommed) at a later stage (fig. 4 c);
co-laminating the substrate 4 provided with the adhesive layer 9 with a sheet 10 of conductive material (e.g. copper sheet), heating the composite thus obtained to effect thermal crosslinking of the adhesive layer 9, and then deoxygenating the composite thus obtained (fig. 4 d); the hole 14 is now a blind hole 14;
laminating a dry photosensitive film 16 on the outer face 19 of the conductive sheet 10 (fig. 4 e);
exposing the photosensitive film 16 through a mask (figure 4f),
developing the photosensitive film 16 (fig. 4 g);
etching the conductive sheet 10 in the areas not protected by the photosensitive film 16 to set the conductive tracks and/or contact pads 6 (figure 4h),
removing the photosensitive film 16 (fig. 4 i);
-electrodepositing a conductive layer on at least some of the traces and/or some of the contact pads 6 obtained after etching the conductive sheet 10; the electrodeposition may be performed in one or more steps to form a layer stack as described above in connection with fig. 3; for example, the stack comprises a nickel layer 11 and a gold layer 12 (fig. 4 j); for example, a nickel layer 11 with a thickness of 2 microns is deposited on the outer face 19 and a nickel layer 11 with a thickness of 5 microns is deposited on the inner face 18; and a gold layer 12 having a thickness of less than 15 nm is deposited on the outer face 19 and a gold layer 12 having a thickness of 0.3 micron is deposited on the inner face 18.
Electrodepositing a gold copper layer 13 to form a surface layer having a gold pink color (fig. 4 k); for example, a layer of copper gold 13 is deposited on the outer face 19 at a thickness of 0.1 microns or more; for example, the copper content in the gold-copper alloy layer 13 is less than 40% Wt, preferably less than or equal to 35% Wt, more preferably less than or equal to 30% Wt, for example between 10% Wt and 20% Wt.
At least during the deposition of the layer of bronze 13, the inner face 18 can be protected, for example by selective masking (i.e. the face intended to be invisible on the finished product is not covered by the layer of bronze 13). Only a gold layer 12 and/or a nickel layer and/or a further alloy layer 11 covers the inner side 18 in the blind hole 14. Thus, the packaging process for connecting the chips remains unchanged compared to the standard process.
The electrodeposition of the gold copper layer 13 to form a rose gold surface layer will be carried out by a specific deposition of a two-component alloy, wherein the electroplating bath of the electrolyte comprises:
omicron gold cyanide complexes, e.g. of gold KAu (CN)2Or KAu (CN)4
O. a cyanide complex of copper, e.g. with K3Cu(CN)4
For example, the gold concentration in the plating bath is between 0.6 grams and 1.0 grams per liter, and the copper concentration in the plating bath is between 0.6 grams and 0.8 grams per liter. The plating bath has a pH between 11 and 13. The temperature of the plating bath is controlled between 50 ℃ and 60 ℃. In the case of a cathode output of about 5 mg/min to 15 mg/min, the current density in the plating bath and the speed of the strip are adjusted according to the available length of the plating bath to obtain a target thickness.
Advantageously, the electroplating bath does not comprise any other metal compounds (based on zinc, nickel, silver or others) during the deposition of the copper-gold alloy.
The color of gold is usually calibrated according to the Swiss standard "1-5N", ranging from a specific yellowish to pink gold alloy. The process disclosed above makes it possible to obtain a pink color outside this range, i.e. a color of 5N + + (i.e. a more intense pink color). The entire surface of the contact pad 6 is rose gold. Alternatively, only a portion of the surface may be colored (e.g., for a logo) using masking and/or etching techniques.
For example, for the layer structure (copper sheet 10/nickel alloy/gold (flash plating)/copper-gold alloy) corresponding to the second row of the table above, the pink colour obtained using the process according to the invention has the following colorimetric parameters:
-L*=63±1,
-a ═ 7.1 ± 0.3, and
-b*=6.9±0.3。
the product properties are summarized in the following table:
Figure BDA0003676421200000071
furthermore, the visual appearance after weathering test of the gold copper layer 13 mentioned in the above table can be improved by top surface protection. This protection can be obtained, for example, by immersing the metal surface in a solution containing a thiol compound (e.g., 1-dodecanethiol).
As an alternative to the above-described method, a lead frame technique may be performed to manufacture the strip. The conductive layer 10 may then be plated with a gold copper layer 13 before or after the conductive layer 10 is co-laminated with the dielectric substrate 4.

Claims (16)

1. Strip for manufacturing an electrical circuit (5) with electrical contact pads (6), the strip comprising:
-a flexible dielectric substrate (4),
-a copper foil (10) at least partially covering the dielectric substrate (4) and comprising electrical contact pads (6) cut in the copper foil (10), the copper foil (10) having an inner face (18) attached to the dielectric substrate (4) and an outer face (19) opposite the inner face (18),
-an intermediate layer comprising at least a nickel-based layer (11) at least partially covering the outer face (19) of the copper foil (10),
characterized in that a gold-copper alloy layer (13) is deposited on the intermediate layer and the intermediate layer comprises a thin gold layer (12) having a thickness less than or equal to 15 nm and at least partially covering the nickel base layer (11), the gold-copper alloy layer (13) being deposited on the thin gold layer (12), the copper content in the gold-copper alloy layer (13) being greater than 10% Wt.
2. Strip according to claim 1, wherein the copper content in the gold-copper alloy layer (13) is less than 40% Wt.
3. Strip according to claim 2, wherein the copper content in the gold-copper alloy layer (13) is less than 30% Wt.
4. A strip according to claim 3, wherein the copper content in the gold-copper alloy layer (13) is less than 20% Wt.
5. Strip according to any one of the preceding claims, wherein the thickness of the gold-copper alloy layer (13) is greater than or equal to 0.1 micrometer.
6. Strip according to any one of the preceding claims, comprising a blind hole (14) formed by the copper foil (10), the copper foil (10) at least partially covering a hole made through the dielectric substrate (4), the blind hole (14) having a bottom surface corresponding to the inner face (18) of the copper foil (10), the bottom surface not being covered by a gold-copper alloy layer (13).
7. Strip according to any one of claims 1 to 5, comprising a blind hole (14) formed by the copper foil (10), the copper foil (10) at least partially covering a hole made through the dielectric substrate (4), the blind hole (14) having a bottom surface corresponding to the inner face (18) of the copper foil (10), the bottom surface being covered by several layers including at least a thin gold layer on which the gold-copper alloy layer (13) is deposited and a gold-copper alloy layer (13) having a thickness less than or equal to 15 nanometers.
8. Strip according to any one of the preceding claims, wherein the gold-copper alloy layer (13) is at least partially covered by a protective layer comprising a thiol compound.
9. Strip according to any one of the preceding claims, comprising a gloss layer below the gold-copper alloy layer (13).
10. The strip according to claim 9, wherein the gloss layer is an electroplated layer of a metal selected from the series comprising copper, nickel and nickel alloys.
11. The tape according to claim 9, wherein the gloss layer is the copper foil (10) polished or electropolished.
12. Method for producing an electric circuit (5) comprising
-providing a strip of flexible dielectric substrate (4) comprising supporting conductive pads (6), and
-plating the pad (6) with an intermediate layer comprising at least a nickel based layer (11),
characterized in that the method further comprises electrodepositing a gold-copper alloy layer (13) on the intermediate layer from an electrodeposition solution, the intermediate layer comprising a thin gold layer (12) having a thickness of 15 nm or less and the thin gold layer (12) at least partially covering the nickel-based layer (11), the gold-copper alloy layer (13) being deposited on the thin gold layer (12), the copper content (13) in the gold-copper alloy layer being greater than 10% Wt.
13. The method of claim 12, wherein the electrodeposition solution comprises a gold cyanide complex and a copper cyanide complex.
14. The method of claim 12, wherein the electrodeposition solution does not include a cyanide compound.
15. The method according to claims 12 to 14, comprising electroplating a gloss layer of a metal selected from the series comprising copper, nickel and nickel alloys, below the gold-copper alloy layer (13).
16. The method according to claims 12 to 14, comprising polishing or electropolishing the copper foil making up the conductive pad (6) prior to the electrodeposition of the gold-copper alloy (13).
CN202080083794.6A 2019-12-03 2020-12-03 Strip for circuit with rose gold contact pads and method for manufacturing the strip Pending CN114746583A (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
EP19315157.8 2019-12-03
EP19315157 2019-12-03
EP20168312.5 2020-04-06
EP20168312.5A EP3892759B1 (en) 2020-04-06 2020-04-06 Tape for electrical circuits with rose-gold contact pads and method for manufacturing such a tape
PCT/EP2020/084537 WO2021110872A1 (en) 2019-12-03 2020-12-03 Tape for electrical circuits with rose-gold contact pads and method for manufacturing such a tape

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KR20230114877A (en) * 2022-01-26 2023-08-02 엘지이노텍 주식회사 Smart ic substrate, smart ic module and ic card including the same

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FR2997550B1 (en) * 2012-10-26 2016-01-22 Linxens Holding ELECTRICAL CIRCUIT, ELECTRONIC MODULE FOR A CHIP CARD COMPRISING ON THIS ELECTRIC CIRCUIT AND METHOD FOR PRODUCING SUCH ELECTRIC CIRCUIT.
DE102013109400A1 (en) * 2013-08-29 2015-03-05 Harting Kgaa Contact element with gold coating
WO2019051712A1 (en) 2017-09-14 2019-03-21 Apply Card Technology Limited Methods of manufacturing ic card circuit board substrates and ic cards

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