CN115349034A - Method for the electrodeposition of a grey or black layer on an electric circuit, and electric circuit for an electronic module of a chip card comprising such a layer - Google Patents
Method for the electrodeposition of a grey or black layer on an electric circuit, and electric circuit for an electronic module of a chip card comprising such a layer Download PDFInfo
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- CN115349034A CN115349034A CN202180023777.8A CN202180023777A CN115349034A CN 115349034 A CN115349034 A CN 115349034A CN 202180023777 A CN202180023777 A CN 202180023777A CN 115349034 A CN115349034 A CN 115349034A
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/50—Electroplating: Baths therefor from solutions of platinum group metals
- C25D3/52—Electroplating: Baths therefor from solutions of platinum group metals characterised by the organic bath constituents used
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
- C25D5/12—Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07743—External electrical contacts
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07718—Constructional details, e.g. mounting of circuits in the carrier the record carrier being manufactured in a continuous process, e.g. using endless rolls
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- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Electroplating Methods And Accessories (AREA)
- Laminated Bodies (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
The invention relates to a method for the electrodeposition of a grey or black layer on an electrical circuit. The circuit is, for example, a circuit of the printed circuit type used for producing modules intended to be integrated in a card, such as a chip card. The module includes electrical contact pads, or connectors (3), for connecting the chip to and communicating with the read/write system. In order to impart a black or near-black color to the electrical contact, the electrical contact is at least partially covered with a surface layer (13) comprising ruthenium. The surface layer is electrodeposited from an electroplating bath containing at least ruthenium and a kinetic inhibitor of the deposition. The invention also relates to a circuit produced using said method.
Description
Technical Field
The present invention relates to the field of electrical circuits comprising surfaces intended to establish a low-resistance electrical contact with a connector.
For example, the circuit made according to the invention may be an etched printed circuit or a circuit comprising one or more lead frames consisting of a sheet of conductive material cut out and co-laminated with an insulating substrate. The circuit is used for producing, for example, connector contacts, contacts of an electronic module, such as a chip card, contacts of a memory stick (USB stick or other), etc. More particularly, the circuit made according to the invention is particularly advantageous when it is intended that it is at least partially visible during its current use.
The invention is illustrated below using an example of a circuit intended to form the contacts of a connector of a chip card, but this example is not to be understood as limiting, since in general the deposition method described below can be applied to any type of metallic conductive base.
Prior Art
For example, if chip cards are taken as an example, these chip cards are generally composed of a rigid substrate, made for example of plastic, which constitutes the main part of the card, and into which a separately manufactured electronic module is incorporated. The electronic module comprises a substantially flexible printed circuit provided with a chip (integrated circuit) and means for connecting the chip to a device capable of reading data from and/or writing data to the chip. For example, these connection means-or connectors-are contacts constituted by conductive metal tracks which are flush with the electronic module at the surface of the card substrate. In addition to the need for good electrical conductivity between the chip and the contacts, and between the contacts and the read/write device, on the one hand, chip card manufacturers desire that the contacts be color matched to one or more colors of the card, on the other hand. For this purpose, the contacts are usually covered either with a layer of gold to obtain a gold finish, or with a layer of silver or palladium to obtain a silver finish.
To obtain more colours, the method described in document US6259035B1 can be used. The method is based on the use of gold-based, palladium-based or silver-based solutions, thereby obtaining a broader color spectrum (spectra). However, this type of method does not allow to obtain certain colors, in particular black or colors close to black. Document WO2014064278A1 discloses a process in which the black colour is obtained from a layer containing ruthenium (ruthenium) co-deposited with thiourea. However, thiourea is an organic molecule that oxidizes in the deposited layer and reduces corrosion resistance. The obtained layer does not provide a fully satisfactory corrosion resistance. In contrast, document FR3074193A1 discloses a process which makes it possible to obtain contacts for chip cards on which a layer substantially containing rhodium (rhodium) is deposited, which has satisfactory corrosion resistance. However, the color obtained is white or a color close to white.
The aim of the present invention is to obtain a printed circuit comprising conductive tracks of black or near-black colour which are visible on the finished product, while maintaining suitable electrical and mechanical properties for the contacts intended to be electrically connected to the connector, in particular during the use of frequent repeated connections and disconnections.
Disclosure of Invention
For this purpose, methods for the electrodeposition of grey or black layers on circuits are proposed. As mentioned above, the method can be used in particular for producing modules for chip cards. The method includes providing a dielectric substrate having a sheet of conductive material disposed thereon. For example, the substrate is an epoxy glass substrate and the sheet of conductive material is made of copper or a copper alloy.
Advantageously, the assembly comprising the substrate and the sheet of conductive material is flexible (which makes it possible to use the assembly in a reel-to-reel or roll-to-roll process). The sheet of conductive material may be attached to the dielectric substrate with (adhesive bonding and lamination) or without (e.g., heat lamination) a layer of adhesive material between the sheet of conductive material and the dielectric substrate. The sheet of conductive material includes at least one electrical contact. The electrical contact has an inner face facing the dielectric substrate and an outer face opposite the inner face. The outer face has a contact face intended to establish an electrical connection with the connector. One or more contacts may be made in the sheet of conductive material before (e.g., in the case of using the lead frame techniques described above) or after (e.g., using photolithographic techniques) the sheet of conductive material is transferred to the dielectric substrate.
The method also includes electrochemically depositing at least one layer of conductive material on the sheet of conductive material. The deposition may be performed before or after transferring the sheet of conductive material onto the dielectric substrate. The one or more layers of conductive material so deposited on the sheet of conductive material include a surface layer that covers at least a region of the contact face of the at least one electrical contact. Thus, the sheet of conductive material may comprise one or more electrochemically deposited metallization layers that underlie the electrochemically deposited surface layer. The metallization layer or layers is for example a nickel layer, a gold layer, a silver layer, a palladium layer or an alloy layer of nickel, gold, silver or palladium.
The surface layer is electrochemically deposited from a plating bath containing at least ruthenium and an inhibitor of electrochemical kinetics of surface layer deposition. The inhibitor acts to slow down the electrochemical kinetics of the deposition. By definition, electrochemical kinetics are related to redox reactions at the interface between the electrode and the electrolyte. The redox reaction only leads to deposition or degradation. In the present case, it is the deposition kinetics that are affected by the inhibitor.
In the present context, the expression "deposition of ruthenium" refers not only to the deposition of metallic ruthenium but also to the deposition of other compounds containing ruthenium and in particular to the deposition of ruthenium oxides or ruthenium chlorides.
The inhibitor acts to slow down the deposition of ruthenium and to alter the surface topography of the deposition. Thus, the reflection of light is changed, which also affects the perception of black.
The metallic ruthenium has very good conductivity (13.7X 10) 6 S·m -1 ). Ruthenium dioxide has a black appearance. The presence of ruthenium and ruthenium oxide in the surface layer makes it possible to obtain a black surface layer and a lower contact resistance.
Thus, a surface layer is obtained having both the intended black (or near black) and conductivity, which conductivity is suitable for a good connection to be achieved via contact between the surface layer and a reader, e.g. a connector of a read/write device for a chip card.
The method of electrodeposition of a grey or black layer on an electrical circuit potentially includes one or other of the following features, each considered independently of the others or in combination with one or more other features:
the thickness of the surface layer is advantageously between 5 nm and 3 μm. A minimum thickness of 25 nm helps to obtain a uniformly dark color (black or near black); in the case of ruthenium thicknesses of less than 25 nm, iridescent effects (iridescent effects) can be obtained; conversely, there is little or no advantage in depositing ruthenium over 3 microns on a conductive layer;
the electrochemically kinetic inhibitor of the surface layer deposition does not co-deposit with ruthenium; thus, it does not itself produce black particles directly as some sulfur compounds do (see below);
-the electrochemically kinetic inhibitor of the surface layer deposition is an organic molecule; for example, it contains amines with carboxyl functionality; for example, the carboxylic acid amine is N-carboxymethyliminobis (ethylenenitrile) tetraacetic acid (N-carboxymethylethyleneimine) tetraacetic acid;
-carrying out at least one step of cleaning the surface layer containing electrodeposited ruthenium in an alkaline solution; electrochemical deposition of the surface layer in an acid bath; the cleaning step significantly improves the corrosion resistance of the electrodeposited ruthenium containing surface layer (this step makes it possible to better remove and/or neutralize the acidic compounds trapped in the deposited surface layer);
-the step of electrochemically depositing at least one layer of electrically conductive material on the sheet of electrically conductive material comprises, before depositing the surface layer, depositing at least one layer located below the surface layer, the at least one layer being at least one of the following materials: copper, nickel alloys, gold, silver, palladium, and white bronze (white bronze);
at least one of the layer comprising the sheet of conductive material and the layer underlying the surface layer is a glossy layer; for example, the conductive material sheet is a copper sheet or a copper alloy sheet, the surface of which is glossy (made glossy by manufacturing or made glossy after manufacturing);
-performing a step of polishing or electropolishing at least one layer to form a glossy layer, the at least one layer being one of the following materials: copper, nickel alloys and white bronze;
alternatively, at least one step of gloss deposition of at least one layer is carried out, the at least one layer being one of the following materials: copper, nickel alloys, and white bronze.
The invention also relates to a circuit, in particular for producing a module of a chip card, comprising:
-a flexible dielectric substrate;
-a sheet of copper-based electrically conductive material on a dielectric substrate, the sheet of electrically conductive material comprising at least one electrical contact having an inner face directed towards the dielectric substrate and an outer face opposite the inner face, the outer face having a contact face intended to establish an electrical connection with a connector,
-at least one layer of electrically conductive material, the at least one layer of electrically conductive material being located directly on the sheet of electrically conductive material, the layer of electrically conductive material comprising a potentially glossy base layer and a surface layer, the base layer comprising at least one of the following materials: copper, nickel alloys, gold, silver, palladium and white bronze, the surface layer being electrochemically deposited on the base layer and covering at least one region of the contact surface of at least one electrical contact.
In this circuit, the surface layer is made using an electrodeposition method of a gray layer or a black layer, as described above.
Brief description of the drawings
Other characteristics, objects and advantages of the above-described circuit will become apparent upon reading the following detailed description and upon reference to the accompanying drawings, given by way of non-limiting example and in which:
fig. 1 shows schematically and perspectively a chip card comprising an example of a module with a circuit according to the invention;
fig. 2 schematically shows a part of a circuit according to the invention, as seen from above;
fig. 3 shows schematically and in cross-section an example of a layer stack obtainable by the method according to the invention;
fig. 4a to 4k schematically show the steps of an implementation example of the method according to the invention.
Detailed Description
An example of an embodiment of a circuit according to the invention is described below. This example is taken from the field of chip cards, but a person skilled in the art will be able to transfer it to other applications of circuits without applying the inventive skills. It should be noted that the invention is particularly advantageous in all cases of producing black contacts or black conductive traces for SD memory cards or USB sticks, for example, to bring additional aesthetic value.
As shown in fig. 1, for example, a chip card 1 comprises a module 2 with a connector 3. The module 2 is essentially made in the form of a separate element inserted into a cavity made in the card 1. The element comprises a substantially flexible substrate 4 (see fig. 2) made of PET, epoxy glass or the like, on which substrate 4a connector 3 is made, a chip (not shown) being subsequently connected to the connector 3.
Fig. 2 shows an example of a part of an electrical circuit with six connectors 3, here a printed circuit 5. Each connector 3 comprises a contact strip 8 formed with a conductive track 6. In the example shown, eight electrical contacts 7 are made of electrically conductive tracks 6.
More specifically, as shown in the cross-section of fig. 3, the connector 3 (i.e., a module substantially free of chips) has a multi-layer structure formed with a substrate 4, an adhesive layer 9, a conductive sheet 10 (e.g., a conductive sheet 10 of copper or a copper alloy), and a stack of more or less of several layers a, B, C and/or D.
Each electrical contact 7 of the connector 3 comprises an inner face 18 facing the dielectric substrate and an outer face opposite to the inner face. The inner face 18 is exposed at the bottom of the connection hole 14 for establishing an electrical connection with a chip potentially housed in the cavity 15. The outer face has a contact face intended to establish an electrical connection with another connector. The layers deposited on the inner and outer faces need not have the same properties (nature) or the same thickness.
The following table shows possible stacks:
[ Table 1]
Conductive sheet 10 | A | B | C | D |
Matte copper | Lustrous nickel | Gold (flash plating) | Ruthenium (II) | |
Lustrous copper | Matte nickel | Gold (flash plating) | Ruthenium (II) | |
Matte copper | Matte nickel | Glossy nickel alloy | Gold (flash plating) | Ruthenium (II) |
Lustrous copper | Matte nickel | Matte nickel alloy | Gold (flash plating) | Ruthenium (II) |
Lustrous copper | Matte nickel | Glossy nickel alloy | Gold (flash plating) | Ruthenium (II) |
Lustrous copper | White bronze | Is free of | Ruthenium (II) | |
Lustrous copper | White bronze | Gold (flash plating) | Ruthenium (II) | |
Matte copper | Matte nickel | Gold (flash plating) | Ruthenium (II) | |
Matte copper | Matte nickel | Matte nickel alloy | Gold (flash plating) | Ruthenium (II) |
It should be noted that copper can be rendered glossy by electrolytically depositing copper on the conductive sheet 10, which conductive sheet 10 has potentially been composed of copper or a copper alloy.
It should be noted that the gold layer C is optional. The gold layer C is deposited in the form of flash plating, i.e. electrodeposited with a thickness between 0 and 15 nm. The gold layer C may be absent or replaced by palladium.
The presence of an (optional) glossy layer below the ruthenium deposition makes it possible to obtain a circuit 3 with a more glossy appearance and a higher purity black.
Fig. 4a to 4k schematically show the individual steps of an example of a method of manufacturing a connector 3 according to the invention, the layer stack of the connector 3 being shown by fig. 3.
These steps include:
providing a substrate 4 (figure 4 a),
coating the face of the substrate 4 with an adhesive layer 9 (figure 4 b),
punching the substrate 4 provided with the adhesive layer 9 to make the connection holes 14 and possibly the cavities 15, which cavities 15 will then house the chips (figure 4 c),
-compositing the substrate 4 provided with the adhesive layer 9 with a sheet 10 of electrically conductive material, for example a copper sheet, crosslinking the adhesive layer 9 under heating and deoxygenating the composite thus obtained (figure 4 d),
laminating a dry film photoresist 16 (figure 4 e),
exposing the thin film photoresist 16 through a mask (figure 4 f),
developing the thin film photoresist 16 (figure 4 g),
chemical etching of the sheet 10 of conductive material in the areas not protected by the thin film photoresist 16, so as to define conductive tracks and/or contacts 17 (figure 4 h),
dissolving the thin film photoresist 16 (figure 4 i),
metallizing at least some of the traces and/or at least some of the contacts 17 obtained after etching the sheet 10 of conductive material, which metallization can be carried out in one or more steps to form a layer stack such as described above with respect to fig. 3; for example, the stack comprises a nickel layer 11 and a gold layer 12 (FIG. 4 j),
remetallising again to form a surface layer 13 of ruthenium (also including other compounds containing ruthenium), and
a step of washing the electrodeposited ruthenium containing surface layer 13 in an alkaline solution (for example NaOH).
The inner face 18, i.e. the face not visible on the finished product, may be masked so that only a layer of gold 12 (as in fig. 4 k) and/or a layer of nickel and/or another alloy (e.g. nickel alloy or white bronze) is deposited thereon, as shown in fig. 3. In fact, for a good soldering of the connection lines to the chip, it may be advantageous to apply a protective film to the inner face 18 of the conductive tracks 17 (opposite the side called the front or contact side or outer face and which is intended to receive the ruthenium) or to press a masking tape against this face during the step of depositing the ruthenium surface layer 13.
The ruthenium surface layer 13 is electrochemically deposited to a thickness between 5 nanometers and 3 micrometers, and more preferably to a thickness close to or equal to 100 nanometers. The mass concentration of ruthenium in the electrochemical bath for depositing the surface layer 13 is between 1 and 15 g/l. For example, the ruthenium solution from which the surface layer 13 can be deposited consists of AnmettAnd (5) selling. The ruthenium is advantageously deposited at a temperature of 65 ℃ +/-10 ℃ with a pH of between 0.1 and 2. An electrochemically kinetic inhibitor of ruthenium deposition is added to the ruthenium solution that can deposit the surface layer 13.
The electrochemically kinetic inhibitor of the deposition of the surface layer 13 is an organic molecule, for example an amine with a carboxyl function.
The color of the obtained ruthenium surface layer 13 varies depending on the deposition conditions.
Therefore, L is used in the CIELab color space (color space) * The exponentially measured brightness is less than about 64. Colorimetric measurements are performed in reflectance, including specular reflectance (specular reflectance). The inventors have obtained a surface layer with an L index between 56.1 and 63.3, whereas the L index is greater than 71.3 without deposition of the electrochemical kinetics inhibitor. Thus, in the electrochemical bath used for depositing the surface layer 13, the presence of the deposited electrochemical kinetic inhibitor makes it possible to obtain a circuit 3 having a black appearance with a higher purity (as shown in the table below, the coordinates a and b of the CIELab colour space are very close to zero; therefore, in practice, there are no green, red, yellow or blue components; therefore, a black appearance is obtained).
In the liquid bath used for electrochemical deposition of ruthenium, the concentration of the electrochemically kinetic inhibitor of the deposition influences the deposition rate. As can be seen from some of the results obtained by the inventors and summarized in the following table, for electrolyte solutions containing the same concentration of ruthenium (i.e., about 6.5 g/l), for the same current density (i.e., 1.5A/dm) 2 ) And the higher the concentration of the electrochemical kinetics inhibitor, the smaller the thickness of the obtained surface layer (whatever the pH value of the liquid bath) for the same deposition time (i.e. 5 minutes).
[ Table 2]
The concentration of the deposited electrochemical kinetic inhibitor and the pH affect the color. Therefore, color was measured using a spectrocolorimeter (spectrocolorimeter) set in the following manner (measuring apparatus: X Rite SP 62):
light source D65 (i.e. light corresponding to 6500K daylight);
-viewing at an angle of 10 degrees;
-specular diffuse light is included in the measurement;
the angle of incidence of the reflected light is 8 degrees.
[ Table 3]
The circuit 3 obtained under the conditions mentioned in the above table, with a surface layer thickness of more than 70 nm, particularly meets the existing requirements for payment chip cards (and particularly concerns contact resistance measurement or CRM — according to ISO 10373 standard or CRM)The specification makes the measurement).
It should be noted that these circuits 3 satisfy the salt spray corrosion test, dual gas (H) 2 S and SO 2 ) Industrial corrosion tests and Temperature and Humidity Tests (THTs) and maintain a contact resistance of less than 500 milliohms after 24 hours of passing these tests.
Good contact resistance and good corrosion resistance are significantly related to the fact that the electrochemically kinetic inhibitor of ruthenium deposition does not co-deposit with ruthenium. In table 4 below, the values represent the atomic percentages of the high resolution XPS spectra during ruthenium deposition on the chip card connector. According to the disclosure of document WO2014064278A1, examples 1 and 2 are made with two liquid baths containing thiourea (thiourea). Examples 3 and 4 were made with liquid baths containing electrochemically kinetic amine inhibitors of deposition. In the table, it can be observed that the use of a liquid bath containing thiourea results in a complete detection (systematic detection) of the presence of sulphur in the deposited layer, indicating that thiourea is co-deposited. In contrast, XPS measurements did not detect this component (agent) in the layer when using a liquid bath with amine inhibitors of the electrochemical kinetics of ruthenium deposition. Potential detection could have indicated the organic form of nitrogen derived from the amine function of the inhibitor, but this is not the case.
[ Table 4]
The circuit 3 may be a single-sided circuit or a double-sided circuit. Advantageously, in the case of a double-sided circuit, the surface layer 13 of ruthenium will be made only on the side with the contacts 7.
Claims (12)
1. Method for the electrodeposition of a grey or black layer on an electrical circuit, in particular for the production of a module (2) of a chip card (1), comprising the steps of:
-providing a dielectric substrate (4), the dielectric substrate (4) having a sheet (10) of electrically conductive material on the dielectric substrate (4), the sheet (10) of electrically conductive material comprising at least one electrical contact (7), the at least one electrical contact (7) having an inner face (18) facing the dielectric substrate (4) and an outer face opposite the inner face (18), the outer face having a contact face intended to establish an electrical connection with a connector,
-depositing at least one layer of electrically conductive material on the sheet (10) of electrically conductive material, the layer of electrically conductive material comprising an electrochemically deposited surface layer (13), the electrochemically deposited surface layer (13) covering at least one region of the contact face of at least one electrical contact (7),
the surface layer (13) being electrochemically deposited from an electroplating bath containing at least ruthenium,
characterized in that the electroplating bath containing at least ruthenium also comprises an electrochemical kinetics inhibitor of the deposition of the surface layer (13), said electrochemical kinetics inhibitor of the deposition of the surface layer (13) not being co-deposited with ruthenium, and in that the surface layer (13) has a grey or black colour not made of sulphur compounds.
2. The method according to claim 1, comprising at least one step of cleaning said surface layer (13) containing electrodeposited ruthenium in an alkaline solution.
3. The method according to any of the preceding claims, wherein the electrochemical deposition kinetics inhibitor of the surface layer (13) is an organic molecule.
4. The method according to any one of the preceding claims, wherein the electrochemical deposition kinetics inhibitor of the surface layer (13) contains an amine having a carboxyl functional group.
5. The method according to any one of the preceding claims, wherein the step of electrochemically depositing at least one layer of conductive material on the sheet (10) of conductive material comprises, before depositing the surface layer (13), depositing at least one layer (a, B or C) located below the surface layer (13), the at least one layer being at least one of the following materials: copper, nickel alloys, gold, silver, palladium, and white bronze.
6. The method according to any one of the preceding claims, wherein the sheet of electrically conductive material (10) is a sheet of copper or a copper alloy.
7. Method according to claims 5 and 6, wherein at least one of the layer comprising the sheet (10) of electrically conductive material and the layer (A, B or C) underlying the surface layer (13) is a glossy layer.
8. The method of claim 7, comprising at least one step of gloss depositing at least one layer, said at least one layer being one of the following materials: copper, nickel alloys, gold, silver, palladium, and white bronze.
9. The method of claim 7, comprising polishing or electropolishing at least one layer to form the gloss layer, the at least one layer being one of the following materials: copper, nickel alloys, gold, silver, palladium, and white bronze.
10. The method according to claim 7, wherein the sheet (10) of electrically conductive material is a sheet of copper or copper alloy, the surface of which is glossy.
11. Circuit, in particular for producing a module (2) of a chip card (1), comprising:
-a flexible dielectric substrate (4);
-a sheet (10) of copper-based conductive material on the dielectric substrate (4), the sheet (10) of conductive material comprising at least one electrical contact (7), the at least one electrical contact (7) having an inner face (18) facing the dielectric substrate (4) and an outer face opposite the inner face (18), the outer face having a contact face intended to establish an electrical connection with a connector,
-at least one layer of electrically conductive material, directly on the sheet (10) of electrically conductive material, comprising a bottom layer and a surface layer (13), the bottom layer containing at least one of the following materials: copper, nickel alloys, gold, silver, palladium and white bronze, the surface layer (13) being electrochemically deposited on the base layer and covering at least one region of the contact face of the at least one electrical contact (7),
wherein the surface layer (13) is made using the method according to any of the preceding claims and has a grey or black color which is not made of a sulphur compound.
12. Chip card (1), the chip card (1) comprising a module (2), the module (2) being manufactured with a circuit (5) according to claim 11 and being inserted into a cavity made in the card (1).
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR2003062 | 2020-03-27 | ||
FR2003062A FR3108634B1 (en) | 2020-03-27 | 2020-03-27 | Process for electrodepositing a gray or black layer on an electrical circuit, electrical circuit for an electronic chip card module comprising such a layer |
PCT/EP2021/057697 WO2021191334A1 (en) | 2020-03-27 | 2021-03-25 | Method for electrodepositing a grey or black layer on an electrical circuit, and electrical circuit for an electronic module of a chip card comprising such a layer |
Publications (1)
Publication Number | Publication Date |
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CN115349034A true CN115349034A (en) | 2022-11-15 |
Family
ID=70738738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202180023777.8A Pending CN115349034A (en) | 2020-03-27 | 2021-03-25 | Method for the electrodeposition of a grey or black layer on an electric circuit, and electric circuit for an electronic module of a chip card comprising such a layer |
Country Status (4)
Country | Link |
---|---|
KR (1) | KR20220158765A (en) |
CN (1) | CN115349034A (en) |
FR (1) | FR3108634B1 (en) |
WO (1) | WO2021191334A1 (en) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ES2408855T3 (en) | 1995-06-27 | 2013-06-21 | Morpho Cards Gmbh | Smart card |
FR2997550B1 (en) * | 2012-10-26 | 2016-01-22 | Linxens Holding | ELECTRICAL CIRCUIT, ELECTRONIC MODULE FOR A CHIP CARD COMPRISING ON THIS ELECTRIC CIRCUIT AND METHOD FOR PRODUCING SUCH ELECTRIC CIRCUIT. |
FR3074193B1 (en) * | 2017-11-28 | 2020-07-10 | Linxens Holding | ELECTRICAL CIRCUIT, ELECTRONIC MODULE FOR A CHIP CARD REALIZED ON THIS ELECTRICAL CIRCUIT AND METHOD FOR THE PRODUCTION OF SUCH AN ELECTRICAL CIRCUIT. |
-
2020
- 2020-03-27 FR FR2003062A patent/FR3108634B1/en active Active
-
2021
- 2021-03-25 WO PCT/EP2021/057697 patent/WO2021191334A1/en active Application Filing
- 2021-03-25 CN CN202180023777.8A patent/CN115349034A/en active Pending
- 2021-03-25 KR KR1020227036560A patent/KR20220158765A/en unknown
Also Published As
Publication number | Publication date |
---|---|
WO2021191334A1 (en) | 2021-09-30 |
FR3108634B1 (en) | 2022-07-15 |
KR20220158765A (en) | 2022-12-01 |
FR3108634A1 (en) | 2021-10-01 |
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