WO2012168752A1 - A method for manufacturing a card connector - Google Patents

A method for manufacturing a card connector Download PDF

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Publication number
WO2012168752A1
WO2012168752A1 PCT/IB2011/001675 IB2011001675W WO2012168752A1 WO 2012168752 A1 WO2012168752 A1 WO 2012168752A1 IB 2011001675 W IB2011001675 W IB 2011001675W WO 2012168752 A1 WO2012168752 A1 WO 2012168752A1
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WO
WIPO (PCT)
Prior art keywords
substrate
contacts
pattern
layer
connector
Prior art date
Application number
PCT/IB2011/001675
Other languages
French (fr)
Inventor
François LECHLEITER
Original Assignee
Microconnections Sas
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microconnections Sas filed Critical Microconnections Sas
Priority to PCT/IB2011/001675 priority Critical patent/WO2012168752A1/en
Priority to EP11767755.9A priority patent/EP2718875A1/en
Publication of WO2012168752A1 publication Critical patent/WO2012168752A1/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743External electrical contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/183Connection portion, e.g. seal
    • H01L2924/18301Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part

Definitions

  • the present invention relates to card connectors (i.e. smart card connectors or SIM card connectors) and in particular card connectors which are first deposited onto a support layer and maintained thereon during a process of assembling the connector with a chip of the card, and then separated from the support once the chip has been glued or overmolded together with the connector, the support being thereafter removed as bringing no more benefit in terms of mechanical support nor in terms of molding separation.
  • card connectors i.e. smart card connectors or SIM card connectors
  • the connector is then assembled with the chip and such an assembly is covered as a whole by a bulk of protective resin.
  • the substrate, made of a dielectric film, is then peeled-off from the two copper layers thereby exposing the contact pads of the connector pattern.
  • the EP1655691 A1 method requires a gluing step which is fastidious and lacks accuracy in terms of exact positioning of the connector pattern onto the substrate and as a consequence in terms of positioning of the chip onto the connector pattern.
  • the method of US5200362A requires a preliminary step before the electro- deposition step which consists in adding and removing both a negative resist and portions of a first copper layer. Such adding-removing preliminary step renders such method drudgery and expensive. Still in the method of US5200362A, the vapor deposition step remains expensive to be carried out especially in the frame of a usual connector manufacturing facility.
  • the result of the first vapor deposition step followed by resist and copper removing provides a set of copper traces which then behave like a electrodeposition electrodes.
  • Such copper traces hence have to be interconnected so as to be at the same and exact potential during the following electro-deposition step in order to obtain equal thicknesses of the deposited layers at the end of such electro-deposition step.
  • Such a necessary interconnection between the copper traces requires that lateral conductive buses be provided typically at the sides of the vapor deposited layer so as to interconnect the traces. These lateral conductive buses do span ramifications of the first deposited copper layer and hence do lower the available area for production of connectors on an originally given substrate. Productivity levels on a given substrate are hence limited in a process according to such method.
  • a primary purpose of the invention is to propose a method for manufacturing a card as well as an assembly of a card connector and card which may avoid
  • the substrate to be removed is conductive and used as a conductor for an electro-deposition current, a set of electrodeposition traces is no more necessary and the preliminary step of adding and then removing connector material is no more necessary for the purpose of providing such traces.
  • FIG. 1 illustrates a substrate and a resist pattern used in an exemplary process of the invention
  • FIG. 2 is a cross-section view of a stack of layers forming a connector by means of the same exemplary process ;
  • FIG. 3 illustrates a set of stacks of a same connector after removal of a resist pattern in the same exemplary process
  • FIGS. 4a-4c illustrate successive depositing and removal steps of layers and a resist pattern in an alternate embodiment of the invention ;
  • FIG. 5 illustrates a chip and connector assembly generated in the same exemplary process according to the invention ;
  • FIG. 6 illustrates a connector-chip assembly after an overmolding step
  • FIG. 7 illustrates a peel-off step of the substrate from such assemblies.
  • Figure 1 represents a substrate 10 on which a resist 20 is deposited.
  • Such resist 20 is geometrically designed for constituting a counter pattern defined as the negative of a pattern of contacts of the connector that it is aimed to be produced.
  • the resist 20 is here made of a dry film as used in the printed circuit board industry.
  • the resists is here designed according to the desired counter-pattern separately from substrate 10 and then laminated onto substrate 10.
  • Such dry film can as an alternative be deposited as a continuous layer onto the substrate 10 and then be photo-exposed through a mask, and developed so as to keep only the desired counter-pattern on substrate 10.
  • a special slope is preferably formed at edges 21 of the resist by combination of exposure and development parameters.
  • angle A is preferably more than 90 degrees. This shape brings an advantage on the robustness of the finished product as will be described here-below.
  • Substrate 10 is here constituted of a conductive material.
  • the substrate is a metal and more particularly stainless steel.
  • Other conductive materials and in particular metals can be chosen, such as for example nickel, copper or aluminium.
  • the substrate will not remain on the finished product and will have among others the function of a transport belt carrying the connectors in formation and to be assembled from one production step to the other.
  • substrate 10 preferably has a certain flexibility.
  • Such flexibility derives in the present case from a low thickness of the used foil of stainless steel, here around 300 ⁇ .
  • Adequate metal foils can be found among the products sold by company Sandvik which in particular proposes a suitable 300 ⁇ thick stainless steel foil.
  • Sandvik proposes stainless or nickel foil, that may be either 200 ⁇ or 300 ⁇ thick, which are both suitable in the frame of the present invention. Any width can be used for obtaining a suitable foil.
  • substrate 10 is used in the following steps of the process as an electrode for electro-depositing layers of constitutive materials of a smart card connector.
  • a sequence of different connector materials is electro-deposited onto the metallic foil so as to constitute an appropriate stack-up of layers 30 constituting contacts of the smart card connector.
  • a first layer of connector material 31 is deposited by electro-deposition using the substrate layer 10 as an electro-deposition electrode. Electro-deposition is carried out in a suitable solvent and with suitable parameters of temperature, voltage, concentration of reagents as well-known per se.
  • First layer 31 is in direct contact with the substrate 10.
  • First layer 31 corresponds to the outer skin of the contacts of the connector.
  • Such external skin of the contact is also called surface finishing layer of the smart-card connector.
  • Gold is used here for the first layer 31 .
  • a thickness of around 0,05 ⁇ is used for the first layer 31 so as to ensure proper reliability of the surface finishing regarding contact resistance, resistance to scratches, resistance to corrosion, and more generally 'cosmetic', i.e. aesthetic, aspects.
  • Other kinds of metals, typically precious metals like palladium can be also deposited as the surface finishing layer.
  • a second layer 32 of nickel directly onto the gold finishing first layer so as to ensure a barrier to migration between gold and copper.
  • approximately 2 ⁇ layer of nickel is electro-deposited as the second layer 32.
  • Another metal can be used for the same purpose, depending on the nature of the metal chosen for the first layer 31 and the metal chosen for the later deposited conductive layer.
  • substrate 10 is here also used as an electro-deposition conductor with the function of conducting an electrolytic current. More specifically, the electrolytic current flows in this second step through the substrate 10 and through the first layer 31 as a primary deposited layer.
  • third layer 33 is a thick layer. More particularly the third layer 33 is here a copper layer the thickness of which is chosen in a range from 18 ⁇ to 35 ⁇ for an appropriate conductivity of the contacts of the connector.
  • a nickel layer 34 is added as a fourth layer, approximately 5 ⁇ thick, still using in the present example the substrate as an electro-deposition conductor.
  • a fifth metal layer 35 is deposited with the same electro-deposition process using the substrate 31 and previously deposited layers 31 , 32, 33, 34 as electro- deposition conductors.
  • the purpose of the fifth metal layer 35 is to prepare the stack of layers for wire-bonding.
  • a precious metal for instance gold or palladium is deposited as the fifth layer 35 with the purpose of ensuring a clean and non- polluted surface, able to receive wire-bonding. If the wire-bonding technology uses gold wire, then typically gold is deposited, approximately 0,20 ⁇ thick. Palladium can be deposited instead of gold with an appropriate thickness. If the wire-bonding technology uses copper or aluminium or any other kind of wire, this fifth metallic layer 35 has to be adapted to that technology in terms of metal choice and also in terms of deposit characteristics (roughness, thickness, purity), according to usual skills in the art.
  • the conductive nature of the substrate 10 allows obtaining an homogeneous electrical potential all over the surface of the substrate, thereby allowing an homogeneous deposition of the first layer 31 and of the further layers 32, 33, 34, 35. Thanks to the metallic nature of the substrate, such an homogeneous deposition of the first layer and of the further layers is carried out without any need for interconnections between different parts of any original conductive pattern. Deposition can be made without the need of special busbars otherwise necessary for bringing the electrolytic current all over the original pattern of contacts.
  • the substrate 10 is processed prior to deposition steps so as to make the substrate easily separable from the first layer 31 . Such removal is carried out according to a last step that will be described here-below.
  • Such treatment of substrate 10 preferably consists in depositing a thin layer of a release agent or a thin release structure which makes the first layer less adhesive to the substrate 10 without preventing the role of the substrate as a conductor in the electro-deposition steps.
  • the release agent or structure is preferably chosen as a being inherently conductive.
  • a conductive release structure is chosen which presents adhesion characteristics that depend on temperature, so that the release structure adheres strongly to the first deposited layer 31 at normal or low temperature and presents low adhesion capability at a higher temperature.
  • the process of electro-depositions and further assembly steps is carried out with high mechanical robustness at normal temperature whereas when temperature is raised at the end of the process the substrate is easily mechanically removed from the first deposited layer thanks to the low adhesion characteristics at such raised temperature.
  • Such a preferred release agent or structure accomplishes three main functions.
  • One function is to ensure an electrical conductivity for further electrolytic deposition.
  • Another function is to ensure a good adhesion between the substrate 10 and the first electrodeposited layer as long as the temperature has not exceeded a certain value.
  • the third function is to ensure a low adhesion between the substrate and the first electrodeposited layer that will remain on the finished product (for instance gold), after it has been exposed or while it is exposed to a certain temperature.
  • Release structure having adhesion capability dependent on temperature is for example proposed in WO2006130244.
  • This release structure is an inorganic release structure which consists in an admixture of elements comprising nickel plus one or more of the elements phosphorus, boron, or chromium, adjacent to a metal oxide layer.
  • Such a release structure provides strong adhesion capacity at temperatures below 100 degrees Celsius and provides substantially lower adhesion strength at higher temperatures.
  • the co-deposited layer consists essentially only of nickel and one or more of boron, phosphorus, and chromium. Inclusion of trace elements is possible, such as less than 0.5% trace elements by weight.
  • the co-deposited layer consists essentially only of nickel, one or more of boron, phosphorus, and chromium, and may include larger amounts of other materials that are inert in the release layer activation, such as copper or some other metals. In some embodiments, the amount of boron, phosphorus, and chromium is up to 15% by weight of the ad-mixture.
  • the co-deposited layer may be formed by electroless or electrolytic plating.
  • the metal oxide layer may comprise an oxide such as tantalum oxide, and in some embodiments may consist essentially only of a single metal oxide. Other metal oxides such as nickel oxide may be also used, and are possibly mixed with other metal oxides.
  • the co-deposited layer is advantageously between 1 and 10 microns thick, and more advantageously between 1 and 4 microns thick; and the metal oxide may be less than 0.050 microns thick, preferably less than 0.025 microns thick.
  • Another treatment of substrate 10 consists in generating a very thin passivation layer on the substrate, which passivation layer is obtained by an oxidation realized on the surface of the substrate.
  • Such oxidation of the substrate may be obtained by applying on the substrate an oxidation acid such as oxidation acids used in chemistry like micro-etching techniques.
  • an oxidation acid such as oxidation acids used in chemistry like micro-etching techniques.
  • a nickel substrate chromic acid may be used for oxidizing the nickel surface and thereby generating such a passivation layer obtained by oxidation.
  • Still another treatment of the substrate aiming at providing a release layer thereon consists in applying an anodic passivation treatment to the substrate.
  • Anodic passivation consists in imposing to the substrate an electrolytic current while the substrate is immersed in an adapted electrolyte in order to generate an oxidation layer on the substrate.
  • Anodic passivation is easily applied in particular to a substrate of steel or aluminium and generates a thin passivation layer with immediate benefit in terms of rendering the substrate releasable from a later deposited layer.
  • release agent Although use of a release agent is preferred, according to another example no release agent is used and the conductive substrate is removed with a technique that may be different from mechanical peel-off, such as by using copper as the material of the substrate and then etch out the copper substrate with etching techniques which are known per se.
  • a layer of a precious metal is first deposited.
  • Such first layer constitutes the finishing layer or contact side of the smart-card connector.
  • Gold is preferably used for the surface finishing with a thickness around 0.05 ⁇ so as to ensure proper reliability of the finishing layer regarding contact resistance, resistance to scratches, resistance to corrosion, 'cosmetic' aspects.
  • Other metals like palladium can be also used as the first layer.
  • a thick layer of any metal compatible with the first and third layers is deposited as the second and conductivity layer.
  • any metal compatible with the first and third layers is deposited as the second and conductivity layer.
  • nickel is used, which is passive with regard to gold.
  • the third and last layer is realized with a precious metal, for instance gold or palladium to ensure a clean and non- polluted surface able to receive wire-bonding.
  • a precious metal for instance gold or palladium to ensure a clean and non- polluted surface able to receive wire-bonding.
  • gold is preferably used, approximately 0,20 ⁇ thick. Palladium can be deposited instead of gold with the appropriate thickness. If the wire- bonding technology uses copper or aluminium or any other kind of wire this third metallic layer has to be adapted to that technology in terms of metal choice and deposit characteristics, i.e. roughness, thickness, purity.
  • benefit is taken from the conductivity of the substrate so as to use the substrate as a conductive element for carrying the electrolytic current, i.e. as an electro-deposition conductor.
  • the electro-deposition occurs directly onto the substrate in the case of the first deposited layer, and occurs onto an already deposited layer through which the electrolytic current flows in the case of the further layers of the stack.
  • the resist 20 is removed. Removal of the resist 20 is here carried out by a stripping method which is per se well-known in the art.
  • the resist is removed before the last layer 35 is deposited.
  • side edges 36 of a stack made of the four previously deposited layers 31 , 32, 33, 34, are exposed to deposition of the last layer 35, and the last layer 35 covers also the edges 36 of the stacks, thereby protecting previously deposited layers also at their edges 36 against mechanical damages and against corrosion.
  • the copper layer 33 which is specifically subject to corrosion is protected at edges 36.
  • Layer 35 covers also exposed parts 37 of the substrate 10 which were previously hidden by the resist 10. Parts of the layer 35 which will appear in these exposed areas are removed at a later step by an etching technique applied locally onto those specific parts.
  • the pattern of contacts is ready for being associated with a smart card chip.
  • a layer of die-attach glue 40 is deposited at an appropriate location where a chip is to be placed. Subsequently, a chip 50 is placed on the die-attach glue 40. The glue is then cured for example by UV curing or thermal curing.
  • Wire-bondings 60 are realised so as to electrically interconnect pads of chip
  • wire-bondings can be performed with any kind of wire such as gold, copper, aluminium, or others.
  • the last electrodeposited metal layers 35 can be adapted to any kind of wire-bonding technology.
  • an overmolding operation is then carried out for constituting an encapsulating body 70 covering the chip 50 and the contact stacks 30.
  • the overmolded body has an appropriate shape according to the dimensions necessary for such body.
  • the overmolded encapsulating body is the smart-card body per se, i.e. a plastic card having dimensions as defined in the international standards and having a thickness which is typically around 0,76mm, here measured above the metal substrate 10.
  • the plastic body of a SIM - subscriber identification module- or of a credit card as examples are hence obtained directly by means of the overmolding step.
  • the overmolding is carried out in one step and consists in overmolding the card body as a whole, here referenced, i.e. the finished product according to the dimensions as usually defined by the international standards relating to smart cards or SIM cards.
  • overmolding consists in realising a module 70 comprising the smart card connector, the smart card chip and the interconnections there-between.
  • a module 70 comprising the smart card connector, the smart card chip and the interconnections there-between.
  • Such module is thereafter inserted into a card body having a cavity specifically aimed at receiving such module.
  • the module is then glued inside the cavity according to an assembling technique which is well known in the art.
  • the contacts are strongly anchored in the overmolded material hence preventing accidental extractions of the contacts 30 out of the overmolded material once solidified.
  • the substrate is preferably made of a belt which circulates, as a reel-to-reel process, from step to step of the previously described process. As illustrated on figure 7, the process as described is hence repeated for producing a continuous batch of connector-chip assemblies on a same belt of substrate. After the overmolding step, each pattern of contacts of a connector is still attached together onto the substrate 10. At his stage an additional process step like printing onto the card body can be carried out, taking advantage of the continuous belt format.
  • the foil constituting the substratel O is easily peeled off as illustrated on figure 7, thanks to the surface treatment done at the beginning.
  • the smart-cards are now separated from each other, and can go to the next process steps by batch.
  • the contacts 30 of the card are now accessible.
  • non-treated metal substrate such as a non-treated copper foil
  • removal is done after assembly and overmolding of the copper substrate by etching away the remaining copper which, contrary to the copper constituting the conductive layer 33 is not protected by a pattern plating, i.e. is not protected by the deposited layers 31 , 32 33 ,34, and 35.
  • a chemical copper etching technique such as those used in the printed circuit board industry can be used with success for this purpose.
  • This technology has disadvantage to need copper etching facilities in the facility realising the packaging i.e. the chip positioning and gluing and the overmolding of the connector and chip.
  • the same belt of substrate circulates between the different described steps.
  • the patterns of contacts can hence be generated in a single and common manufacturing process with the assembly and overmolding of connectors and chips.
  • the invention allows realising quickly and reliably a smart card in a same and single process for example in a facility usually dedicated only to assembly of connectors with chips.
  • substrate is supplied to an assembly facility with already deposited connectors according to the present invention.
  • first factory realises the electro-deposition of the patterns of contacts onto the conductive substrate and a distinct factory then assembles the chips with the connectors before the substrate is removed from the contacts in this second factory.

Abstract

The invention relates to a method for manufacturing a card connector or a card comprising the step of depositing layers (31,32,33,34,35) of connector materials onto a substrate (10) so as to form a pattern of contacts (30) for a connector. It also comprises the step of removing the substrate (10) from the pattern of contacts (30) so as to expose the contacts (30). The substrate to be removed (10) is made of conductive material. The method comprises the step of depositing at least one layer (31,32,33,34,35) of the pattern of contacts (30) by electro-deposition by making use of the substrate to be removed (10) as a conductor for electric current used in the electro-deposition. The invention may also comprise the step of overmolding the card body compound, after having mounted and connected a chip to the connector, and before peeling off the substrate.

Description

A method for manufacturing a card connector
The present invention relates to card connectors (i.e. smart card connectors or SIM card connectors) and in particular card connectors which are first deposited onto a support layer and maintained thereon during a process of assembling the connector with a chip of the card, and then separated from the support once the chip has been glued or overmolded together with the connector, the support being thereafter removed as bringing no more benefit in terms of mechanical support nor in terms of molding separation.
Such a method has been proposed in EP1655691 A1 where a pattern of contacts is glued onto a substrate in a removable manner, i.e. with a glue that is chosen so as to be easily dissolved in an acid solution at the end of the process.
Such a method has been proposed also in US5200362A where the pattern of contacts is realized first by depositing a copper layer onto a dielectric substrate by vapor deposition, and thereafter depositing a second layer of copper onto the first layer by means of an electro-deposition making use of the first layer as an electrode for the electro-deposition. The pattern of contacts is delimited by first placing a negative resist onto the substrate then depositing the first layer of the pattern of contacts. The resist has to be discarded together with portions of the first layer on top of it before the second layer of copper is deposited by electro- deposition. Such adding and suppressing of resist and portions of the first layer is carried out as a preliminary step before the electro-deposition step begins.
In the process according to US5200362A the connector is then assembled with the chip and such an assembly is covered as a whole by a bulk of protective resin. The substrate, made of a dielectric film, is then peeled-off from the two copper layers thereby exposing the contact pads of the connector pattern.
Such known methods still present disadvantages.
In particular the EP1655691 A1 method requires a gluing step which is fastidious and lacks accuracy in terms of exact positioning of the connector pattern onto the substrate and as a consequence in terms of positioning of the chip onto the connector pattern.
The method of US5200362A requires a preliminary step before the electro- deposition step which consists in adding and removing both a negative resist and portions of a first copper layer. Such adding-removing preliminary step renders such method drudgery and expensive. Still in the method of US5200362A, the vapor deposition step remains expensive to be carried out especially in the frame of a usual connector manufacturing facility.
Furthermore the result of the first vapor deposition step followed by resist and copper removing provides a set of copper traces which then behave like a electrodeposition electrodes. Such copper traces hence have to be interconnected so as to be at the same and exact potential during the following electro-deposition step in order to obtain equal thicknesses of the deposited layers at the end of such electro-deposition step. Such a necessary interconnection between the copper traces requires that lateral conductive buses be provided typically at the sides of the vapor deposited layer so as to interconnect the traces. These lateral conductive buses do span ramifications of the first deposited copper layer and hence do lower the available area for production of connectors on an originally given substrate. Productivity levels on a given substrate are hence limited in a process according to such method.
A primary purpose of the invention is to propose a method for manufacturing a card as well as an assembly of a card connector and card which may avoid
- the preliminary steps of adding and subsequently suppressing some connector material before the electro-deposition step, and/or
- a vaporization step, and/or
- lateral conductive buses.
Such purpose is at least partially achieved by means of the invention thanks to a method for manufacturing a card and by means of an assembly comprising a card connector according to the appended claims.
Due to the fact that the substrate to be removed is conductive and used as a conductor for an electro-deposition current, a set of electrodeposition traces is no more necessary and the preliminary step of adding and then removing connector material is no more necessary for the purpose of providing such traces.
Due to the fact that the removable conductive substrate is at the same electrical potential as a whole, no more lateral conductive buses are necessary for depositing layers of the connector.
And due to the fact that the substrate constitutes the electrodeposition electrode, no vapor deposition of a conductive layer used as an electrode is necessary anymore. Other features, purposes and advantages of the invention will appear throughout the following description, which is made in reference to the appended drawings, among which :
- Figure 1 illustrates a substrate and a resist pattern used in an exemplary process of the invention ;
- Figure 2 is a cross-section view of a stack of layers forming a connector by means of the same exemplary process ;
- Figure 3 illustrates a set of stacks of a same connector after removal of a resist pattern in the same exemplary process ;
- Figures 4a-4c illustrate successive depositing and removal steps of layers and a resist pattern in an alternate embodiment of the invention ;
- Figure 5 illustrates a chip and connector assembly generated in the same exemplary process according to the invention ;
- Figure 6 illustrates a connector-chip assembly after an overmolding step; and
- Figure 7 illustrates a peel-off step of the substrate from such assemblies.
A first example of a manufacturing method according to the invention will now be described in reference to figures 1 -3.
Figure 1 represents a substrate 10 on which a resist 20 is deposited. Such resist 20 is geometrically designed for constituting a counter pattern defined as the negative of a pattern of contacts of the connector that it is aimed to be produced.
The resist 20 is here made of a dry film as used in the printed circuit board industry. The resists is here designed according to the desired counter-pattern separately from substrate 10 and then laminated onto substrate 10. Such dry film can as an alternative be deposited as a continuous layer onto the substrate 10 and then be photo-exposed through a mask, and developed so as to keep only the desired counter-pattern on substrate 10.
Either in the case of a lamination or in the case of a photo-exposure and development of the resist a special slope is preferably formed at edges 21 of the resist by combination of exposure and development parameters. Considering an angle A defined between the resist edges 21 and the exposed areas of the substrate 20 before any deposition of connector material, angle A is preferably more than 90 degrees. This shape brings an advantage on the robustness of the finished product as will be described here-below.
Substrate 10 is here constituted of a conductive material. In the present example, the substrate is a metal and more particularly stainless steel. Other conductive materials and in particular metals can be chosen, such as for example nickel, copper or aluminium. The substrate will not remain on the finished product and will have among others the function of a transport belt carrying the connectors in formation and to be assembled from one production step to the other.
For this purpose of easy transportation in the process and also for an ability to be easily removed at the end of the process, substrate 10 preferably has a certain flexibility. Such flexibility derives in the present case from a low thickness of the used foil of stainless steel, here around 300 μιτι.
Adequate metal foils can be found among the products sold by company Sandvik which in particular proposes a suitable 300 μιτι thick stainless steel foil. Sandvik proposes stainless or nickel foil, that may be either 200 μιτι or 300 μιτι thick, which are both suitable in the frame of the present invention. Any width can be used for obtaining a suitable foil.
Companies Olin-Somers, Gould, Circuit Foil also propose suitable copper foils which have an appropriate 105μηη thicknesses. Oak-Mitsui also proposes suitable metal foils for carrying out the present invention.
Thanks to its electrical properties, substrate 10 is used in the following steps of the process as an electrode for electro-depositing layers of constitutive materials of a smart card connector.
As represented on figure 2, a sequence of different connector materials is electro-deposited onto the metallic foil so as to constitute an appropriate stack-up of layers 30 constituting contacts of the smart card connector.
A first layer of connector material 31 is deposited by electro-deposition using the substrate layer 10 as an electro-deposition electrode. Electro-deposition is carried out in a suitable solvent and with suitable parameters of temperature, voltage, concentration of reagents as well-known per se.
On figure 2, the first layer 31 is in direct contact with the substrate 10. First layer 31 corresponds to the outer skin of the contacts of the connector. Such external skin of the contact is also called surface finishing layer of the smart-card connector. Gold is used here for the first layer 31 . A thickness of around 0,05 μιτι is used for the first layer 31 so as to ensure proper reliability of the surface finishing regarding contact resistance, resistance to scratches, resistance to corrosion, and more generally 'cosmetic', i.e. aesthetic, aspects. Other kinds of metals, typically precious metals like palladium can be also deposited as the surface finishing layer.
In the present example where gold constitutes the finishing surface and due to the fact that a conductive layer of copper is used to deposit afterwards a second layer 32 of nickel directly onto the gold finishing first layer so as to ensure a barrier to migration between gold and copper. In this case, approximately 2 μιτι layer of nickel is electro-deposited as the second layer 32. Another metal can be used for the same purpose, depending on the nature of the metal chosen for the first layer 31 and the metal chosen for the later deposited conductive layer. For the electro-deposition of the second layer 32, substrate 10 is here also used as an electro-deposition conductor with the function of conducting an electrolytic current. More specifically, the electrolytic current flows in this second step through the substrate 10 and through the first layer 31 as a primary deposited layer.
A thicker layer of a metal 33 having high electrical conduction capacity is then deposited as a third layer, still by means of electro-deposition. To ensure a good stiffness of the contact plate, third layer 33 is a thick layer. More particularly the third layer 33 is here a copper layer the thickness of which is chosen in a range from 18μηη to 35μηη for an appropriate conductivity of the contacts of the connector.
To prepare the third layer of connector material 33 to wire-bonding, when the layer 33 is made of copper, a nickel layer 34 is added as a fourth layer, approximately 5 μιτι thick, still using in the present example the substrate as an electro-deposition conductor.
A fifth metal layer 35 is deposited with the same electro-deposition process using the substrate 31 and previously deposited layers 31 , 32, 33, 34 as electro- deposition conductors. The purpose of the fifth metal layer 35 is to prepare the stack of layers for wire-bonding. A precious metal, for instance gold or palladium is deposited as the fifth layer 35 with the purpose of ensuring a clean and non- polluted surface, able to receive wire-bonding. If the wire-bonding technology uses gold wire, then typically gold is deposited, approximately 0,20 μιτι thick. Palladium can be deposited instead of gold with an appropriate thickness. If the wire-bonding technology uses copper or aluminium or any other kind of wire, this fifth metallic layer 35 has to be adapted to that technology in terms of metal choice and also in terms of deposit characteristics (roughness, thickness, purity), according to usual skills in the art.
The conductive nature of the substrate 10 allows obtaining an homogeneous electrical potential all over the surface of the substrate, thereby allowing an homogeneous deposition of the first layer 31 and of the further layers 32, 33, 34, 35. Thanks to the metallic nature of the substrate, such an homogeneous deposition of the first layer and of the further layers is carried out without any need for interconnections between different parts of any original conductive pattern. Deposition can be made without the need of special busbars otherwise necessary for bringing the electrolytic current all over the original pattern of contacts.
In a preferred embodiment, the substrate 10 is processed prior to deposition steps so as to make the substrate easily separable from the first layer 31 . Such removal is carried out according to a last step that will be described here-below.
Such treatment of substrate 10 preferably consists in depositing a thin layer of a release agent or a thin release structure which makes the first layer less adhesive to the substrate 10 without preventing the role of the substrate as a conductor in the electro-deposition steps.
The release agent or structure is preferably chosen as a being inherently conductive.
Preferably also a conductive release structure is chosen which presents adhesion characteristics that depend on temperature, so that the release structure adheres strongly to the first deposited layer 31 at normal or low temperature and presents low adhesion capability at a higher temperature. Hence the process of electro-depositions and further assembly steps is carried out with high mechanical robustness at normal temperature whereas when temperature is raised at the end of the process the substrate is easily mechanically removed from the first deposited layer thanks to the low adhesion characteristics at such raised temperature.
Such a preferred release agent or structure accomplishes three main functions. One function is to ensure an electrical conductivity for further electrolytic deposition. Another function is to ensure a good adhesion between the substrate 10 and the first electrodeposited layer as long as the temperature has not exceeded a certain value. The third function is to ensure a low adhesion between the substrate and the first electrodeposited layer that will remain on the finished product (for instance gold), after it has been exposed or while it is exposed to a certain temperature.
Release structure having adhesion capability dependent on temperature is for example proposed in WO2006130244. This release structure is an inorganic release structure which consists in an admixture of elements comprising nickel plus one or more of the elements phosphorus, boron, or chromium, adjacent to a metal oxide layer.
Such a release structure provides strong adhesion capacity at temperatures below 100 degrees Celsius and provides substantially lower adhesion strength at higher temperatures.
In other embodiments, the co-deposited layer consists essentially only of nickel and one or more of boron, phosphorus, and chromium. Inclusion of trace elements is possible, such as less than 0.5% trace elements by weight. In some embodiments, the co-deposited layer consists essentially only of nickel, one or more of boron, phosphorus, and chromium, and may include larger amounts of other materials that are inert in the release layer activation, such as copper or some other metals. In some embodiments, the amount of boron, phosphorus, and chromium is up to 15% by weight of the ad-mixture. The co-deposited layer may be formed by electroless or electrolytic plating.
The metal oxide layer may comprise an oxide such as tantalum oxide, and in some embodiments may consist essentially only of a single metal oxide. Other metal oxides such as nickel oxide may be also used, and are possibly mixed with other metal oxides.
In terms of thickness, the co-deposited layer is advantageously between 1 and 10 microns thick, and more advantageously between 1 and 4 microns thick; and the metal oxide may be less than 0.050 microns thick, preferably less than 0.025 microns thick.
Another treatment of substrate 10 consists in generating a very thin passivation layer on the substrate, which passivation layer is obtained by an oxidation realized on the surface of the substrate. Such oxidation of the substrate may be obtained by applying on the substrate an oxidation acid such as oxidation acids used in chemistry like micro-etching techniques. For example, in the case of a nickel substrate chromic acid may be used for oxidizing the nickel surface and thereby generating such a passivation layer obtained by oxidation.
Still another treatment of the substrate aiming at providing a release layer thereon consists in applying an anodic passivation treatment to the substrate. Anodic passivation consists in imposing to the substrate an electrolytic current while the substrate is immersed in an adapted electrolyte in order to generate an oxidation layer on the substrate. Anodic passivation is easily applied in particular to a substrate of steel or aluminium and generates a thin passivation layer with immediate benefit in terms of rendering the substrate releasable from a later deposited layer.
Although use of a release agent is preferred, according to another example no release agent is used and the conductive substrate is removed with a technique that may be different from mechanical peel-off, such as by using copper as the material of the substrate and then etch out the copper substrate with etching techniques which are known per se.
Although a stack of five successive layers of connector material has been described as constituting the contacts of the connector, another number of layers can be adopted. For example as a number of three layers may be used in particular when copper is not used as the conductivity layer.
For example a layer of a precious metal is first deposited. Such first layer constitutes the finishing layer or contact side of the smart-card connector. Gold is preferably used for the surface finishing with a thickness around 0.05 μιτι so as to ensure proper reliability of the finishing layer regarding contact resistance, resistance to scratches, resistance to corrosion, 'cosmetic' aspects. Other metals like palladium can be also used as the first layer.
A thick layer of any metal compatible with the first and third layers is deposited as the second and conductivity layer. For instance nickel is used, which is passive with regard to gold.
To prepare contacts for wire-bonding, the third and last layer is realized with a precious metal, for instance gold or palladium to ensure a clean and non- polluted surface able to receive wire-bonding. If the wire-bonding technology uses gold wire, then gold is preferably used, approximately 0,20 μιτι thick. Palladium can be deposited instead of gold with the appropriate thickness. If the wire- bonding technology uses copper or aluminium or any other kind of wire this third metallic layer has to be adapted to that technology in terms of metal choice and deposit characteristics, i.e. roughness, thickness, purity.
In any case, benefit is taken from the conductivity of the substrate so as to use the substrate as a conductive element for carrying the electrolytic current, i.e. as an electro-deposition conductor.
The electro-deposition occurs directly onto the substrate in the case of the first deposited layer, and occurs onto an already deposited layer through which the electrolytic current flows in the case of the further layers of the stack.
Once the different layers constituting the contacts have been deposited, the resist 20 is removed. Removal of the resist 20 is here carried out by a stripping method which is per se well-known in the art.
As a result, only the pattern of contacts 30 remains onto the substrate 10 as illustrated on figure 3.
According to a preferred method illustrated on figures 4a to 4c, the resist is removed before the last layer 35 is deposited. This way, side edges 36 of a stack made of the four previously deposited layers 31 , 32, 33, 34, are exposed to deposition of the last layer 35, and the last layer 35 covers also the edges 36 of the stacks, thereby protecting previously deposited layers also at their edges 36 against mechanical damages and against corrosion.
In particular, the copper layer 33 which is specifically subject to corrosion is protected at edges 36. Layer 35 covers also exposed parts 37 of the substrate 10 which were previously hidden by the resist 10. Parts of the layer 35 which will appear in these exposed areas are removed at a later step by an etching technique applied locally onto those specific parts.
At this stage, the pattern of contacts is ready for being associated with a smart card chip.
As illustrated on figure 5, a layer of die-attach glue 40 is deposited at an appropriate location where a chip is to be placed. Subsequently, a chip 50 is placed on the die-attach glue 40. The glue is then cured for example by UV curing or thermal curing.
Wire-bondings 60 are realised so as to electrically interconnect pads of chip
50 to the contacts 30 of the connector. These wire-bondings can be performed with any kind of wire such as gold, copper, aluminium, or others. As described above, the last electrodeposited metal layers 35 can be adapted to any kind of wire-bonding technology.
As illustrated on figure 6, an overmolding operation is then carried out for constituting an encapsulating body 70 covering the chip 50 and the contact stacks 30. The overmolded body has an appropriate shape according to the dimensions necessary for such body. In an advantageous embodiment, the overmolded encapsulating body is the smart-card body per se, i.e. a plastic card having dimensions as defined in the international standards and having a thickness which is typically around 0,76mm, here measured above the metal substrate 10. The plastic body of a SIM - subscriber identification module- or of a credit card as examples are hence obtained directly by means of the overmolding step.
In the present example, the overmolding is carried out in one step and consists in overmolding the card body as a whole, here referenced, i.e. the finished product according to the dimensions as usually defined by the international standards relating to smart cards or SIM cards.
In another embodiment, overmolding consists in realising a module 70 comprising the smart card connector, the smart card chip and the interconnections there-between. Such module is thereafter inserted into a card body having a cavity specifically aimed at receiving such module. The module is then glued inside the cavity according to an assembling technique which is well known in the art.
Advantages of the invention remain when realising such a smart card module rather than realising the card body in one step at the overmolding step.
Thanks to the slope at the edges 36 of the contacts 30 which make an angle less than 90 degrees relative to the exposed surfaces of the substrate, the contacts are strongly anchored in the overmolded material hence preventing accidental extractions of the contacts 30 out of the overmolded material once solidified.
The substrate is preferably made of a belt which circulates, as a reel-to-reel process, from step to step of the previously described process. As illustrated on figure 7, the process as described is hence repeated for producing a continuous batch of connector-chip assemblies on a same belt of substrate. After the overmolding step, each pattern of contacts of a connector is still attached together onto the substrate 10. At his stage an additional process step like printing onto the card body can be carried out, taking advantage of the continuous belt format.
When all operations to be performed on the continuous tape have been done, the foil constituting the substratel O is easily peeled off as illustrated on figure 7, thanks to the surface treatment done at the beginning. The smart-cards are now separated from each other, and can go to the next process steps by batch. The contacts 30 of the card are now accessible.
In the case of a non-treated metal substrate such as a non-treated copper foil, removal is done after assembly and overmolding of the copper substrate by etching away the remaining copper which, contrary to the copper constituting the conductive layer 33 is not protected by a pattern plating, i.e. is not protected by the deposited layers 31 , 32 33 ,34, and 35. A chemical copper etching technique such as those used in the printed circuit board industry can be used with success for this purpose. This technology has disadvantage to need copper etching facilities in the facility realising the packaging i.e. the chip positioning and gluing and the overmolding of the connector and chip.
In the described process the same belt of substrate circulates between the different described steps. Thanks to the invention the patterns of contacts can hence be generated in a single and common manufacturing process with the assembly and overmolding of connectors and chips. The invention allows realising quickly and reliably a smart card in a same and single process for example in a facility usually dedicated only to assembly of connectors with chips.
In another implementation of the invention, substrate is supplied to an assembly facility with already deposited connectors according to the present invention. In such case first factory realises the electro-deposition of the patterns of contacts onto the conductive substrate and a distinct factory then assembles the chips with the connectors before the substrate is removed from the contacts in this second factory.

Claims

CLAIMS 1 . A method for manufacturing a card connector comprising the step of depositing layers (31 ,32,33,34,35) of connector materials onto a substrate (10) so as to constitute a pattern of contacts (30) of the connector and the step of removing the substrate (10) from the pattern of contacts (30) so as to expose the contacts (30), characterized in that the substrate to be removed (10) is made of conductive material and the method comprises the step of depositing at least one layer (31 ,32,33,34,35) of the pattern of contacts (30) by electro-deposition by making use of the substrate to be removed (10) as a conductor for electric current used in the electro-deposition.
2. The method according to claim 1 , comprising the step of forming a resist (20) on the substrate (10) which resist has a predetermined counter-pattern which is the negative of the pattern of contacts (10) and which resist leaves areas of the substrate (10) exposed to the electro-deposition.
3. The method according to claim 2, comprising the step of forming the resist (20) by first depositing a layer of resist material (20) and then removing portions of the layer of resist material (20) by photolithography.
4. The method according to claim 2 or claim 3, comprising the step of forming edges (21 ) of the resist (20) with a slope having an angle (A) relative to the exposed areas of the substrate which angle (A) has a value higher than 90 degrees.
5. The method according to anyone of claims 1 to 4, comprising the step of removing the resist (20) after at least one layer (31 ,32,33,34) of connector material has been deposited and before at least a last layer (35) of connector material is deposited, so that at least the last layer (35) covers sides of the layers (31 ,32,33,34) that have been deposited prior to removing the resist (20).
6. The method according to anyone of the preceding claims, wherein the substrate (10) is constituted of a material chosen in the group consisting of stainless steel, nickel, copper, aluminum.
7. The method according to anyone of the preceding claims, comprising the step of applying a treatment to the substrate (10) which lowers adhesion of the substrate to a layer of connector material (31 ) to be deposited on it.
8. The method according to the preceding claim, comprising the step of forming a layer of passivation onto the substrate (10).
9. The method according to anyone of the preceding claims, comprising the steps of:
providing a smart card chip (50),
interconnecting the smart card chip (50) with the pattern of contacts (30), overmolding one side of the substrate (10) so as to encapsulate the chip (50) and one side of the pattern of contacts (30), and
after the overmolding step, removing the substrate (10) so as to expose the pattern of contacts (30).
10. The method according to the preceding claim, comprising the step of overmolding a card body (70) in direct contact with the chip and in direct contact with one side of the contacts so as to encapsulate the chip (50) and one side of the pattern of contacts (30) in the card body and thereafter removing the substrate (10) so as to expose the pattern of contacts (30).
1 1 . The method according to anyone of the preceding claims, wherein the substrate (10) is a continuous tape carrying a plurality of card connectors (30) and circulating from a connector material (31 ,32,33,34,35) depositing station to an overmolding (70) station, and the tape is successively peeled off from successive connectors (30) once said connectors (30) have been overmolded.
12. A peel-off assembly (10,31 ,32,33,34,35) comprising a card connector with a pattern of contacts (30) and a substrate (10) supporting the pattern of contacts (30), the substrate (10) being capable of being peeled-off from the pattern of contacts (30) so that the pattern of contacts (30) is exposed when the substrate (10) is peeled-off, characterized in that the substrate (10) capable of being peeled-off is electrically conductive.
13. A tape comprising a substrate (10) of electro-conductive material to be removed and contacts electrodeposited on the substrate.
PCT/IB2011/001675 2011-06-08 2011-06-08 A method for manufacturing a card connector WO2012168752A1 (en)

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