CN111863689A - Package carrier, package and process thereof - Google Patents

Package carrier, package and process thereof Download PDF

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Publication number
CN111863689A
CN111863689A CN201910348827.4A CN201910348827A CN111863689A CN 111863689 A CN111863689 A CN 111863689A CN 201910348827 A CN201910348827 A CN 201910348827A CN 111863689 A CN111863689 A CN 111863689A
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China
Prior art keywords
metal electrode
package
carrier
area
packaging
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Granted
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CN201910348827.4A
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CN111863689B (en
Inventor
何雨桐
何忠亮
沈洁
胡大海
李金样
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Jiangxi Dinghua Xintai Technology Co ltd
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Accelerated Printed Circuit Board Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

A package carrier for carrying a package including a chip, comprising: a carrier sheet and a medium thinner than the carrier sheet; the medium includes any one of: release film, transition coating, or other medium capable of forming weak bonding force with the packaging body or the bearing sheet; for at least one surface of the bearing sheet, a part of area of the bearing sheet belongs to a medium area, the rest part of area at least comprises a first area and a second area, the first area belongs to an area to which a first metal electrode of a chip is connected, and the second area belongs to a second area to which a second metal electrode of the chip or a dummy sheet is not needed; the carrier sheet can be peeled off from the package body and reused for packaging the board. Therefore, the packaging carrier plate is simpler, avoids routing to the greatest extent, is more environment-friendly and has lower cost.

Description

Package carrier, package and process thereof
Technical Field
The present disclosure belongs to the field of electronics, and particularly relates to a package carrier.
Background
The integrated circuit industry is a fundamental and leading industry of the information-oriented society, wherein the packaging and testing of various integrated circuits is an important part of the entire industry chain. In terms of packaging technology, the main stream of packaging carrier mostly adopts HDI technology route, and the core of the HDI technology route lies in the formation of micro-via and fine circuit, however, the equipment and technology of the technology route have high threshold, large investment, need to match with a dedicated carrier substrate, and the size and thickness are limited by material specification.
How to design a simpler, more environment-friendly and lower-cost package carrier and a matching process thereof is a technical problem which needs to be solved urgently in the packaging industry.
Disclosure of Invention
To the deficiency of the prior art, the present disclosure discloses a package carrier, which is characterized in that:
the packaging carrier plate is used for bearing a packaging body comprising a chip;
the package carrier includes: a carrier sheet and a medium thinner than the carrier sheet;
the medium includes any one of: release film, transition coating, or other medium capable of forming weak bonding force with the packaging body or the bearing sheet;
for at least one surface of the bearing sheet, a part of area of the bearing sheet belongs to the medium area to which the medium is attached, the rest part of area at least comprises a first area and a second area, and: the first area belongs to an area to which a first metal electrode of the chip is attached, and the second area belongs to a second area to which a second metal electrode of the chip or a dummy wafer is not attached; a space exists between the first area and the second area;
the carrier sheet can be peeled off relative to the packaging body and repeatedly used for the packaging carrier plate.
Through the technical scheme, the novel packaging support plate is simple in structure, has the characteristics of being capable of being peeled, is beneficial to avoiding routing to the greatest extent, and can improve the production efficiency, reduce the cost and be more environment-friendly.
Drawings
FIG. 1-1 is a schematic structural diagram of one embodiment of the present disclosure;
FIGS. 1-2 are schematic structural views of another embodiment of the present disclosure;
FIGS. 1-3 are schematic structural views of another embodiment of the present disclosure;
FIG. 2 is a schematic structural diagram of another embodiment of the present disclosure;
FIG. 3 is a schematic structural diagram of another embodiment of the present disclosure;
FIG. 4-1 is a schematic structural diagram of another embodiment of the present disclosure;
FIG. 4-2 is a schematic structural diagram of another embodiment of the present disclosure;
FIGS. 4-3 are schematic structural views of another embodiment of the present disclosure;
FIG. 5-1 is a schematic structural diagram of another embodiment of the present disclosure;
FIG. 5-2 is a schematic structural diagram of another embodiment of the present disclosure;
FIGS. 5-3 are schematic structural views of another embodiment of the present disclosure;
FIG. 6-1 is a schematic structural diagram of another embodiment of the present disclosure;
FIG. 6-2 is a schematic structural diagram of another embodiment of the present disclosure;
6-3 are schematic structural views of another embodiment of the present disclosure;
FIG. 7-1 is a schematic structural diagram of another embodiment of the present disclosure;
FIG. 7-2 is a schematic structural diagram of another embodiment of the present disclosure;
fig. 8-1 through 8-8 are schematic diagrams of another embodiment of the present disclosure.
Detailed Description
The features and advantages of the present disclosure will become apparent from the following more particular description of the preferred embodiment of the present disclosure as illustrated in figures 1-1 through 8-8.
Referring to fig. 1-1, in one embodiment, a package carrier is disclosed:
the packaging carrier plate is used for bearing a packaging body comprising a chip;
the package carrier includes: a carrier sheet and a medium thinner than the carrier sheet;
the medium includes any one of: release film, transition coating, or other medium capable of forming weak bonding force with the packaging body or the bearing sheet;
for at least one surface of the bearing sheet, a part of area of the bearing sheet belongs to the medium area to which the medium is attached, the rest part of area at least comprises a first area and a second area, and: the first area belongs to an area to which a first metal electrode of the chip is attached, and the second area belongs to a second area to which a second metal electrode of the chip or a dummy wafer is not attached; a space exists between the first area and the second area;
the carrier sheet can be peeled off relative to the packaging body and repeatedly used for the packaging carrier plate.
As for the medium, it includes any of: release film, transition plating layer, or other medium capable of forming weak bonding force with the package body or the carrier sheet. Wherein fig. 1-2 and fig. 1-3 illustrate different situations of the medium, respectively.
For the technical solution of the above embodiment, since the medium is thinner than the carrier sheet, the medium is attached to the carrier sheet, and the metal electrode is attached to the carrier sheet, when the medium includes any one of the following: when the release film, the transition coating or other media which can form weak bonding force with the packaging body or the bearing sheet, the bearing sheet and the packaging body have the structural characteristic of being capable of being peeled, so that the packaging carrier plate further has the technical effects of simple structure, improvement of packaging efficiency, cost reduction and environmental protection. Furthermore, the carrier sheet can be repeatedly used for the package carrier plate, so that the carrier sheet can be repeatedly used until the indexes such as physical or electrical performance and the like do not meet the package requirements any more, and the overall cost of the technical scheme is greatly reduced.
It can be understood that, in the case of the medium, it is thinner than the carrier sheet on the one hand, and on the other hand, it needs to form a weak bonding force with the package or the carrier sheet to facilitate peeling of the carrier sheet relative to the package, and specific examples are as follows:
(1) when the carrier sheet is peeled off with respect to the package, if the medium is of a type that can form a weak bonding force with the package, the medium will be in a separated state with the carrier sheet from the package, for example, in the case where the medium is the above-mentioned release film: the release film medium is combined with the carrier sheet in a liquid state and is solidified, and the bonding force of the solidified release film when the solidified release film is bonded with other substances (such as a packaging body) belongs to the category of weak bonding force. The release film may include various different types of release films.
(2) When the carrier sheet is peeled off from the package, if the medium is of a type that can form a weak bonding force with the carrier sheet, the medium will be separated from the carrier sheet along with the package, for example, in the case where the medium is the above-mentioned transition plating layer: because of the characteristics of the plating process, the bonding force between the bearing sheet and the transition plating layer belongs to the category of weak bonding force, so that after the bearing sheet is stripped relative to the packaging body, the transition plating layer can still belong to the packaging body, the transition plating layer and the packaging body can still be adhered together, and the transition plating layer and the bearing sheet are in a separated state. The transition plating layer may be formed by gold plating, silver plating, nickel plating, copper plating, or the like, and preferably, the transition plating layer is formed by copper plating.
(3) Naturally, when the medium is thinner than the carrier sheet and belongs to other media that can form a weak bonding force with the package or the carrier sheet, then the medium at this time is also beneficial for the carrier sheet to be peeled relative to the package, or the medium and the carrier sheet can still be adhered together after peeling, or the medium and the package can still be adhered together after peeling.
It can be understood that the carrier sheet is a base, the dielectric region and the first and second regions are all located on one side of the carrier sheet, and theoretically, the dielectric region and the upper portions of the first and second regions can be used for carrying the package. When the carrier sheet is peeled off with respect to the package, the carrier sheet shown in fig. 1-1 to 1-3 may be an actively peeled-off side, and the package may also be an actively peeled-off side. The package includes various different packaging forms of the integrated circuit. The dielectric region, the first region and the second region are used for facilitating the formation of the electrode corresponding region and the non-electrode corresponding region in the packaging process.
For the above embodiments, the more important features are: when the package carrier is used in the package body including the chip, even if there is only one chip on the first metal electrode, since there is a second metal electrode, this means: in the packaging process, the single chip is not required to be wire bonded, and the packaging carrier plate can be electrically connected with the second metal electrode according to the single chip. See the package process and package further below.
That is to say, compared with the conventional process, the packaging carrier plate does not need a routing process, and even does not need multiple packaging resin and pattern transfer processes in the packaging process, so that the packaging process is obviously simpler and has higher efficiency.
In another embodiment, the height of each metal electrode and the thickness of the dielectric can be designed according to the requirements of a specific package. In addition, according to different designs, the height of each metal electrode can be slightly higher/lower than the thickness of the medium, can be obviously higher/lower than the thickness of the medium, and can be even.
In another embodiment, the first and second metal electrodes may comprise a plurality of electrode forms.
In another embodiment, if one side of the first and second metal electrodes contacting the carrier sheet is used as the bottom surface of the metal electrode, the other side of the metal electrode opposite to the bottom surface of the metal electrode, i.e. the surface of the metal electrode, may be further surface-treated according to the package requirements, such as: gold plating, silver plating, tin plating, coarsening, oxidation prevention, passivation treatment, protective layer covering and the like. More preferably, the surface of the metal electrode may be subjected to die bonding, wire bonding, welding, plastic sealing, or the like. These surface treatments are performed as described in the first embodiment above, wherein the chip is attached to the first metal electrode.
In another embodiment of the present invention, the substrate is,
the first metal electrode and the second metal electrode are realized by electroplating on the bearing sheet.
Although the above-mentioned embodiments use electroplating to form the electrodes, this does not mean that only electroplating can be used, depending on whether there are other ways in the technology development process to form the electrodes on the carrier sheet, such as growing electrodes or spraying electrodes.
It can be understood that there is a situation: when the release film is used as a medium, if the release film covers all the areas of the carrier sheet in advance, the release film of the area needing electroplating can be removed firstly, the carrier sheet is exposed, and the metal electrode is electroplated on the carrier sheet. Naturally, the thickness of the dielectric layer is determined according to the thickness of the required plating layer, but the dielectric property of electroplating is required to be satisfied; if the plating layer required by the metal electrode is relatively thick, a layer of photosensitive material such as a dry film or a wet film can be covered on the release film, the region required to be plated is exposed in an exposure and development mode, and then the region exposed on the bearing sheet is plated to form the metal electrode. Similarly, there is also a case: when the transition plating layer is used as a medium, if the transition plating layer covers all areas of the bearing sheet in advance, the metal electrode can be formed by electroplating in the following way: firstly, covering a layer of dry film type photosensitive material on the transition plating layer corresponding to the electroplating area, exposing and developing, then removing the transition plating layer in an etching mode to expose the corresponding electroplating area on the bearing sheet, and then electroplating the exposed area on the bearing sheet to form the metal electrode.
Referring to fig. 2, in another embodiment,
an insulating layer is attached to the dielectric region. It will be appreciated that the insulating layer is required for the packaging process, which is common in packaging processes, but not for all packaging processes. Like before, the present embodiment is intended to emphasize: and under the condition that the insulating layer is needed, when the bearing sheet is stripped relative to the packaging body, the insulating layer belongs to the packaging body.
More preferably, at least a portion of the insulating layer is attached to the first and/or second metal electrode. Obviously, when provided with an insulating layer, the package carrier may implement a multi-layer design, and more specific examples are described in detail below. In view of the foregoing description of the other embodiments, it can be understood that the present disclosure may use the package carrier with the peeling property in a multi-layer process of a package, and still make the carrier have the property of being easily peeled.
In another embodiment of the present invention, the substrate is,
and when the bearing sheet is stripped relative to the packaging body, the first metal electrode and the second metal electrode belong to the packaging body.
With respect to this embodiment, it means that, by using the package carrier described in this embodiment, after the peeling, the metal electrode can still be integrated with the package body, that is, the metal electrode can still be connected to and affiliated with the package body. This illustrates just another attendant benefit of the present embodiment: the peelable carrier sheet can improve packaging efficiency and reduce cost.
In another embodiment of the present invention, the substrate is,
at least one of the first and second metal electrodes comprises a first attachment, and when the carrier sheet is peeled off relative to the package, the first attachment is attached to the package.
It is understood that the first attachment on the metal electrode can be any reasonable attachment on the metal electrode in the packaging process of the integrated circuit, including various attachment possibilities such as glue, film, insulating layer, bonding wires, IC, etc. As with the previous embodiment, this embodiment is intended to emphasize: after the carrier sheet is peeled off, the related attachments can still be connected and belonged to the packaging body.
In another embodiment, the carrier sheet is in the form of a tape. It will be appreciated that the carrier sheet may be of any shape convenient for manufacture, and the strip shape is advantageous for pipelining.
Preferably, in another embodiment, the length direction of the carrier sheet is in a closed loop mode. It will be appreciated that the carrier sheet is generally rectangular in shape, extending in the transverse direction, and the carrier sheet has two sides, the length direction being the long side. When the length direction of the bearing sheet is in a closed loop mode, uninterrupted production is facilitated, and the efficiency of subsequent packaging is greatly improved.
In another embodiment of the present invention, the substrate is,
the carrier sheet comprises any one of the following components: stainless steel with low thermal expansion coefficient, or other metals with thermal expansion coefficient matched with the plastic package resin.
It can be understood that the carrier sheet is selected in this embodiment. For the embodiment, the carrier sheet is selected by the thermal expansion coefficient, so as to overcome the negative influence of thermal expansion in the packaging process. It should be noted that, according to the foregoing description of the basic solutions and the principles of the present disclosure, as the technology develops, the present disclosure does not exclude non-metal materials as the carrier sheet.
In another embodiment, the insulating layer is attached to the package after the carrier is peeled off from the package. As with this embodiment, this embodiment is intended to emphasize: after the bearing sheet is stripped, the insulating layer can still be connected and belonged to the packaging body. This means that the package carrier disclosed by the present disclosure may be used for: and packaging the package body containing the insulating layer.
More preferably, the insulating layer includes a second attachment thereon, and the second attachment belongs to the package after the carrier sheet is peeled off from the package. It will be appreciated that the second attachment on the insulating layer may be any reasonable attachment on the insulating layer including various attachment possibilities such as glue, film, electrodes, bonding wires, ICs, etc. during the packaging process of the integrated circuit. As with the previous embodiments, this embodiment is intended to emphasize: after the carrier sheet is peeled off, the related attachments can still be connected and belonged to the packaging body.
Referring to fig. 3, in another embodiment, a conductive paste may be further attached to the insulating layer to meet the requirements of some packaging processes.
More preferably, the conductive paste may be an electroplatable conductive paste.
Referring to fig. 4-1, in another embodiment, in a packaging process without an insulating layer, a metal electrode and a release film are attached to a carrier sheet, and a glue is sequentially attached to the metal electrode and the release film (corresponding to a dielectric region and a second region) and a substrate is further attached to the glue.
Referring to fig. 4-2 and 4-3, respectively, it is schematically shown that in the packaging process with the insulating layer, a conductive paste is further attached on the insulating layer, and the conductive paste is preferably an electroplatable conductive paste: the metal electrode and the release film are attached on the carrier sheet, and the insulating layer, the conductive paste capable of being electroplated and the glue are sequentially attached on the metal electrode and the release film (corresponding to the dielectric region and the second region), and the substrate is further attached on the glue.
It can be seen that in the case shown in fig. 4-2, 4-3, the conductive paste or the electroplatable conductive paste not only covers the insulating layer but also can make a crossover between the metal electrode and the metal electrode. The three metal electrodes shown in fig. 4-2 are not named as a first metal electrode, a second metal electrode, and a third metal electrode from left to right, and it is obvious that the conductive paste bridges between the first metal electrode and the third metal electrode.
With respect to the two embodiments set forth herein in the text of fig. 4-2, 4-3 and the accompanying drawings, it is noted that: the insulating layer may be used for electrical isolation, and the conductive paste over the insulating layer enables electrical communication across both ends of the insulating layer due to the crossover between the different metal electrodes. At this time, the package carrier is obviously beneficial to realizing the package of the double-sided circuit.
In another embodiment, in order to meet certain packaging requirements, the conductive paste and the metal electrode may be further subjected to pattern plating, i.e., patterning the surfaces of the conductive paste and the metal electrode. It can be understood that the metal layer obtained by the pattern plating can be electrically connected to the bottom of the metal electrode (i.e. the portion of the metal electrode contacting the carrier sheet, which can be referred to as the bottom electrode) or other electrodes required to be connected according to the package requirements. Preferably, in another embodiment, the patterned relevant surface may be further processed according to the packaging requirement: metal thickening, surface treatment, etching and the like.
For the above embodiments, further pattern plating can improve the electrical conductivity and surface characteristics of the cross-over region, reduce resistivity, and improve the conductive surface, which is especially important in high frequency application environment, especially when the skin effect is significant.
In another embodiment of the present invention, the substrate is,
the release film comprises a third attachment, and when the carrier sheet is peeled relative to the packaging body, the third attachment belongs to the packaging body. It can be understood that the third attachment on the release film can be any reasonable attachment on the release film in the packaging process of the integrated circuit, including various attachment possibilities of photosensitive film, dry film, insulating film, glue, electrode, bonding wire, IC, etc. As with the previous embodiments, this embodiment is intended to emphasize: after the carrier sheet is peeled off, the related attachments can still be connected and belonged to the packaging body.
In another embodiment, when various types of films, such as a photosensitive film or a dry film or an insulating film, are included on the release film, the above various types of films on the release film may be further processed by exposure, development, or laser burning, so that: one part of the area of the bearing sheet belongs to the medium area attached to the release film, and at least another part of the area of the bearing sheet belongs to the area attached to the first metal electrode and the second metal electrode.
Further, in another embodiment, the above films on the release film can be further processed as follows:
first, the photosensitive film, the dry film or the insulating film is removed;
Secondly, covering an insulating coating on the release film;
thirdly, carrying out metallization treatment on the insulating coating to obtain a metal layer on the release film;
thirdly, communicating the metal layer on the release film with a bottom electrode, wherein the bottom electrode refers to the part of the metal electrode, which is contacted with the carrier sheet;
thirdly, patterning the metal layer on the release film, thickening, surface treating and etching the metal of the metal layer on the release film;
and thirdly, carrying out packaging processes such as die bonding, wire welding, plastic packaging and the like on the metal layer on the release film.
It can be understood that the above embodiments are examples of further processing cases of the release film on the package carrier according to the present disclosure.
In another embodiment, fig. 5-1 shows that the third adhesive on the release film is a dry film (for example, a dry film is attached on the release film), a metal electrode pattern is formed and the metal electrode belongs to a conventional electrode, and shows 3 metal electrodes. It can be understood that the thickness of the dry film is related to the thickness of the metal electrode.
In another embodiment, fig. 5-2 illustrates the case where the respective metal electrodes are formed in the pattern region and the solderable metal is plated on the surface.
In another embodiment, fig. 5-3 illustrate isolation of electrodes into a "T" shape in order to remove the dry film around the electrodes. It can be appreciated that the T-shaped electrodes facilitate embedding of the encapsulation resin paste in a later process to make it more robust.
The above further schematic diagrams and embodiments illustrate in detail how the package carrier of the present disclosure can be used in related application scenarios in the field when the dielectric is a release film. When the carrier sheet is peeled therefrom, the release film tends to follow the carrier sheet.
The following illustrates, by means of other embodiments and schematic diagrams, how the package carrier according to the present disclosure can be used in related application scenarios in the field when the medium is a transition plating layer. When the carrier sheet is peeled off, the transition plating tends to follow the package.
In another embodiment, fig. 6-1 illustrates a case where the deposit on the transition plating layer is a dry film and the metal electrode is a conventional electrode, and illustrates a case of 3 metal electrodes.
In another embodiment, fig. 6-2 illustrates a case where the deposit on the transition plating layer is a resin and the metal electrode is a conventional electrode, and illustrates a case of 3 metal electrodes. In contrast, in another embodiment, FIGS. 6-3 illustrate the case of a shaped electrode, such as a T-shaped electrode, and illustrate the case of 3 metal electrodes.
In another embodiment, FIG. 7-1 illustrates the carrier sheet of FIG. 6-3 after it has been peeled away; FIG. 7-2 further illustrates the removal of the overplate in another embodiment.
In addition, for the embodiments of the release film, the carrier sheet and the release film can be peeled off first, and the carrier sheet and the release film can be peeled off after the encapsulation. This is advantageous for the division of the industry, which means that the packages can be provided to the customer after the carrier has been peeled off by the supplier of the supply chain, or the mixed product together with the package carrier and the packages can be delivered directly to the customer and the carrier peeled off by the customer.
For the above embodiments, even if two layers of different attachments cannot be achieved in the conventional process capability (mainly referring to the line width and line pitch), if the electrical connection relationship between different electrodes is still not achieved, then it is considered to add the layer of attachments to achieve the electrical connection between different electrodes. That is, in theory, each attachment described above may be two to N layers, where N is a positive integer. Thus, the package carrier of the present disclosure may be used for RGB LED package carriers, BGA-like IC package carriers, and the like. In addition, it should be noted that, as mentioned above, the insulating layer can be used to realize a multi-layer design, and if a reasonable design is made, electrode layers can be designed on the bottom and the upper portion of the insulating layer, and each electrode layer can be realized by electroplating. That is, the insulating layer, each attachment, and the like of the present disclosure may have a multi-layer structure, and may be used to achieve electrical communication between different electrodes. Similarly, the attachment on each metal electrode may have a multi-layer structure, and further, the metal electrode and the insulating layer may overlap and be spaced to form a multi-layer structure, such as an insulating layer on which the metal electrode is disposed, and an insulating layer on which the metal electrode is disposed, or: a metal electrode, an insulating layer on the metal electrode, and a metal electrode on the insulating layer.
It should be noted that, for the various embodiments described above, when the carrier sheet is peeled off from the metal electrode or the insulating layer or the attachment or some kind of package, an adhesive transfer may be used to transfer the metal electrode or the insulating layer or the attachment or some kind of package onto the transfer, and for example, the bonding and the transfer may be implemented as follows: (1) using a pressure sensitive adhesive of sufficient viscosity; (2) using UV viscosity-reducing adhesive with enough viscosity, and irradiating UV light after the transfer is completed to reduce the viscosity of the UV adhesive; (3) heating, bonding and transferring by using a hot melt adhesive, wherein the hot melt adhesive is not sticky at normal temperature after the transfer is finished; (4) and (4) adhering and transferring by using a thermosetting hot melt adhesive, and heating and curing the hot melt adhesive after the transfer is finished.
Together with all the above embodiments, the present disclosure can effectively control the equal layer thickness of each electrode layer, thereby greatly saving the metal required for electroplating compared with the prior art, especially in high frequency application scenarios. In addition, the carrier sheet of the present disclosure does not require a thicker copper layer for support, and also significantly saves metal. More particularly, the package carrier of the present disclosure enables: in the packaging process, a single chip does not need to be subjected to routing, a routing process is not needed in comparison with the traditional process, even multiple times of packaging resin and pattern transfer processes are not needed in the packaging process, the packaging process is obviously simpler, the efficiency is higher, and in addition, the bearing sheet can be repeatedly used, so that the packaging carrier plate is beneficial to further ensuring that the packaging process is more environment-friendly and the cost is lower.
Preferably, in another embodiment,
the electrical conduction relation is realized by the following method:
and (4) directly performing laser drilling, electroplating and pattern transfer to perform electrical conduction.
Referring to fig. 8-1 to 8-8, the present disclosure discloses in detail a packaging process comprising the steps of:
s120: providing a carrier sheet with a thinner media than the carrier sheet;
s220: arranging a first metal electrode in a first area on the carrier sheet provided with the medium, and arranging a second metal electrode in a second area of the initial packaging carrier plate, wherein a gap exists between the first area and the second area;
s320: arranging a chip on the first metal electrode;
s420: carrying out primary plastic package on the bearing sheet and the medium thereof, the first metal electrode and the chip thereof, and the second metal electrode through first plastic package resin adhesive, so that the first plastic package resin adhesive is higher than the chip;
s520: laser drilling is respectively carried out at the plastic package positions above the chip and the second metal electrode, and the upper surface of the chip and the upper surface of the second metal electrode are exposed;
s620: electroplating a metal coating between the upper surface of the chip and the upper surface of the second metal electrode along the surface of the primary plastic package;
S720: performing secondary plastic packaging on the metal coating along the surface subjected to the primary plastic packaging by using a second plastic packaging resin adhesive;
s820: stripping the bearing sheet to expose the lower surfaces of the first metal electrode and the second metal electrode to obtain a packaging body, and,
after stripping, the lower surface of the first metal electrode and the lower surface of the second metal electrode are closer to the bottom surface of the package body than the upper surface of the first metal electrode and the upper surface of the second metal electrode;
at the position of the bottom resin surface of the packaging body of the first metal electrode, the difference between the outer diameter of the corresponding first metal electrode and the outer diameter of the lower surface of the first metal electrode is within 20 um;
at the position of the bottom resin surface of the packaging body of the second metal electrode, the difference between the outer diameter of the corresponding second metal electrode and the outer diameter of the lower surface of the second metal electrode is within 20 um;
and then plating a solderable metal or performing various surface treatments on the lower surfaces of the first metal electrode and the second metal electrode respectively.
It can be appreciated that the above process directly leads to: after stripping, the lower surface of the corresponding metal electrode can still be conveniently subjected to surface treatment without any etching. This is fundamentally different from the prior art. In the prior art, etching is required before surface treatment is carried out on the lower surface of the metal electrode, but in order to avoid damaging the lower surface, the lower surface of the metal electrode needs to be kept during etching so as to prevent the lower surface of the metal electrode from being damaged, so that the outer diameter of the lower surface of the metal electrode is often larger than that of the metal electrode corresponding to a half of the thickness of the metal electrode. Whereas the present disclosure does not require etching on the one hand and on the other hand, after stripping, the corresponding outer diameters are almost the same, within 20um, e.g. AA 'and BB' are almost the same in fig. 8-8, i.e. at most 20um apart.
It can be seen that in another embodiment, the present disclosure also discloses a package comprising:
a bottom surface of the package, a top surface of the package, a first metal electrode in the package, a second metal electrode in the package, a chip in the package, wherein,
a space is arranged between the first metal electrode and the second metal electrode; and relative to the top surface of the packaging body, the first metal electrode and the second metal electrode are close to one side of the bottom surface of the packaging body;
the chip is arranged on the upper surface of the first metal electrode, and no chip or dummy wafer is arranged on the upper surface of the second metal electrode; and the chip in the package body is closer to the top surface of the package body than the first metal electrode and the second metal electrode; the thicknesses of the first metal electrode and the second metal electrode are consistent;
the first metal electrode, the chip, and: the second metal electrode has an electrical conduction relation;
relative to the upper surface of the first metal electrode and the upper surface of the second metal electrode, the lower surface of the first metal electrode and the lower surface of the second metal electrode are closer to the bottom surface of the packaging body;
at the position of the bottom resin surface of the packaging body of the first metal electrode, the difference between the outer diameter of the corresponding first metal electrode and the outer diameter of the lower surface of the first metal electrode is within 20 um;
And the position of the bottom resin surface of the packaging body of the second metal electrode corresponds to the outer diameter of the second metal electrode, and the difference between the outer diameter of the lower surface of the second metal electrode and the outer diameter of the lower surface of the second metal electrode is within 20 um.
The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure, and general changes and substitutions by those skilled in the art within the technical scope of the present disclosure should be included in the protection scope of the present disclosure.

Claims (12)

1. A package carrier, comprising:
the packaging carrier plate is used for bearing a packaging body comprising a chip;
the package carrier includes: a carrier sheet and a medium thinner than the carrier sheet;
the medium includes any one of: release film, transition coating, or other medium capable of forming weak bonding force with the packaging body or the bearing sheet;
for at least one surface of the bearing sheet, a part of area of the bearing sheet belongs to the medium area to which the medium is attached, the rest part of area at least comprises a first area and a second area, and: the first area belongs to an area to which a first metal electrode of the chip is attached, and the second area belongs to a second area to which a second metal electrode of the chip or a dummy wafer is not attached; a space exists between the first area and the second area;
The carrier sheet can be peeled off relative to the packaging body and repeatedly used for the packaging carrier plate.
2. The package carrier of claim 1, wherein: preferably, the first and second liquid crystal materials are,
an insulating layer is attached to the medium region, and when the bearing sheet is stripped relative to the packaging body, the insulating layer belongs to the packaging body.
3. The package carrier of claim 1, wherein:
the first metal electrode and the second metal electrode are realized by electroplating on the bearing sheet.
4. The package carrier of claim 1, wherein:
and when the bearing sheet is stripped relative to the packaging body, the first metal electrode, the second metal electrode and the chip belong to the packaging body.
5. The package carrier of claim 1, wherein:
the first metal electrode comprises a first attachment, and when the bearing sheet is peeled relative to the packaging body, the first attachment belongs to the packaging body.
6. The package carrier of claim 1, wherein:
the bearing sheet has any one of the following characteristics: sheet, strip, long direction is a closed loop pattern.
7. The package carrier of claim 1, wherein:
the carrier sheet comprises any one of the following components: stainless steel with low thermal expansion coefficient, or other metals with thermal expansion coefficient matched with the plastic package resin.
8. The package carrier of claim 2, wherein:
the insulating layer comprises a second attachment, and when the bearing sheet is stripped relative to the packaging body, the second attachment belongs to the packaging body.
9. The package carrier of claim 5 or 8, wherein:
the attachment has a multi-layer structure.
10. A package, comprising:
a bottom surface of the package, a top surface of the package, a first metal electrode in the package, a second metal electrode in the package, a chip in the package, wherein,
a space is arranged between the first metal electrode and the second metal electrode; and relative to the top surface of the packaging body, the first metal electrode and the second metal electrode are close to one side of the bottom surface of the packaging body;
the chip is arranged on the upper surface of the first metal electrode, and no chip or dummy wafer is arranged on the upper surface of the second metal electrode; and the chip in the package body is closer to the top surface of the package body than the first metal electrode and the second metal electrode; the thicknesses of the first metal electrode and the second metal electrode are consistent;
the first metal electrode, the chip and the second metal electrode are in electrical conduction relation;
Relative to the upper surface of the first metal electrode and the upper surface of the second metal electrode, the lower surface of the first metal electrode and the lower surface of the second metal electrode are closer to the bottom surface of the packaging body;
relative to the upper surface of the first metal electrode and the upper surface of the second metal electrode, the lower surface of the first metal electrode and the lower surface of the second metal electrode are closer to the bottom surface of the packaging body;
at the position of the bottom resin surface of the packaging body of the first metal electrode, the difference between the outer diameter of the corresponding first metal electrode and the outer diameter of the lower surface of the first metal electrode is within 20 um;
and the position of the bottom resin surface of the packaging body of the second metal electrode corresponds to the outer diameter of the second metal electrode, and the difference between the outer diameter of the lower surface of the second metal electrode and the outer diameter of the lower surface of the second metal electrode is within 20 um.
11. The package of claim 10, wherein the electrical continuity is achieved by:
after plastic packaging of a layer of resin, laser drilling, metal plating and pattern transfer are directly carried out on the resin at the position of the chip and the resin at the position of the second metal electrode, and electrical conduction is carried out.
12. A packaging process comprising the steps of:
s120: providing a carrier sheet with a thinner media than the carrier sheet;
s220: arranging a first metal electrode in a first area on the carrier sheet provided with the medium, and arranging a second metal electrode in a second area of the initial packaging carrier plate, wherein a gap exists between the first area and the second area;
s320: arranging a chip on the first metal electrode;
s420: carrying out primary plastic package on the bearing sheet and the medium thereof, the first metal electrode and the chip thereof, and the second metal electrode through first plastic package resin adhesive, so that the first plastic package resin adhesive is higher than the chip;
s520: laser drilling is respectively carried out at the plastic package positions above the chip and the second metal electrode, and the upper surface of the chip and the upper surface of the second metal electrode are exposed;
s620: plating a metal coating and pattern transfer between the upper surface of the chip and the upper surface of the second metal electrode along the surface of the primary plastic package to realize electrical conduction;
s720: performing secondary plastic packaging on the metal coating along the surface subjected to the primary plastic packaging by using a second plastic packaging resin adhesive;
s820: stripping the bearing sheet to expose the lower surfaces of the first metal electrode and the second metal electrode to obtain a packaging body, and,
After stripping, the lower surface of the first metal electrode and the lower surface of the second metal electrode are closer to the bottom surface of the package body than the upper surface of the first metal electrode and the upper surface of the second metal electrode;
at the position of the bottom resin surface of the packaging body of the first metal electrode, the difference between the outer diameter of the corresponding first metal electrode and the outer diameter of the lower surface of the first metal electrode is within 20 um;
at the position of the bottom resin surface of the packaging body of the second metal electrode, the difference between the outer diameter of the corresponding second metal electrode and the outer diameter of the lower surface of the second metal electrode is within 20 um; and then respectively carrying out surface treatment on the lower surfaces of the first metal electrode and the second metal electrode.
CN201910348827.4A 2019-04-25 2019-04-25 Packaging carrier plate, packaging body and process thereof Active CN111863689B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113643991A (en) * 2021-06-29 2021-11-12 华宇华源电子科技(深圳)有限公司 Novel board-level plastic package processing method and structure

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1674269A (en) * 2004-03-26 2005-09-28 株式会社能洲 Interlayer member used for producing multi-layer wiring board and method of producing the same
JP2013153124A (en) * 2011-10-20 2013-08-08 Nitto Denko Corp Method for manufacturing semiconductor device
TW201448139A (en) * 2013-06-03 2014-12-16 Powertech Technology Inc Embedded substrate package and the method of making the same
CN105244307A (en) * 2015-09-01 2016-01-13 华进半导体封装先导技术研发中心有限公司 Manufacturing method of fan-out type packaging structure
JP2017045867A (en) * 2015-08-27 2017-03-02 古河電気工業株式会社 Manufacturing method of component built-in wiring board, component built-in wiring board, and electronic component fixing tape
CN106611747A (en) * 2015-10-21 2017-05-03 力成科技股份有限公司 A die seal interconnection substrate and a manufacturing method thereof
CN209496814U (en) * 2019-04-25 2019-10-15 深圳市环基实业有限公司 A kind of encapsulating carrier plate, packaging body

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1674269A (en) * 2004-03-26 2005-09-28 株式会社能洲 Interlayer member used for producing multi-layer wiring board and method of producing the same
JP2013153124A (en) * 2011-10-20 2013-08-08 Nitto Denko Corp Method for manufacturing semiconductor device
TW201448139A (en) * 2013-06-03 2014-12-16 Powertech Technology Inc Embedded substrate package and the method of making the same
JP2017045867A (en) * 2015-08-27 2017-03-02 古河電気工業株式会社 Manufacturing method of component built-in wiring board, component built-in wiring board, and electronic component fixing tape
CN105244307A (en) * 2015-09-01 2016-01-13 华进半导体封装先导技术研发中心有限公司 Manufacturing method of fan-out type packaging structure
CN106611747A (en) * 2015-10-21 2017-05-03 力成科技股份有限公司 A die seal interconnection substrate and a manufacturing method thereof
CN209496814U (en) * 2019-04-25 2019-10-15 深圳市环基实业有限公司 A kind of encapsulating carrier plate, packaging body

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113643991A (en) * 2021-06-29 2021-11-12 华宇华源电子科技(深圳)有限公司 Novel board-level plastic package processing method and structure

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