JPS62140489A - Printed circuit substrate - Google Patents

Printed circuit substrate

Info

Publication number
JPS62140489A
JPS62140489A JP28145285A JP28145285A JPS62140489A JP S62140489 A JPS62140489 A JP S62140489A JP 28145285 A JP28145285 A JP 28145285A JP 28145285 A JP28145285 A JP 28145285A JP S62140489 A JPS62140489 A JP S62140489A
Authority
JP
Japan
Prior art keywords
layer
printed circuit
soft
hard
hard layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28145285A
Other languages
Japanese (ja)
Inventor
徹 樋口
敏行 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP28145285A priority Critical patent/JPS62140489A/en
Publication of JPS62140489A publication Critical patent/JPS62140489A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [技術分野] 本発明は、ワイヤーボンディング用のボンディング部と
接点用の接点部とが同一プリント上に形成されるプリン
ト基板に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a printed circuit board in which a bonding part for wire bonding and a contact part for contacts are formed on the same print.

[背景技術] 従来、プリント基板上にワイヤーボンディング用のボン
ディング部と、接点、摺動接点用の接点部とを形成する
にあたっては、第3図に示すようにガラス・エポキシ等
で形成される基板1上に回路導体2を形成した後、選択
的に他の部分をマスク(覆って保護)シながらワイヤー
ボンディングの必要な部分には軟質層9をメッキし、ま
た接点、摺動接点の必要な部分には耐摩耗性の良い硬質
含10をメッキするようにしており、このように基板1
の表面をマスクしたり、あるいは剥がしたりしながら順
次繰り返しボンディング部5と接点部6とを形成する必
要があって、作業が繁雑であり、またマスクの位置精度
のバラツキがあり、しかもマスク剤の残渣等がプリント
基板の品質を者しく低下させる恐れがあった。なお、図
中8は回路導体2のニッケル層である。
[Background Art] Conventionally, when forming a bonding part for wire bonding, a contact part, and a contact part for a sliding contact on a printed circuit board, a board made of glass epoxy, etc. is used as shown in FIG. After forming the circuit conductor 2 on the circuit conductor 1, a soft layer 9 is plated on the parts where wire bonding is required, while selectively masking (covering and protecting) other parts, and where the contacts and sliding contacts are required. The parts are plated with a hard coating containing 10, which has good wear resistance.
It is necessary to sequentially and repeatedly form the bonding part 5 and the contact part 6 while masking or peeling off the surface of the mask, which is a complicated process. Furthermore, the positional accuracy of the mask varies, and the masking agent There was a fear that the residue etc. would seriously deteriorate the quality of the printed circuit board. In addition, 8 in the figure is a nickel layer of the circuit conductor 2.

[発明の目的1 本発明は上記の点に鑑みて成されたものであって、基板
表面をマスクしたり、あるいは剥がしたりする必要なく
基板表面にワイヤーボンディング用のボンディング部と
接点用の接点部とを形成することができるプリント基板
を提供することを目的とするものである。
[Objective of the Invention 1] The present invention has been made in view of the above points, and provides bonding parts for wire bonding and contact parts for contacts on the substrate surface without the need to mask or peel off the substrate surface. It is an object of the present invention to provide a printed circuit board that can form the following.

[発明の開示] すなわち、本発明のプリント基板は、基板1の少なくと
も片側表面に回路導体2を形成し、回路導体2の表面に
硬質含にて形成される硬質層3を積層すると共に硬質W
i3の表面に軟質層にて形成される軟質層4を積層して
成ることを特徴とするもので、硬質層3と軟質層4の二
重構造として、ワイヤーボンディング部5として利用す
る場合には表層の軟質層4を使用し、また内層には硬質
層3が形成されているために接点部6としても支障なく
使用でとるようにしたものである。
[Disclosure of the Invention] That is, the printed circuit board of the present invention has a circuit conductor 2 formed on at least one surface of a substrate 1, a hard layer 3 made of a hard material laminated on the surface of the circuit conductor 2, and a hard layer 3 made of a hard material.
It is characterized by laminating a soft layer 4 formed of a soft layer on the surface of the i3, and when used as a wire bonding part 5 as a double structure of a hard layer 3 and a soft layer 4. Since a soft surface layer 4 is used and a hard layer 3 is formed on the inner layer, it can be used as a contact portion 6 without any problem.

以下本発明を実施例に基づいて詳述する。基板1として
は、プラス布などの基材にエポキシ樹脂などの樹脂フェ
スを含浸させて加熱乾燥したプリプレグや、このプリプ
レグを複数枚積層して形成される積層板、あるいは樹脂
を板状に硬化して形成される樹脂板等を使用することが
でき、この基板1の少なくとも片側表面には回路導体2
が形成されている。この回路導体2は、銅、銅・ニッケ
ル合金等で形成され、通常のプリント基板のメッキ工法
で形成することができ、この実施例では銅/I 7とニ
ッケル層8とで形成されている。この回路導体2の表面
には硬質含にて形成される硬質層3が積層され、硬質層
3の表面には軟質層にて形成される軟質NJ4が積層さ
れている。硬質層3を形成する硬質含は金にニッケルな
どの光沢剤、不純物等を0.1%以上含む合金であって
、硬度が高く、耐摩耗性に優れているものである。また
、軟質層は純度99.9%以上の金であって、軟質なも
のである。これらの硬質層3及び軟質層4は通常の電気
メッキにて付着させることができる。
The present invention will be described in detail below based on examples. The substrate 1 may be a prepreg made by impregnating a base material such as plastic cloth with a resin face such as epoxy resin and drying it by heating, a laminate formed by laminating a plurality of prepregs, or a laminate formed by curing the resin into a plate shape. A resin plate or the like formed by the substrate 1 can be used, and the circuit conductor 2 is provided on at least one surface of the substrate 1.
is formed. The circuit conductor 2 is made of copper, copper/nickel alloy, etc., and can be formed by a normal printed circuit board plating method, and in this embodiment is made of copper/I 7 and a nickel layer 8. A hard layer 3 formed of a hard layer is laminated on the surface of the circuit conductor 2, and a soft NJ 4 formed of a soft layer is laminated on the surface of the hard layer 3. The hard layer forming the hard layer 3 is an alloy containing 0.1% or more of gold, a brightening agent such as nickel, impurities, etc., and has high hardness and excellent wear resistance. Further, the soft layer is made of gold with a purity of 99.9% or more and is soft. These hard layer 3 and soft layer 4 can be deposited by conventional electroplating.

このようにして、基板1の少なくとも片側の回路導体2
上に硬質層3と軟質層4とが積層されたプリント基板を
得るものである。
In this way, the circuit conductors 2 on at least one side of the substrate 1
A printed circuit board having a hard layer 3 and a soft layer 4 laminated thereon is obtained.

しかして、回路導体2の最表面には軟質層にて形成され
る軟質層4が形成されており、この軟質層4の表面をボ
ンディング部5としてワイヤーボンディングを施すもの
であり、そのボンディングの際の熱圧着によって軟質層
4は溶融し易く、従って接着性良くボンディングするこ
とができろものである。また、接点として利用する場合
には、軟質層4の表面を接点部6として使用するもので
あり、その際表層の軟質層4が摩耗により仮に剥がれた
ような場合でも硬質層3が軟質層4の下地にあるために
、硬質層3を接点部6として安定して使用することがで
きることになる。このようにして接点部6とボンディン
グ部5とを合わせ持つプリント基板を合理的、高品質に
製造することができるものであり、またICカード基板
の如く外部端子用面と内部のワイヤーボンディングを要
求する面とが両面の片側別々に必要な分野では特に有効
なものである。
A soft layer 4 is formed on the outermost surface of the circuit conductor 2, and wire bonding is performed using the surface of the soft layer 4 as a bonding part 5. The soft layer 4 is easily melted by thermocompression bonding, and therefore bonding can be performed with good adhesiveness. In addition, when used as a contact, the surface of the soft layer 4 is used as the contact part 6, and even if the surface soft layer 4 is peeled off due to wear, the hard layer 3 is connected to the soft layer 4. Since the hard layer 3 is the underlying layer, the hard layer 3 can be stably used as the contact portion 6. In this way, a printed circuit board having both the contact section 6 and the bonding section 5 can be manufactured in a rational and high quality manner, and also requires wire bonding between the external terminal surface and the internal wire bonding, such as an IC card substrate. This is particularly effective in fields where one side of both sides needs to be separated.

[発明の効果1 上記のように本発明は、基板の少なくとも片側表面に回
路導体を形成し、回路導体の表面に硬質含にて形成され
る硬質層を積層すると共に硬質層の表面に軟質層にて形
成される軟質層を積層したので、ワイヤーボンディング
部として利用する場合には表層の軟質層をそのまま使用
することでワイヤーを接着性良くボンディングすること
ができるものであり、また接点として使用した場合でも
内層には耐摩耗性の良い硬質層が形成されていて支障な
く接点部としても使用することができるものであって、
従来のように基板表面の回路導体を選択的にマスクする
ような必要がなく、品質が安定したプリント基板を簡単
に製造することができるものである。
[Effect of the invention 1 As described above, the present invention forms a circuit conductor on at least one surface of a substrate, laminates a hard layer formed of a hard layer on the surface of the circuit conductor, and laminates a soft layer on the surface of the hard layer. Since the soft layers formed in the process are laminated, when used as a wire bonding part, the surface soft layer can be used as it is to bond wires with good adhesion, and it can also be used as a contact point. However, the inner layer has a hard layer with good wear resistance and can be used as a contact part without any problems.
Unlike the conventional method, there is no need to selectively mask circuit conductors on the surface of the board, and a printed board with stable quality can be easily manufactured.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明一実施例のプリント基板の要部断面図、
第2図は同上の説明図、第3図は従来例のプリント基板
の要部断面図である。 1は基板、2は回路導体、3は硬質層、4は軟質層であ
る。
FIG. 1 is a sectional view of the main parts of a printed circuit board according to an embodiment of the present invention.
FIG. 2 is an explanatory diagram similar to the above, and FIG. 3 is a sectional view of a main part of a conventional printed circuit board. 1 is a substrate, 2 is a circuit conductor, 3 is a hard layer, and 4 is a soft layer.

Claims (1)

【特許請求の範囲】[Claims] (1)基板の少なくとも片側表面に回路導体を形成し、
回路導体の表面に硬質含にて形成される硬質層を積層す
ると共に硬質層の表面に軟質金にて形成される軟質層を
積層して成ることを特徴とするプリント基板。
(1) Forming a circuit conductor on at least one surface of the board,
A printed circuit board characterized in that a hard layer made of hard metal is laminated on the surface of a circuit conductor, and a soft layer made of soft gold is laminated on the surface of the hard layer.
JP28145285A 1985-12-13 1985-12-13 Printed circuit substrate Pending JPS62140489A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28145285A JPS62140489A (en) 1985-12-13 1985-12-13 Printed circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28145285A JPS62140489A (en) 1985-12-13 1985-12-13 Printed circuit substrate

Publications (1)

Publication Number Publication Date
JPS62140489A true JPS62140489A (en) 1987-06-24

Family

ID=17639374

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28145285A Pending JPS62140489A (en) 1985-12-13 1985-12-13 Printed circuit substrate

Country Status (1)

Country Link
JP (1) JPS62140489A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7117587B2 (en) * 2003-07-02 2006-10-10 Lite-On Semiconductor Corp. Method for fabricating a substrate, including a plurality of chip package substrates

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7117587B2 (en) * 2003-07-02 2006-10-10 Lite-On Semiconductor Corp. Method for fabricating a substrate, including a plurality of chip package substrates

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