CN114497193B - 一种resfet器件及其制备方法 - Google Patents
一种resfet器件及其制备方法 Download PDFInfo
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Abstract
本发明的目的是提供一种RESFET器件及其制备方法,与现有技术相比,本发明的RESFET器件静态功耗更低,延时更低,减小器件体积,提高集成度。由于纳米线的上表面、下表面和侧面均形成沟道,从而能够形成多层沟道结构,进一步提升上述多层纳米线叠层环栅的沟道结构的整体载流子迁移率和多层纳米线的综合性能。由于采用宽度较窄的纳米线,则具有低功耗的特点。相比传统垂直FinFET器件可以实现更有效地散热,更长时间的正常工作,更高的输出电流密度。本发明的RESFET器件的制备方法在提升了器件性能,提升了器件集成度,降低能耗的同时采用的都是没有任何门槛的技术手段,因此适合大规模推广和应用。
Description
技术领域
本发明属于半导体技术中的器件制造领域,具体的涉及一种RESFET器件及其制备方法。
背景技术
GaN基材料具有禁带宽度大、击穿场强高、极化系数高、电子迁移率和电子饱和漂移速度高等一系列材料性能优势,是制备新一代高性能电力电子器件的优选材料,具有重要的应用前景。GaN基材料对于光电子器件和微电子器件都有着极大的吸引力。GaN基材料具有禁带宽、击穿电压高、电子饱和漂移速度高以及热稳定性好等特点,而且同AlGaN合金材料能构成理想的异质结,其异质界面上大的导带偏移以及GaN基材料自身高的压电极化和自发极化强度可产生高密度的二维电子气,电子气密度比AlGaAs/GaAs异质结高约一个数量级,因而适于制作高温、高频、大功率电子器件。
近年来宽禁带氮化镓(GaN)以其优越的材料性能,已成为功率和射频器件应用领域的著名半导体。具有三维结构的FinFET垂直纳米线互补式金属半导体场效应晶体管(FinField-Effect Transistor,简称FinFET),具有优异的栅极可控性,引起了人们高度重视并应用广泛。现有的FinFET有突出的特点:(1)实现了栅极两侧控制电路的接通与关断。(2)在FinFET架构中铁,闸门设计成类似鱼鳍的叉状3D架构,可以大幅改善并减小漏电流,也可以大幅缩短晶体管的闸长。(3)具有功耗低,面积小的优势。
现有的FinFET同样存在明显的缺陷:由于沟道宽度窄,导致电流密度极高,效率低,且功能单一。
产生了很高的热量,而GaN沟道不能有效进行散热,造成沟道内部温度升高,导致器件性能变差(自热效应)。因此合理的设计一种RESFET器件以及配套的可实施的制备方法来克服现有技术的不足是十分有必要的。
发明内容
本发明的目的是提供一种RESFET器件,以解决现有的RESFET器件体积大,能耗高集成度不够的技术问题。
本发明另一目的是提供一种RESFET器件的制备方法,以补充一种高集成度RESFET器件的制备方法。
为了实现上述发明目的,本发明的一方面,提供了一种RESFET器件,包括:
MOS管部分和RES部分;
其中MOS管部分包括:n型GaN衬底;
第一n型GaN纳米线,所述第一n型GaN纳米线结合于所述n型GaN衬底的一表面;
氧化铝层,所述氧化铝层结合于所述n型GaN衬底,且被所述第一n型GaN纳米线分割成彼此间隔的两个部分,所述氧化铝层彼此间隔的两部分与第一n型GaN纳米线形成平面;
第一金属电极层,所述第一金属电极层贴合于所述氧化铝层与所述第一n型GaN纳米线形成的平面背离所述n型GaN衬底表面;
第一氧化层,所述第一氧化层一表面结合于所述第一金属电极层背离所述n型GaN衬底表面;
第二GaN纳米线,所述第二GaN纳米线结合于所述第一氧化层背离所述n型GaN衬底表面;
第二氧化层,所述第二氧化层结合于所述第一氧化层背离所述n型GaN衬底表面,所述第二氧化层与第一氧化层将所述第二GaN纳米线紧密包裹形成氧化包裹层;
第二金属电极层,所述第二金属电极层结合于所述第二氧化层背离所述第一氧化层表面,所述第二金属电极层和第一金属电极层将所述氧化包裹层紧密包裹;
所述第二GaN纳米线两端各设置有一个欧姆电极;
RES部分包括:
衬底层;
金属膜层,所述金属膜层结合于所述衬底一表面,且分为彼此间隔的两部分,分别命名为第一金属膜层和第二金属膜层;
衬垫层,分别结合于所述第一金属膜层背离所述衬底表面和第二金属膜层背离所述衬底表面,所述第一金属膜层和第二金属膜层分别设置有彼此间隔的两个衬垫层,靠近所述金属膜边缘的为外侧衬垫,靠近所述第一金属膜和第二金属膜形成的间隔区域的为内侧衬垫;
多晶硅锗薄膜层,所述多晶硅锗薄膜层与所内侧述衬垫欧姆接触;
所述RES部分的衬底层贴合设置于所述MOS管部分的所述氧化铝层与所述第一n型GaN纳米线形成的平面背离所述n型GaN衬底表面。
优选地,所述MOS管衬底的材料可替换为SiC;所述RES管衬底材料可替换为SiO2。
优选地,所述第一氧化层和第二氧化层的材料为Al2O3或SiO2。
优选地,所述第一金属电极层、第二金属电极层、金属膜层材料为Cr、Ti和Al中的任意一种。
优选地,所述n型GaN衬底的厚度为300μm;
所述第一n型GaN纳米线的厚度为50nm,宽度为10-100nm:
所述氧化铝层的厚度为50nm;
所述第一金属电极层和第二金属电极层的厚度为200nm;
所述第二GaN纳米线的厚度为0.3μm;
所述金属膜层厚度为75nm;
所述衬垫层厚度为25nm;
所述多晶硅锗薄膜层厚度为0.3μm。
本发明另一方面提供了所述的RESFET器件的制备方法,包括如下步骤:
MOS管部分,
在衬底上刻蚀一条中间突出的纳米线;
在衬底上纳米线两边生长氧化铝层直至与纳米线厚度一致;
在纳米线和氧化铝层形成的平面上镀上第一金属电极层;
在第一金属电极层上生长第一氧化层,在衬底上外延生长Si层并刻蚀至氧化层厚度;
在氧化层和外延生长Si层上长第二纳米线;
生长第二氧化层与第一氧化层共同包裹住第二纳米线;
生长第二金属电极层与第一金属电极层包裹住氧化层;
去掉外延生长的Si层;
在纳米线两端修饰欧姆电极;
RES部分,
在所述纳米线和氧化铝层形成的平面上生长衬底;
镀上彼此间隔的两部分金属膜层;
在两部分金属膜层上分别镀上两个金属膜层形成衬垫层;
将多晶硅锗薄膜层设置于内侧衬垫上。
优选地,所述氧化铝层,氧化层的制备方法为等离子体增强化学气相沉积(PECVD)或原子层沉积(ALD)法中的任意一种。
优选地,所述金属电极层的制备方法为热蒸发、磁控溅射或电子束蒸发中的任意一种。
优选地,所述第二纳米线的制备方法为氢化物气相外延(HVPE)、分子束外延(MBE)或金属有机化合物化学气相沉淀法(MOCVD)中的任意一种。
优选地,所述硅层的刻蚀方式为四甲基氢氧化铵(TMAH)水溶液选择性地蚀刻。
与现有技术相比,本发明的RESFET器件现有的垂直RESFET器件导通时,集成一个电阻和一个MOS管在一块衬底上,与传统反相器相比,静态功耗更低,延时更低,减小器件体积,提高集成度。由于纳米线的上表面、下表面和侧面均形成沟道,从而能够形成多层沟道结构,进一步提升上述多层纳米线叠层环栅的沟道结构的整体载流子迁移率和多层纳米线的综合性能。由于采用宽度较窄的纳米线,则具有低功耗的特点。相比传统垂直FinFET器件可以实现更有效地散热,更长时间的正常工作,更高的输出电流密度。
本发明的RESFET器件的制备方法在提升了器件性能,提升了器件集成度,降低能耗的同时采用的都是没有任何门槛的技术手段,因此适合大规模推广和应用。
附图说明
图1为本发明实施例所述RESFET器件的结构示意图
具体实施方式
为了使本发明要解决的技术问题、技术方案及有益效果更加清楚明白,以下结合实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
本发明实施例中,对下文名词作出如下说明。
MOCVD法:MOCVD是以Ⅲ族、Ⅱ族元素的有机化合物和V、Ⅵ族元素的氢化物等作为晶体生长源材料,以热分解反应方式在衬底上进行气相外延,生长各种Ⅲ-V主族、Ⅱ-Ⅵ副族化合物半导体以及它们的多元固溶体的薄层单晶材料。
本发明的一方面,提供了一种RESFET器件,包括:
MOS管部分和RES部分;
其中MOS管部分包括:n型GaN衬底6;在一优选实施例中,所述n型GaN的材料可替换为SiC;在一优选实施例中,所述n型GaN衬底的厚度为300μm;
所述第一金属电极层和第二金属电极层的厚度为200nm;
所述第二GaN纳米线的厚度为0.3μm;
第一n型GaN纳米线6a,所述第一n型GaN纳米线6a结合于所述n型GaN衬底6的一表面;在一优选实施例中,所述第一n型GaN纳米线的厚度为50nm,宽度为10-100nm,进一步优选实施例中,所述第一n型GaN纳米线的宽度为50nm。
氧化铝层5,所述氧化铝层结合于所述n型GaN衬底6,且被所述第一n型GaN纳米线6a分割成彼此间隔的两个部分,所述氧化铝层5彼此间隔的两部分与第一n型GaN纳米线6a形成平面;在一优选实施例中,所述氧化铝层的厚度为50nm;纳米线的上表面、下表面和侧面均形成沟道,从而能够形成多层沟道结构,进一步提升上述多层纳米线叠层环栅的沟道结构的整体载流子迁移率和多层纳米线的综合性能。由于采用宽度较窄的纳米线,则具有低功耗的特点。
第一金属电极层4a,所述第一金属电极层贴合于所述氧化铝层5与所述第一n型GaN纳米线6a形成的平面背离所述n型GaN衬底6表面;
第一氧化层7a,所述第一氧化层7a一表面结合于所述第一金属电极层4a背离所述n型GaN衬底6表面;
第二GaN纳米线2,8,所述第二GaN纳米线2,8结合于所述第一氧化层背离所述n型GaN衬底6表面;在一优选实施例中所述第二GaN纳米线的厚度为0.3μm;
第二氧化层7b,所述第二氧化层7b结合于所述第一氧化层7a背离所述n型GaN衬底表面,所述第二氧化层7b与第一氧化层7a将所述第二GaN纳米线紧密包裹形成氧化包裹层7;在一优选实施例中,所述第一氧化层和第二氧化层的材料为Al2O3或SiO2。
第二金属电极层4b,所述第二金属电极层4b结合于所述第二氧化层7b背离所述第一氧化层表面,所述第二金属电极层4b和第一金属电极层4a将所述氧化包裹层紧密包裹;在一优选实施例中,所述第一金属电极层、第二金属电极层材料为Cr、Ti和Al中的任意一种。在一优选实施例中,所述第一金属电极层和第二金属电极层的厚度为200nm;
所述第二GaN纳米线2,8两端各设置有一个欧姆电极1,9;
RES部分包括:
衬底层13;在一优选实施例中所述衬底材料可替换为SiO2。
金属膜层11,所述金属膜层11结合于所述衬底13一表面,且分为彼此间隔的两部分,分别命名为第一金属膜层11a和第二金属膜层11b;在一优选实施例中,所述金属膜层材料为Cr、Ti和Al中的任意一种。在一优选实施例中,所述金属膜层厚度为75nm;
衬垫层14,分别结合于所述第一金属膜层11a背离所述衬底表面和第二金属膜层11b背离所述衬底表面,所述第一金属膜层11a和第二金属膜层11b分别设置有彼此间隔的两个衬垫层,靠近所述金属膜边缘的为外侧衬垫,靠近所述第一金属膜层11a和第二金属膜层11b形成的间隔区域的为内侧衬垫;在一优选实施例中,所述衬垫层厚度为25nm;
多晶硅锗薄膜层12,所述多晶硅锗薄膜层12与所内侧述衬垫欧姆接触;在一优选实施例中,所述多晶硅锗薄膜层厚度为0.3μm。
所述RES部分的衬底层13贴合设置于所述MOS管部分的所述氧化铝层5与所述第一n型GaN纳米线6a形成的平面背离所述n型GaN衬底6表面。在一优选实施例中,所述多晶硅锗薄膜层厚度为0.3μm。本发明所述的RESFET器件导通时,集成一个电阻和一个MOS管在一块衬底上,与传统反相器相比,静态功耗更低,延时更低,减小器件体积,提高集成度。且由于纳米线的上表面、下表面和侧面均形成沟道,从而能够形成多层沟道结构,进一步提升上述多层纳米线叠层环栅的沟道结构的整体载流子迁移率和多层纳米线的综合性能。由于采用宽度较窄的纳米线,则具有低功耗的特点。
本发明实施例另一方面提供了所述的RESFET器件的制备方法,包括如下步骤:
MOS管部分,
S01:在衬底上刻蚀一条中间突出的纳米线;
S02:在衬底上纳米线两边生长氧化铝层直至与纳米线厚度一致;
S03:在纳米线和氧化铝层形成的平面上镀上第一金属电极层;
S04:在第一金属电极层上生长第一氧化层,在衬底上外延生长Si层并刻蚀至氧化层厚度;
S05:在氧化层和外延生长Si层上长第二纳米线;
S06:生长第二氧化层与第一氧化层共同包裹住第二纳米线;
S07:生长第二金属电极层与第一金属电极层包裹住氧化层;
S08:去掉外延生长的Si层;
S09:在纳米线两端修饰欧姆电极;
RES部分,
S10:在所述纳米线和氧化铝层形成的平面上生长衬底;
S11:镀上彼此间隔的两部分金属膜层;
S12:在两部分金属膜层上分别镀上两个金属膜层形成衬垫层;
S13:将多晶硅锗薄膜层设置于内侧衬垫上。由于现有的垂直RESFET器件导通时,集成一个电阻和一个MOS管在一块衬底上,与传统反相器相比,静态功耗更低,延时更低,减小器件体积,提高集成度。
在一优选实施例中,所述氧化铝层,氧化层的制备方法为等离子体增强化学气相沉积(PECVD)或原子层沉积(ALD)法中的任意一种。可以·根据具体材料变化而灵活选择。
在一优选实施例中,所述金属电极层的制备方法为热蒸发、磁控溅射或电子束蒸发中的任意一种。在进一步优选地实施例中选择磁控溅射来镀膜,具备更均一可控性更好的优势。
在一优选实施例中,所述第二纳米线的制备方法为氢化物气相外延(HVPE)、分子束外延(MBE)或金属有机化合物化学气相沉淀法(MOCVD)中的任意一种。化学气相沉淀法为最常用方法。
在一优选实施例中,所述硅层的刻蚀方式为四甲基氢氧化铵(TMAH)水溶液选择性地蚀刻。选择性刻蚀后在纳米线上进行成形气体退火(FGA)以去除错位。为了在GaN/Si之间实现良好的选择性蚀刻,溶液温度必须在60℃左右,并借助于超大超声搅拌。
Claims (8)
1.一种RESFET器件,其特征在于,包括:
MOS管部分和RES部分;
其中MOS管部分包括:n型GaN衬底;
第一n型GaN纳米线,所述第一n型GaN纳米线结合于所述n型GaN衬底的一表面;
氧化铝层,所述氧化铝层结合于所述n型GaN衬底,且被所述第一n型GaN纳米线分割成彼此间隔的两个部分,所述氧化铝层彼此间隔的两部分与第一n型GaN纳米线形成平面;
第一金属电极层,所述第一金属电极层贴合于所述氧化铝层与所述第一n型GaN纳米线形成的平面背离所述n型GaN衬底表面;
第一氧化层,所述第一氧化层一表面结合于所述第一金属电极层背离所述n型GaN衬底表面;
第二GaN纳米线,所述第二GaN纳米线结合于所述第一氧化层背离所述n型GaN衬底表面;
第二氧化层,所述第二氧化层结合于所述第一氧化层背离所述n型GaN衬底表面,所述第二氧化层与第一氧化层将所述第二GaN纳米线紧密包裹形成氧化包裹层;
第二金属电极层,所述第二金属电极层结合于所述第二氧化层背离所述第一氧化层表面,所述第二金属电极层和第一金属电极层将所述氧化包裹层紧密包裹;
所述第二GaN纳米线两端各设置有一个欧姆电极;
RES部分包括:
衬底层;
金属膜层,所述金属膜层结合于所述衬底一表面,且分为彼此间隔的两部分,分别命名为第一金属膜层和第二金属膜层;
衬垫层,分别结合于所述第一金属膜层背离所述衬底表面和第二金属膜层背离所述衬底表面,所述第一金属膜层和第二金属膜层分别设置有彼此间隔的两个衬垫层,靠近所述金属膜边缘的为外侧衬垫,靠近所述第一金属膜和第二金属膜形成的间隔区域的为内侧衬垫;
多晶硅锗薄膜层,所述多晶硅锗薄膜层与所内侧述衬垫欧姆接触;
所述RES部分的衬底层贴合设置于所述MOS管部分的所述氧化铝层与所述第一n型GaN纳米线形成的平面背离所述n型GaN衬底表面;
所述第一氧化层和第二氧化层的材料为Al2O3或SiO2;
所述n型GaN衬底的厚度为300μm;
所述第一n型GaN纳米线的厚度为50nm,宽度为10-100nm:
所述氧化铝层的厚度为50nm;
所述第一金属电极层和第二金属电极层的厚度为200nm;
所述第二GaN纳米线的厚度为0.3μm;
所述金属膜层厚度为75nm;
所述衬垫层厚度为25nm;
所述多晶硅锗薄膜层厚度为0.3μm。
2.如权利要求1所述的RESFET器件,其特征在于:所述MOS管衬底的材料替换为SiC;所述RES管衬底材料替换为SiO2。
3.如权利要求1所述的RESFET器件,其特征在于:所述第一金属电极层、第二金属电极层、金属膜层材料为Cr、Ti和Al中的任意一种。
4.如其权利要求1-3任一所述的RESFET器件的制备方法,其特征在于,包括如下步骤:
MOS管部分,
在衬底上刻蚀一条中间突出的纳米线;
在衬底上纳米线两边生长氧化铝层直至与纳米线厚度一致;
在纳米线和氧化铝层形成的平面上镀上第一金属电极层;
在第一金属电极层上生长第一氧化层,在衬底上外延生长Si层并刻蚀至氧化层厚度;
在氧化层和外延生长Si层上长第二纳米线;
生长第二氧化层与第一氧化层共同包裹住第二纳米线;
生长第二金属电极层与第一金属电极层包裹住氧化层;
去掉外延生长的Si层;
在纳米线两端修饰欧姆电极;
RES部分,
在所述纳米线和氧化铝层形成的平面上生长衬底;
镀上彼此间隔的两部分金属膜层;
在两部分金属膜层上分别镀上两个金属膜层形成衬垫层;
将多晶硅锗薄膜层设置于内侧衬垫上。
5.如权利要求4所述的RESFET器件的制备方法,其特征在于:所述氧化铝层,氧化层的制备方法为等离子体增强化学气相沉积(PECVD)或原子层沉积(ALD)法中的任意一种。
6.如权利要求4所述的RESFET器件的制备方法,其特征在于:所述金属电极层的制备方法为热蒸发、磁控溅射或电子束蒸发中的任意一种。
7.如权利要求4所述的RESFET器件的制备方法,其特征在于:所述第二纳米线的制备方法为氢化物气相外延(HVPE)、分子束外延(MBE)或金属有机化合物化学气相沉淀 法(MOCVD)中的任意一种。
8.如权利要求4所述的RESFET器件的制备方法,其特征在于:所述硅层的刻蚀方式为四甲基氢氧化铵(TMAH)水溶液选择性地蚀刻。
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