CN114467182A - 半导体装置及半导体装置的制造方法 - Google Patents
半导体装置及半导体装置的制造方法 Download PDFInfo
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- CN114467182A CN114467182A CN202180005544.5A CN202180005544A CN114467182A CN 114467182 A CN114467182 A CN 114467182A CN 202180005544 A CN202180005544 A CN 202180005544A CN 114467182 A CN114467182 A CN 114467182A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/18—Diffusion lifetime killers
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
- H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
- H10D12/038—Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
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- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
- H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
- H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
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- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
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- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
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- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
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- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/141—Anode or cathode regions of thyristors; Collector or emitter regions of gated bipolar-mode devices, e.g. of IGBTs
- H10D62/142—Anode regions of thyristors or collector regions of gated bipolar-mode devices
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- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/393—Body regions of DMOS transistors or IGBTs
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- H10D62/50—Physical imperfections
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
- H10D64/519—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/422—PN diodes having the PN junctions in mesas
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
- H10D84/617—Combinations of vertical BJTs and only diodes
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
- H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
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- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
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- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/214—Recoil-implantation
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
- H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
- H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
- H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
- H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/40—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections
- H10P95/402—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies
- H10P95/405—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies using cavities formed by hydrogen or noble gas ion implantation
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
- H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
Landscapes
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Junction Field-Effect Transistors (AREA)
- Recrystallisation Techniques (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2020066324 | 2020-04-01 | ||
| JP2020-066324 | 2020-04-01 | ||
| PCT/JP2021/014146 WO2021201216A1 (ja) | 2020-04-01 | 2021-04-01 | 半導体装置および半導体装置の製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114467182A true CN114467182A (zh) | 2022-05-10 |
Family
ID=77929156
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202180005544.5A Pending CN114467182A (zh) | 2020-04-01 | 2021-04-01 | 半导体装置及半导体装置的制造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20220216056A1 (https=) |
| JP (2) | JP7367856B2 (https=) |
| CN (1) | CN114467182A (https=) |
| DE (1) | DE112021000103T5 (https=) |
| WO (1) | WO2021201216A1 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7001104B2 (ja) * | 2017-12-14 | 2022-01-19 | 富士電機株式会社 | 半導体装置 |
| CN117561610A (zh) * | 2022-01-28 | 2024-02-13 | 富士电机株式会社 | 半导体装置及制造方法 |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020043665A1 (en) * | 2000-10-18 | 2002-04-18 | Fumio Ootsuka | Semiconductor device and a method of manufacturing the same |
| US20090224284A1 (en) * | 2008-02-08 | 2009-09-10 | Fuji Electric Device Technology Co., Ltd. | Semiconductor device and method of producing the same |
| CN104040692A (zh) * | 2012-03-19 | 2014-09-10 | 富士电机株式会社 | 半导体装置的制造方法 |
| US20170243940A1 (en) * | 2016-02-18 | 2017-08-24 | Infineon Technologies Ag | Semiconductor Devices and Methods for Forming a Semiconductor Device |
| CN107408581A (zh) * | 2015-09-16 | 2017-11-28 | 富士电机株式会社 | 半导体装置及半导体装置的制造方法 |
| CN108604602A (zh) * | 2016-08-12 | 2018-09-28 | 富士电机株式会社 | 半导体装置及半导体装置的制造方法 |
| US20190148500A1 (en) * | 2017-01-17 | 2019-05-16 | Fuji Electric Co., Ltd. | Semiconductor device |
| JP2019087635A (ja) * | 2017-11-07 | 2019-06-06 | 富士電機株式会社 | 半導体装置の製造方法および半導体装置 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5104314B2 (ja) * | 2005-11-14 | 2012-12-19 | 富士電機株式会社 | 半導体装置およびその製造方法 |
| JP5817686B2 (ja) * | 2011-11-30 | 2015-11-18 | 株式会社デンソー | 半導体装置 |
| DE102013216195B4 (de) | 2013-08-14 | 2015-10-29 | Infineon Technologies Ag | Verfahren zur Nachdotierung einer Halbleiterscheibe |
| US9754787B2 (en) * | 2014-06-24 | 2017-09-05 | Infineon Technologies Ag | Method for treating a semiconductor wafer |
| CN106062961B (zh) | 2014-09-17 | 2020-02-11 | 富士电机株式会社 | 半导体装置以及半导体装置的制造方法 |
| WO2016204227A1 (ja) * | 2015-06-17 | 2016-12-22 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
| JP6477897B2 (ja) * | 2015-09-16 | 2019-03-06 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
-
2021
- 2021-04-01 DE DE112021000103.5T patent/DE112021000103T5/de active Pending
- 2021-04-01 WO PCT/JP2021/014146 patent/WO2021201216A1/ja not_active Ceased
- 2021-04-01 CN CN202180005544.5A patent/CN114467182A/zh active Pending
- 2021-04-01 JP JP2022512697A patent/JP7367856B2/ja active Active
-
2022
- 2022-03-24 US US17/703,944 patent/US20220216056A1/en active Pending
-
2023
- 2023-10-10 JP JP2023175463A patent/JP7670100B2/ja active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020043665A1 (en) * | 2000-10-18 | 2002-04-18 | Fumio Ootsuka | Semiconductor device and a method of manufacturing the same |
| US20090224284A1 (en) * | 2008-02-08 | 2009-09-10 | Fuji Electric Device Technology Co., Ltd. | Semiconductor device and method of producing the same |
| CN104040692A (zh) * | 2012-03-19 | 2014-09-10 | 富士电机株式会社 | 半导体装置的制造方法 |
| CN107408581A (zh) * | 2015-09-16 | 2017-11-28 | 富士电机株式会社 | 半导体装置及半导体装置的制造方法 |
| US20170243940A1 (en) * | 2016-02-18 | 2017-08-24 | Infineon Technologies Ag | Semiconductor Devices and Methods for Forming a Semiconductor Device |
| CN108604602A (zh) * | 2016-08-12 | 2018-09-28 | 富士电机株式会社 | 半导体装置及半导体装置的制造方法 |
| US20190148500A1 (en) * | 2017-01-17 | 2019-05-16 | Fuji Electric Co., Ltd. | Semiconductor device |
| JP2019087635A (ja) * | 2017-11-07 | 2019-06-06 | 富士電機株式会社 | 半導体装置の製造方法および半導体装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP7367856B2 (ja) | 2023-10-24 |
| WO2021201216A1 (ja) | 2021-10-07 |
| DE112021000103T5 (de) | 2022-06-30 |
| JP7670100B2 (ja) | 2025-04-30 |
| JP2023179647A (ja) | 2023-12-19 |
| US20220216056A1 (en) | 2022-07-07 |
| JPWO2021201216A1 (https=) | 2021-10-07 |
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