CN114464687B - 一种局部双面隧穿钝化接触结构电池及其制备方法 - Google Patents

一种局部双面隧穿钝化接触结构电池及其制备方法 Download PDF

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CN114464687B
CN114464687B CN202111622528.9A CN202111622528A CN114464687B CN 114464687 B CN114464687 B CN 114464687B CN 202111622528 A CN202111622528 A CN 202111622528A CN 114464687 B CN114464687 B CN 114464687B
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吴智涵
王永谦
林纲正
陈刚
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Zhejiang Aiko Solar Energy Technology Co Ltd
Guangdong Aiko Technology Co Ltd
Tianjin Aiko Solar Energy Technology Co Ltd
Zhuhai Fushan Aixu Solar Energy Technology Co Ltd
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Abstract

一种局部双面隧穿钝化接触结构电池,属于太阳能电池技术领域,包括n型硅基底,所述n型硅基底的正背面均设有一层层,且所述n型硅基底的正面自下而上依次设置有层、p型掺杂多晶硅层、功能层以及正面电极,所述n型硅基底的背面自上而下依次设置有层、n型掺杂多晶硅层、TCO层以及背面电极;其中,所述功能层包括层,所述层上端面镂空设置有TCO沉积层,所述正面电极设于所述TCO沉积层上;本发明还公开其制备方法,通过引入局部TCO接触以及低温银浆技术,将隧穿钝化接触结构应用在TOPCON电池正背面,并且正面采用局部的TCO接触,不仅减小了PVD对正面钝化层的溅射损失、降低了TCO的寄生吸收、还减小了TCO的消耗降低成本。

Description

一种局部双面隧穿钝化接触结构电池及其制备方法
技术领域
本发明属于太阳能电池加工技术领域,特别涉及一种局部双面隧穿钝化接触结构电池及其制备方法。
背景技术
目前现有的topcon电池通常采用100nm以上的多晶硅掺杂层,这样可以较好的防止后续高温丝网印刷的银浆烧结扩散进入到隧穿层以及体硅中,带来不必要的复合。
由于掺杂多晶硅本身存在较强的寄生吸收,厚度过大,不仅带来工艺成本的提高,还对性能有较大的损失。
发明内容
本发明的目的在于提供一种局部双面隧穿钝化接触结构电池及其制备方法,以解决上述背景技术中提出的问题。
为实现上述目的,本发明提供如下技术方案:
一种局部双面隧穿钝化接触结构电池,包括n型硅基底,所述n型硅基底的正背面均设有一层层,且所述n型硅基底的正面自下而上依次设置有/>层、p型掺杂多晶硅层、功能层以及正面电极,所述n型硅基底的背面自上而下依次设置有/>层、n型掺杂多晶硅层、TCO层以及背面电极;其中,所述功能层包括/>层,所述/>层上端面镂空设置有TCO沉积层,所述正面电极设于所述TCO沉积层上。
作为优选,所述TCO层的厚度为20nm-30nm。
作为优选,所述层的厚度为0.3-3nm,所述n型掺杂多晶硅层的厚度为15-300nm。
作为优选,所述层的厚度为20nm-30nm,所述p型掺杂多晶硅层的厚度为15-300nm。
一种制备如上述方案所述的局部双面隧穿钝化接触结构电池的方法,包括如下步骤:
S1、提供n型硅基底,对所述n型硅基底清洗后制绒;
S2、采用LPCVD直接进行双面隧穿;
S3、本征多晶硅制备;
S4、离子注入分别制备正面p型掺杂多晶硅层以及背面n型掺杂多晶硅层;
S5、功能层制备;
S6、n型硅基底背面整面TCO沉积,制备TCO层;
S7、采用丝网印刷生成正面电极以及背面电极。
作为优选,S1包括:对n型硅基底制绒形成金字塔状陷光结构。
作为优选,S5包括:
S50、先用掩膜露出层需要制备的区域进行膜层制备;
S51、再利用掩膜遮挡住已沉积层区域,随后进行局部TCO的沉积。
与现有技术相比,本技术方案具有如下效果:
通过引入局部TCO接触以及低温银浆技术,将隧穿钝化接触结构应用在TOPCON电池正背面,并且正面采用局部的TCO接触,不仅减小了PVD对正面钝化层的溅射损失、降低了TCO的寄生吸收、还减小了TCO的消耗降低成本。
附图说明
图1是本发明整体结构示意图。
图中:1-n型硅基底;2-层;3-p型掺杂多晶硅层;4-/>层;5-正面电极;6-TCO沉积层;7-n型掺杂多晶硅层;8-TCO层;9-背面电极。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚,完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部实施例。
实施例:
一种局部双面隧穿钝化接触结构电池,包括n型硅基底1,所述n型硅基底1的正背面均设有一层层2,且所述n型硅基底1的正面自下而上依次设置有/>层2、p型掺杂多晶硅层3、功能层以及正面电极5,所述n型硅基底1的背面自上而下依次设置有/>层2、n型掺杂多晶硅层7、TCO层8以及背面电极9;其中,所述功能层包括/>层4,所述/>层4上端面镂空设置有TCO沉积层6,所述正面电极5设于所述TCO沉积层6上;其作用是,TCO材质本身具备寄生吸收的特性,在本方案中,对电池的正面设置局部的TCO,不仅降低了TCO材料的消耗,同时降低了TCO材质带来的寄生吸收的问题,从而提高电池工作效率。
在本实施例中,所述TCO层8的厚度为20nm-30nm。
在本实施例中,所述层6的厚度为0.3-3nm,所述n型掺杂多晶硅层7的厚度为15-300nm。
所述层4的厚度为20nm-30nm,所述p型掺杂多晶硅层3的厚度为15-300nm。
一种制备如上述方案的所述的局部双面隧穿钝化接触结构电池的方法,包括如下步骤:
S1、提供n型硅基底1,对所述n型硅基底1清洗后制绒;即对n型硅基底1制绒形成金字塔状陷光结构;
S2、采用LPCVD直接进行双面隧穿;即对n型硅基底1进行氧化硅的制备;进行双面隧穿,一方面使电池能够获得更好的钝化性能,另一方面,避免正面电极5的金属接触复合,从而提高了开路电压;具体来说,即将制绒后的n型硅基底1放入LPCVD设备中,控制反应温度为为550-650°,反应时长为10-30min,然后通入氧气进行热氧反应,从而制得厚度为1-3nm的氧化硅;
S3、本征多晶硅制备;即采用LPCVD设备,将反应温度调试至500-650°,通入硅烷进行沉积,从而形成本征poly-si;
S4、离子注入分别制备正面p型掺杂多晶硅层3以及背面n型掺杂多晶硅层7;
S5、功能层制备;
S50、先用掩膜露出层需要制备的区域进行膜层制备;
S51、再利用掩膜遮挡住已沉积层区域,随后进行局部TCO的沉积。
S6、n型硅基底1背面整面TCO沉积,制备TCO层8;
S7、采用丝网印刷生成正面电极6以及背面电极9,在本实施例中,引用低温银浆工艺进行丝网印刷。
本发明的描述中,需要理解的是,术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本发明的描述中,除非另有说明,“若干个”的含义是两个或两个以上。另外,术语“包括”及其任何变形,意图在于覆盖不排他的包含。
本发明按照实施例进行了说明,在不脱离本原理的前提下,本装置还可以作出若干变形和改进。应当指出,凡采用等同替换或等效变换等方式所获得的技术方案,均落在本发明的保护范围内。

Claims (4)

1.一种局部双面隧穿钝化接触结构电池,包括n型硅基底(1),其特征在于:所述n型硅基底(1)的正背面均设有一层层(2),且所述n型硅基底(1)的正面自下而上依次设置有层(2)、p型掺杂多晶硅层(3)、功能层以及正面电极(5),所述n型硅基底(1)的背面自上而下依次设置有/>层(2)、n型掺杂多晶硅层(7)、TCO层(8)以及背面电极(9);其中,所述功能层包括/>层(4),所述/>层(4)上端面镂空设置有TCO沉积层(6),所述正面电极(5)设于所述TCO沉积层(6)上,所述TCO层(8)的厚度为20nm-30nm,所述/>层(6)的厚度为0.3-3nm,所述n型掺杂多晶硅层(7)的厚度为15-300nm,所述/>层(4)的厚度为20nm-30nm,所述p型掺杂多晶硅层(3)的厚度为15-300nm。
2.一种制备如权利要求1所述的局部双面隧穿钝化接触结构电池的方法,其特征在于:包括如下步骤:S1、提供n型硅基底(1),对所述n型硅基底(1)清洗后制绒;S2、采用LPCVD直接进行双面隧穿;S3、本征多晶硅制备;S4、离子注入分别制备正面p型掺杂多晶硅层(3)以及背面n型掺杂多晶硅层(7);S5、功能层制备;S6、n型硅基底(1)背面整面TCO沉积,制备TCO层(8);S7、采用丝网印刷生成正面电极(6)以及背面电极(9)。
3.如权利要求2所述的制备方法,其特征在于:S1包括:对n型硅基底(1)制绒形成金字塔状陷光结构。
4.如权利要求3所述的制备方法,其特征在于:S5包括:S50、先用掩膜露出层需要制备的区域进行膜层制备;S51、再利用掩膜遮挡住已沉积/>层区域,随后进行局部TCO的沉积。
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