CN114464686A - Novel tunneling passivation contact structure battery and preparation method thereof - Google Patents
Novel tunneling passivation contact structure battery and preparation method thereof Download PDFInfo
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- 238000002161 passivation Methods 0.000 title claims abstract description 30
- 230000005641 tunneling Effects 0.000 title claims abstract description 15
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 33
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 32
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 32
- 239000010703 silicon Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 12
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 9
- 229910052709 silver Inorganic materials 0.000 claims abstract description 9
- 239000004332 silver Substances 0.000 claims abstract description 9
- 238000009792 diffusion process Methods 0.000 claims abstract description 8
- 238000004140 cleaning Methods 0.000 claims description 10
- 238000000151 deposition Methods 0.000 claims description 10
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 9
- 229910052796 boron Inorganic materials 0.000 claims description 9
- 230000008021 deposition Effects 0.000 claims description 6
- 239000003513 alkali Substances 0.000 claims description 3
- 239000005388 borosilicate glass Substances 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 238000010329 laser etching Methods 0.000 claims description 3
- 239000010409 thin film Substances 0.000 claims description 2
- 239000002585 base Substances 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 claims 1
- 238000006243 chemical reaction Methods 0.000 abstract description 7
- 238000010521 absorption reaction Methods 0.000 abstract description 4
- 230000003071 parasitic effect Effects 0.000 abstract description 4
- 238000005245 sintering Methods 0.000 abstract description 3
- 239000011259 mixed solution Substances 0.000 description 5
- 239000000243 solution Substances 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- HIVGXUNKSAJJDN-UHFFFAOYSA-N [Si].[P] Chemical compound [Si].[P] HIVGXUNKSAJJDN-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000003667 anti-reflective effect Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Abstract
The utility model provides a novel tunneling passivation contact structure battery, belongs to solar cell technical field, including n type silicon substrate, the front of n type monocrystalline silicon substrate has set gradually p type emitting electrode, passivation layer and antireflection layer from bottom to top, has set firmly positive electrode on the antireflection layer, and the lower extreme downwardly extending of positive electrode extends to p type emitting electrode, and wherein, the back top-down of n type monocrystalline silicon substrate has set gradually
The layer, the n-poly-si layer, the TCO layer and the back electrode are fixedly arranged on the TCO layer; wherein the antireflection layer is an n-poly-si layer, the thickness of the n-poly-si layer is 20nm-30nm, and compared with the existing topcon battery, the n-poly-si layer can meet the requirement of passivating contact only by 20nm at the minimumTherefore, the preparation cost is reduced, and meanwhile, on the premise of reducing the thickness by the amplitude, the current loss caused by parasitic absorption of the doped polycrystalline silicon layer is greatly reduced, and the conversion efficiency of the battery is further improved; the invention also discloses a preparation method of the silver paste, and the problem of sintering diffusion caused by high-temperature silver paste is solved by introducing a low-temperature silver paste process.
Description
Technical Field
The invention belongs to the technical field of solar cell processing, and particularly relates to a novel tunneling passivation contact structure cell and a preparation method thereof.
Background
At present, the existing topcon battery usually adopts a polycrystalline silicon doping layer with the thickness of more than 100nm, so that silver paste sintering diffusion of subsequent high-temperature screen printing can be well prevented from entering a tunneling layer and bulk silicon, and unnecessary recombination is brought.
Because doped polysilicon has strong parasitic absorption and overlarge thickness, the process cost is improved, and the performance is greatly lost.
Disclosure of Invention
The invention aims to provide a novel tunneling passivation contact structure battery and a preparation method thereof, so as to solve the problems in the background technology.
In order to achieve the purpose, the invention provides the following technical scheme:
the utility model provides a novel tunneling passivation contact structure battery, includes n type silicon substrate, the front of n type monocrystalline silicon substrate has set gradually p type emitting electrode, passivation layer and antireflection layer from bottom to top, positive electrode has set firmly on the antireflection layer, the lower extreme downwardly extending of positive electrode extremely p type emitting electrode, wherein, the back top-down of n type monocrystalline silicon substrate has set gradually
The multilayer thin film transistor comprises a layer, an n-poly-si layer, a TCO layer and a back electrode fixedly arranged on the TCO layer; wherein the thickness of the n-poly-si layer (7) is 20nm-30 nm.
Preferably, the thickness of the TCO layer is 80-200 nm.
Preferably, the
The thickness of the layer is 0.3-3nm, and the antireflection layer is
A layer of
The thickness of the layer is 80-200 nm.
A method for preparing a novel tunneling passivation contact structure battery as described in any of the above aspects, comprising the steps of:
s1, providing an n-type silicon substrate, and cleaning the n-type silicon substrate for texturing;
s2, performing boron diffusion on the surface of the n-type silicon substrate to prepare a p-type emitter;
s3, carrying out boron cleaning on the back surface of the n-type silicon substrate, and removing the formed borosilicate glass and the boron diffused to the n-type silicon substrate;
s4 preparation
A layer;
s5 at
Preparing an n-poly-si layer on the layer;
s6, etching and cleaning with alkali liquor;
s7, depositing on the p-type emitter to prepare a passivation layer;
s8, preparing an antireflection layer on the passivation layer;
s9, carrying out TCO deposition on the n-poly-si layer to prepare a TCO layer;
and S10, performing laser etching on the front side of the n-type silicon substrate, and then preparing a front side electrode and a back side electrode by adopting a low-temperature silver paste process.
Preferably, the passivation layer is
And depositing.
Preferably, S1 includes: and texturing the n-type silicon substrate to form a pyramid light trapping structure.
Compared with the prior art, the technical scheme has the following effects:
compared with the existing topcon cell, the doped polycrystalline silicon layer (i.e. the n-poly-si layer in the present description) can meet the passivation contact only with a minimum of 20nm, thereby realizing the reduction of the preparation cost, and simultaneously, on the premise of reducing the thickness by such a degree, the current loss caused by parasitic absorption of the doped polycrystalline silicon layer is greatly reduced, and the conversion efficiency of the cell is further improved.
Drawings
Fig. 1 is a schematic view of the overall structure of the present invention.
In the figure: 1-n type single crystal silicon substrate; a 2-p type emitter; 3-a passivation layer; 4-an anti-reflection layer; 5-a front electrode; 6-
A layer; a 7-n-poly-si layer; 8-TCO layer; 9-back electrode.
Detailed Description
The technical solutions in the embodiments of the present invention will be described below in detail and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments.
Example (b):
as shown in fig. 1, the novel tunneling passivation contact structure battery includes an n-type silicon substrate 1, a p-type emitter 2, a passivation layer 3 and an anti-reflection layer 4 are sequentially disposed on a front surface of the n-type silicon substrate 1 from bottom to top, in this embodiment, the passivation layer 3 is a passivation layer
And depositing, wherein a front electrode 5 is fixedly arranged on the anti-reflection layer 4, the lower end of the front electrode 5 extends downwards to the p-type emitter 2, and the back of the n-type monocrystalline silicon substrate 1 is sequentially provided with an n-type monocrystalline silicon substrate from top to bottom
The multilayer structure comprises a layer 6, an n-poly-si layer 7, a TCO layer 8 and a back electrode 9 fixedly arranged on the TCO layer 8; wherein the antireflection layer 4 is
A layer, the n-poly-si layer having a thickness of 20nm to 30 nm; compared with the existing topcon cell, the doped polycrystalline silicon layer (i.e. the n-poly-si layer) can meet passivation contact only by 20nm at the minimum, so that the preparation cost is reduced, and meanwhile, on the premise of reducing the thickness by the amplitude, the current loss caused by parasitic absorption of the doped polycrystalline silicon layer is greatly reduced, and the conversion efficiency of the cell is further improved.
In this embodiment, the TCO layer 8 has a thickness of 20nm to 30 nm.
In the present embodiment, the
The thickness of the layer 6 is 0.3-3nm and the thickness of the n-poly-si layer 7 is 15-300 nm.
A method for preparing a novel tunneling passivation contact structure battery as described in any of the above aspects, comprising the steps of: s1, providing an n-type silicon substrate 1, and cleaning the n-type silicon substrate 1 for texturing; texturing the n-type silicon substrate 1 to form a pyramid light trapping structure; s2, performing boron diffusion on the surface of the n-type silicon substrate 1 to prepare a p-type emitter 2; s3, carrying out boron cleaning on the back surface of the n-type silicon substrate 1, and removing formed borosilicate glass and boron diffused to the n-type silicon substrate 1; specifically, the diffused n-type silicon substrate 1 is subjected to single-side cleaning (rinsing in water) by using a first mixed solution in a volume ratio of 1:1:7Washing), and then soaking the diffused n-type silicon substrate 1 in a second mixed solution with the volume ratio of 1:11 to achieve the effect of forming a polished surface on the back surface of the diffused n-type silicon substrate 1, wherein the first mixed solution comprises the components of
The components of the second mixed solution are
An alkali solution of (4); s4 preparation
Layer 6, in this example, is prepared on the back side of the n-type silicon substrate 1 by thermal oxygen reaction promotion in an LPCVD apparatus
Layer 6, it is worth mentioning that in the preparation process, the equipment needs to be adjusted, i.e. the reaction temperature is adjusted to 550-
The thickness of the layer 6 is 1nm-3nm, the uniformity of the tunneling oxide layer prepared by the device is high, and the photoelectric conversion efficiency of the prepared tunneling oxidation passivation contact battery is higher; s5 at
Preparing an n-poly-si layer 7 on the layer 6; specifically, firstly, a reaction temperature is adjusted to 500-650 ℃ by adopting LPCVD equipment, silane is introduced for deposition, so that intrinsic poly-si is formed, and then phosphorus diffusion and annealing treatment are carried out on the intrinsic poly-si, so that the n-poly-si layer 7 is formed;
s6, alkaline liquor etching and cleaning: in the preparation process of S5, intrinsic poly-si is plated around the p-type emitter 2 and covers and wraps the p-type emitter 2, meanwhile, a layer of phosphorus-silicon film is formed on the surface of the n-poly-si layer 7 on the back surface due to phosphorus diffusion, in the embodiment, a first mixed solution with the volume ratio of 1:1:7 is adopted to clean the silicon wafer after S5, so that the p-type emitter 2 is exposed, and meanwhile, the borosilicate film on the n-poly-si layer 7 on the back surface is removed; s7, carrying out deposition treatment on the p-type emitter 2 to prepare a passivation layer 3; s8, preparing an anti-reflective layer 4 on the passivation layer 3; s9, carrying out TCO deposition on the n-poly-si layer 7 to prepare a TCO layer 8; and S10, performing laser etching on the front surface of the n-type silicon substrate 1, and preparing the front electrode 5 and the back electrode 9 by adopting a low-temperature silver paste process.
The method is adopted for preparation, and the problem of sintering diffusion caused by high-temperature silver paste is avoided by introducing a low-temperature silver paste process.
In the description of the present invention, it is to be understood that the terms "center", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used merely for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be construed as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified. Furthermore, the term "comprises" and any variations thereof is intended to cover non-exclusive inclusions.
The present invention has been described in terms of embodiments, and several variations and modifications can be made to the device without departing from the principles of the present invention. It should be noted that all the technical solutions obtained by means of equivalent substitution or equivalent transformation, etc., fall within the protection scope of the present invention.
Claims (6)
1. A novel battery with a tunneling passivation contact structure is provided,comprises an n-type silicon substrate (1), and is characterized in that: the front of n type monocrystalline silicon base (1) has set gradually p type emitting electrode (2), passivation layer (3) and has subtract reflection stratum (4) from bottom to top, positive electrode (5) have set firmly on subtracting reflection stratum (4), the lower extreme downwardly extending of positive electrode (5) to p type emitting electrode (2), wherein, the back top-down of n type monocrystalline silicon base (1) has set gradually
The multilayer thin film transistor comprises a layer (6), an n-poly-si layer (7), a TCO layer (8) and a back electrode (9) fixedly arranged on the TCO layer (8); wherein the thickness of the n-poly-si layer (7) is 20nm-30 nm.
2. The novel tunneling passivation contact structure cell as claimed in claim 1, wherein: the thickness of the TCO layer (8) is 80nm-200 nm.
3. A novel tunneling passivation contact structure cell according to claim 1 or 2, characterized by: the above-mentioned
The thickness of the layer (6) is 0.3-3nm, and the antireflection layer (4) is
A layer of
The thickness of the layer is 80nm-200 nm.
4. A method of making a novel tunnel passivated contact structure cell according to claims 1-3, characterized by: the method comprises the following steps: s1, providing an n-type silicon substrate (1), and cleaning and texturing the n-type silicon substrate (1); s2, performing boron diffusion on the surface of the n-type silicon substrate (1) to prepare a p-type emitter (2); s3 for n typeCarrying out boron cleaning on the back surface of the silicon substrate (1), and removing formed borosilicate glass and boron diffused to the n-type silicon substrate (1); s4 preparation
A layer (6); s5 at
Preparing an n-poly-si layer (7) on the layer (6); s6, etching and cleaning with alkali liquor; s7, carrying out deposition treatment on the p-type emitter (2) to prepare a passivation layer (3); s8, preparing an antireflection layer (4) on the passivation layer (3); s9, carrying out TCO deposition on the n-poly-si layer (7) to prepare a TCO layer (8); and S10, performing laser etching on the front surface of the n-type silicon substrate (1), and preparing a front electrode (5) and a back electrode (9) by adopting a low-temperature silver paste process.
5. The method of claim 4, wherein: the passivation layer (3) adopts
And depositing.
6. The method of claim 4, wherein: s1 includes: and texturing the n-type silicon substrate (1) to form a pyramid light trapping structure.
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