CN114464686B - Novel tunneling passivation contact structure battery and preparation method thereof - Google Patents

Novel tunneling passivation contact structure battery and preparation method thereof Download PDF

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CN114464686B
CN114464686B CN202111622495.8A CN202111622495A CN114464686B CN 114464686 B CN114464686 B CN 114464686B CN 202111622495 A CN202111622495 A CN 202111622495A CN 114464686 B CN114464686 B CN 114464686B
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silicon substrate
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CN114464686A (en
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吴智涵
王永谦
林纲正
陈刚
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Zhejiang Aiko Solar Energy Technology Co Ltd
Guangdong Aiko Technology Co Ltd
Tianjin Aiko Solar Energy Technology Co Ltd
Zhuhai Fushan Aixu Solar Energy Technology Co Ltd
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Zhejiang Aiko Solar Energy Technology Co Ltd
Guangdong Aiko Technology Co Ltd
Tianjin Aiko Solar Energy Technology Co Ltd
Zhuhai Fushan Aixu Solar Energy Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1868Passivation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

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Abstract

A novel tunneling passivation contact structure battery belongs to the technical field of solar cells and comprises an n-type silicon substrate, wherein the front surface of the n-type monocrystalline silicon substrate is sequentially provided with a p-type emitter, a passivation layer and an antireflection layer from bottom to top, a front electrode is fixedly arranged on the antireflection layer, the lower end of the front electrode downwards extends to the p-type emitter, and the back surface of the n-type monocrystalline silicon substrate is sequentially provided withA layer, an n-poly-si layer, a TCO layer, and a back electrode secured to the TCO layer; the anti-reflection layer is an n-poly-si layer, the thickness of the n-poly-si layer is 20nm-30nm, compared with the conventional topcon battery, the n-poly-si layer can meet passivation contact only by 20nm, so that the preparation cost is reduced, meanwhile, on the premise of reducing the thickness by the thickness, the current loss caused by parasitic absorption of the doped polysilicon layer is greatly reduced, and the conversion efficiency of the battery is further improved; the invention also discloses a preparation method of the high-temperature silver paste, and the sintering diffusion problem caused by high-temperature silver paste is avoided by introducing a low-temperature silver paste process.

Description

Novel tunneling passivation contact structure battery and preparation method thereof
Technical Field
The invention belongs to the technical field of solar cell processing, and particularly relates to a novel tunneling passivation contact structure cell and a preparation method thereof.
Background
Currently existing topcon batteries generally adopt a polysilicon doped layer with the wavelength of more than 100nm, so that silver paste in subsequent high-temperature screen printing can be well prevented from being sintered and diffused into a tunneling layer and bulk silicon, and unnecessary compounding is caused.
The doped polysilicon has stronger parasitic absorption and overlarge thickness, so that the process cost is improved, and the performance is greatly lost.
Disclosure of Invention
The invention aims to provide a novel tunneling passivation contact structure battery and a preparation method thereof, so as to solve the problems in the background technology.
In order to achieve the above purpose, the present invention provides the following technical solutions:
The utility model provides a novel tunneling passivation contact structure battery, includes n type silicon substrate, n type monocrystalline silicon substrate's front has set gradually p type projecting pole, passivation layer and antireflection layer from bottom to top, the front electrode has set firmly on the antireflection layer, the lower extreme downwardly extending of front electrode extremely p type projecting pole, wherein, n type monocrystalline silicon substrate's the back top-down has set gradually A layer, an n-poly-si layer, a TCO layer, and a back electrode affixed to the TCO layer; wherein the thickness of the n-poly-si layer (7) is 20nm-30nm.
Preferably, the thickness of the TCO layer is 80-200 nm.
Preferably, the method comprisesThe thickness of the layer is 0.3-3nm, and the antireflection layer is/>A layer of/>The thickness of the layer is 80-200 nm a.
A method for preparing the novel tunneling passivation contact structure battery in any of the above schemes, comprising the following steps:
S1, providing an n-type silicon substrate, cleaning the n-type silicon substrate, and then making wool;
S2, performing boron diffusion on the surface of the n-type silicon substrate to prepare a p-type emitter;
S3, cleaning boron on the back surface of the n-type silicon substrate to remove formed borosilicate glass and boron diffused to the n-type silicon substrate;
s4, preparation A layer;
S5, at Preparing an n-poly-si layer on the layer;
s6, etching and cleaning by alkali liquor;
S7, carrying out deposition treatment on the p-type emitter to prepare a passivation layer;
s8, preparing an antireflection layer on the passivation layer;
S9, TCO deposition is carried out on the n-poly-si layer, and a TCO layer is prepared;
and S10, carrying out laser etching on the front surface of the n-type silicon substrate, and then adopting a low-temperature silver paste process to prepare a front electrode and a back electrode.
Preferably, the passivation layer isAnd (5) depositing.
Preferably, S1 includes: and (5) texturing the n-type silicon substrate to form a pyramid-shaped light trapping structure.
Compared with the prior art, the technical scheme has the following effects:
compared with the conventional topcon battery, the doped polysilicon layer (namely the n-poly-si layer) can meet passivation contact only by 20nm at minimum, so that the preparation cost is reduced, meanwhile, on the premise of reducing the thickness by the width, the current loss caused by parasitic absorption of the doped polysilicon layer is greatly reduced, and the conversion efficiency of the battery is further improved.
Drawings
Fig. 1 is a schematic diagram of the overall structure of the present invention.
In the figure: a 1-n type single crystal silicon substrate; a 2-p type emitter; a 3-passivation layer; 4-an anti-reflection layer; 5-front electrode; 6-A layer; a 7-n-poly-si layer; an 8-TCO layer; 9-a back electrode.
Detailed Description
The following description of the embodiments of the present invention will be made with reference to the accompanying drawings, in which it is evident that the embodiments described are only some embodiments of the present invention, but not all embodiments.
Examples:
The novel tunneling passivation contact structure battery shown in fig. 1 comprises an n-type silicon substrate 1, wherein a p-type emitter 2, a passivation layer 3 and an anti-reflection layer 4 are sequentially arranged on the front surface of the n-type monocrystalline silicon substrate 1 from bottom to top, and in the embodiment, the passivation layer 3 adopts The deposition is carried out, in addition, a front electrode 5 is fixedly arranged on the anti-reflection layer 4, the lower end of the front electrode 5 extends downwards to the p-type emitter 2, wherein the back surface of the n-type monocrystalline silicon substrate 1 is sequentially provided with a/>, from top to bottomA layer 6, an n-poly-si layer 7, a TCO layer 8, and a back electrode 9 secured to the TCO layer 8; wherein the anti-reflection layer 4 is/>A layer, the thickness of the n-poly-si layer being 20nm-30nm; compared with the conventional topcon battery, the doped polysilicon layer (namely the n-poly-si layer) can meet passivation contact only by 20nm at minimum, so that the preparation cost is reduced, meanwhile, on the premise of reducing the thickness by the magnitude, the current loss caused by parasitic absorption of the doped polysilicon layer is greatly reduced, and the conversion efficiency of the battery is further improved.
In this embodiment, the thickness of the TCO layer 8 is 20nm-30nm.
In the present embodiment, theThe thickness of the layer 6 is 0.3-3nm and the thickness of the n-poly-si layer 7 is 15-300nm.
A method for preparing the novel tunneling passivation contact structure battery in any of the above schemes, comprising the following steps: s1, providing an n-type silicon substrate 1, and cleaning and then texturing the n-type silicon substrate 1; i.e. the n-type silicon substrate 1 is textured to form a pyramid-shaped light trapping structure; s2, performing boron diffusion on the surface of the n-type silicon substrate 1 to prepare a p-type emitter 2; s3, cleaning boron on the back surface of the n-type silicon substrate 1 to remove formed borosilicate glass and boron diffused to the n-type silicon substrate 1; specifically, the diffused n-type silicon substrate 1 is subjected to single-sided cleaning (rinsing and soaking on water) by adopting a first mixed solution with the volume ratio of 1:1:7, and then the diffused n-type silicon substrate 1 is soaked in a second mixed solution with the volume ratio of 1:11, so that the effect of forming a polished surface on the back surface of the diffused n-type silicon substrate 1 is achieved, wherein the first mixed solution comprises the following componentsThe components of the second mixed solution are/>Is a basic solution of (a); s4, preparation/>Layer 6, in this example, is prepared/>, on the back side of n-type silicon substrate 1 by promoting a thermal oxygen reaction in an LPCVD apparatusLayer 6, it is worth mentioning that in this preparation process, the equipment needs to be adjusted, i.e. the reaction temperature is adjusted to 550-650 °, and the reaction time is controlled to 10-30min, so as to obtain the corresponding/>The thickness of the layer 6 is 1nm-3nm, and the uniformity of the tunneling oxide layer prepared by the device is high, so that the photoelectric conversion efficiency of the prepared tunneling oxide passivation contact battery is higher; s5, atAn n-poly-si layer 7 is prepared on layer 6; specifically, first, an LPCVD apparatus is used to adjust the reaction temperature to 500-650 DEG, silane is introduced to deposit, thereby forming an intrinsic poly-si, and then, phosphorus diffusion and annealing treatment are performed to the intrinsic poly-si, thereby forming an n-poly-si layer 7;
S6, etching and cleaning by alkali liquor: in the preparation process of S5, the intrinsic poly-si is subjected to wrapping plating to the p-type emitter 2 and is covered and wrapped, meanwhile, a layer of phosphorus silicon film is formed on the surface of the n-poly-si layer 7 on the back surface due to phosphorus diffusion, in the embodiment, the p-type emitter 2 is exposed by cleaning the silicon wafer after S5 by adopting a first mixed solution with the volume ratio of 1:1:7, and meanwhile, the boron silicon film on the n-poly-si layer 7 on the back surface is removed; s7, carrying out deposition treatment on the p-type emitter 2 to prepare a passivation layer 3; s8, preparing an antireflection layer 4 on the passivation layer 3; s9, TCO deposition is carried out on the n-poly-si layer 7 to prepare a TCO layer 8; and S10, carrying out laser etching on the front surface of the n-type silicon substrate 1, and preparing the front electrode 5 and the back electrode 9 by adopting a low-temperature silver paste process.
By adopting the mode for preparation and introducing the low-temperature silver paste process, the problem of sintering diffusion caused by high-temperature silver paste is avoided.
In the description of the present invention, it should be understood that the terms "center," "lateral," "upper," "lower," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate or are based on the orientation or positional relationship shown in the drawings, merely to facilitate description of the invention and simplify the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the invention. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, unless otherwise indicated, the meaning of "a number" is two or more. In addition, the term "include" and any variations thereof are intended to cover a non-exclusive inclusion.
The invention has been described in terms of embodiments, and the device can be modified and improved without departing from the principles of the invention. It should be noted that all technical solutions obtained by equivalent substitution or equivalent transformation fall within the protection scope of the present invention.

Claims (4)

1. The utility model provides a novel tunneling passivation contact structure battery, includes n type silicon substrate (1), its characterized in that: the front surface of the n-type monocrystalline silicon substrate (1) is sequentially provided with a p-type emitter (2), a passivation layer (3) and an antireflection layer (4) from bottom to top, the antireflection layer (4) is fixedly provided with a front electrode (5), the lower end of the front electrode (5) downwards extends to the p-type emitter (2), and the back surface of the n-type monocrystalline silicon substrate (1) is sequentially provided withA layer (6), an n-poly-si layer (7), a TCO layer (8), and a back electrode (9) affixed to the TCO layer (8); wherein the thickness of the n-poly-si layer (7) is 20nm-30nm, the thickness of the TCO layer (8) is 80nm-200nm, the/>The thickness of the layer (6) is 0.3-3nm, and the antireflection layer (4) is/>A layer of/>The thickness of the layer is 80nm-200nm.
2. A method of making the novel tunneling passivation contact cell of claim 1, characterized by: the method comprises the following steps: s1, providing an n-type silicon substrate (1), and cleaning and then texturing the n-type silicon substrate (1); s2, performing boron diffusion on the surface of the n-type silicon substrate (1) to prepare a p-type emitter (2); s3, performing boron cleaning on the back surface of the n-type silicon substrate (1) to remove borosilicate glass formed and boron diffused to the n-type silicon substrate (1); s4, preparationA layer (6); s5, at/>Preparing an n-poly-si layer (7) on the layer (6); s6, etching and cleaning by alkali liquor; s7, carrying out deposition treatment on the p-type emitter (2) to prepare a passivation layer (3); s8, preparing an anti-reflection layer (4) on the passivation layer (3); s9, TCO deposition is carried out on the n-poly-si layer (7) to prepare a TCO layer (8); s10, carrying out laser etching on the front surface of the n-type silicon substrate (1), and preparing a front electrode (5) and a back electrode (9) by adopting a low-temperature silver paste process.
3. The method of manufacturing as claimed in claim 2, wherein: the passivation layer (3) adoptsAnd (5) depositing.
4. A method of preparation as claimed in claim 3, wherein: s1 comprises the following steps: and (3) texturing the n-type silicon substrate (1) to form a pyramid-shaped light trapping structure.
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