CN114236983B - Manufacturing method of alignment mark of photoetching machine and wafer - Google Patents
Manufacturing method of alignment mark of photoetching machine and wafer Download PDFInfo
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- CN114236983B CN114236983B CN202111657864.7A CN202111657864A CN114236983B CN 114236983 B CN114236983 B CN 114236983B CN 202111657864 A CN202111657864 A CN 202111657864A CN 114236983 B CN114236983 B CN 114236983B
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- 238000001259 photo etching Methods 0.000 title claims abstract description 50
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 21
- 238000000034 method Methods 0.000 claims description 29
- 238000001459 lithography Methods 0.000 claims description 28
- 238000000059 patterning Methods 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 abstract description 6
- 238000000206 photolithography Methods 0.000 description 41
- 229920002120 photoresistant polymer Polymers 0.000 description 19
- 238000010586 diagram Methods 0.000 description 10
- 238000005530 etching Methods 0.000 description 6
- 238000004140 cleaning Methods 0.000 description 5
- 239000002184 metal Substances 0.000 description 4
- 239000003814 drug Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
- G03F9/7076—Mark details, e.g. phase grating mark, temporary mark
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
- G03F9/708—Mark formation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
Abstract
The application relates to the technical field of semiconductors, in particular to a manufacturing method of a photoetching machine alignment mark and a wafer, wherein the manufacturing method of the photoetching machine alignment mark comprises the following steps: providing a first photoetching plate, wherein a first pattern and a second pattern are formed on the first photoetching plate, and a first alignment mark and a second alignment mark are respectively formed in an exposure area of a wafer through the first pattern and the second pattern; providing a second photoetching plate, forming a third pattern and a fourth pattern on the second photoetching plate, forming a fourth alignment mark for overlapping the second alignment mark through the fourth pattern, and covering the first alignment mark through the third pattern; providing a third photoetching plate, forming a fifth pattern on the third photoetching plate, and forming a third alignment mark for overlapping the first alignment mark through the fifth pattern. The manufacturing method of the alignment mark of the photoetching machine can improve the alignment precision and the yield of the alignment mark.
Description
Technical Field
The application relates to the technical field of semiconductors, in particular to a manufacturing method of a photoetching machine alignment mark and a wafer.
Background
Photolithography is a key process for precision patterning in the semiconductor industry, because the patterning structure is on the order of microns or sub-microns, and requires patterning Overlay between different levels. The current wafer semiconductor product needs to be subjected to three times of photoetching, wherein the first photoetching is to manufacture two alignment marks: the first mark and the second mark are overlapped by a third mark, the first mark is overlapped by a fourth mark by the third mark, and the second mark is spaced between the third mark and the first mark by the second mark, so that the first mark made by the first mark is easy to be corroded by an oxidant to cause the resolution to be poor, the signal to be poor and the overlay precision to be poor in the third mark to cause the reworking or scrapping of the product.
Disclosure of Invention
The purpose of the application is to provide a manufacturing method of a photoetching machine alignment mark and a wafer, wherein the manufacturing method of the photoetching machine alignment mark can improve the alignment precision and the yield of the alignment mark.
To this end, in a first aspect, an embodiment of the present application provides a method for manufacturing a registration mark of a lithography machine, including: providing a first photoetching plate, wherein a first pattern and a second pattern are formed on the first photoetching plate, and a first alignment mark and a second alignment mark are respectively formed in an exposure area of a wafer through the first pattern and the second pattern; providing a second photoetching plate, wherein a third pattern and a fourth pattern are formed on the second photoetching plate, a fourth alignment mark is formed by the fourth pattern in an overlapping manner, and the first alignment mark is covered by the third pattern; providing a third photoetching plate, wherein a fifth pattern is formed on the third photoetching plate, and a third alignment mark which is used for overlaying the first alignment mark is formed through the fifth pattern.
In one possible implementation manner, the first patterns on the first photolithography plate are provided with a plurality of different sizes, a plurality of first alignment marks with different sizes are formed in an exposure area of a wafer through a plurality of first patterns, the second patterns on the first photolithography plate are provided with a plurality of different sizes, and a plurality of second alignment marks with different sizes are formed in the exposure area of the wafer through a plurality of second patterns; the third patterns on the second photoetching plate are provided with a plurality of different sizes, the plurality of first alignment marks are respectively covered by the plurality of third patterns, the fourth patterns on the second photoetching plate are provided with a plurality of different sizes, and a plurality of fourth alignment marks respectively sleeved with the plurality of second alignment marks are formed in an exposure area of the wafer by the plurality of fourth patterns; the fifth patterns on the third photoetching plate are provided with a plurality of patterns with different sizes, and a plurality of third alignment marks respectively overlapping a plurality of first alignment marks are formed in an exposure area of the wafer through the fifth patterns.
In one possible implementation, before forming the fourth alignment mark on the wafer by the fourth pattern, the method further includes: and scanning the signal intensity of a plurality of second alignment marks on the wafer for the first time, and selecting the second alignment marks with the signal intensity meeting the first threshold value to finish engraving.
In one possible implementation, before forming the third alignment mark overlapping the first alignment mark on the wafer through the fifth pattern, the method further includes scanning the signal intensities of the plurality of first alignment marks on the wafer for a second time, and selecting the first alignment mark with the signal intensity meeting the second threshold value to complete the alignment.
In one possible implementation, one or more of the first alignment mark, the second alignment mark, the third alignment mark, and the fourth alignment mark are located within a scribe line of a wafer.
In one possible implementation, the first alignment mark, the second alignment mark, the third alignment mark, and the fourth alignment mark are located in a pattern area of the wafer.
In one possible implementation manner, before the forming the first alignment mark and the second alignment mark on the wafer, the method further includes: a reference reticle is provided, a reference pattern is formed on the reference reticle, and a reference mark is formed in an alignment region of a wafer, the alignment region being located in a region other than the exposure region of the wafer.
In one possible implementation manner, a sixth pattern is further formed on the third lithographic plate, and the sixth pattern is used for overlaying the second alignment mark.
In a second aspect, an embodiment of the present application provides a wafer manufactured by performing alignment and patterning processes using the method for manufacturing alignment marks by using the photolithography machine as described above.
In one possible implementation manner, a first alignment mark and a second alignment mark are formed on an exposure area of the wafer, and the number of the first alignment mark and the number of the second alignment mark are respectively two, and the two groups of the first alignment marks and the two groups of the second alignment marks are symmetrically arranged relative to a central line of the exposure area.
According to the manufacturing method of the alignment mark of the lithography machine and the wafer, the first alignment mark and the second alignment mark are manufactured on the wafer through the first pattern and the second pattern on the first lithography plate, the second alignment mark is overlapped and formed on the wafer through the fourth pattern on the second lithography plate, the third lithography plate covers the first alignment mark, the first alignment mark is protected, the first alignment mark is overlapped and formed on the wafer through the fifth pattern on the third lithography plate, the first alignment mark is prevented from being damaged by a medicament in the device manufacturing process, the appearance of the alignment mark is prevented from being influenced, the alignment precision is guaranteed, and the yield is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief description will be given below of the drawings that are needed in the embodiments or the prior art descriptions, and it is obvious that the drawings in the following description are some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art. In addition, in the drawings, like parts are designated with like reference numerals and the drawings are not drawn to actual scale.
FIG. 1 is a block flow diagram of a method for making alignment marks of a lithography machine according to an embodiment of the present application;
FIG. 2 is a schematic structural diagram of a first lithographic plate according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram illustrating a structure of a second lithographic plate according to an embodiment of the present application;
FIG. 4 is a schematic structural diagram of a third lithographic apparatus according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram of a first layer of a wafer according to an embodiment of the present disclosure;
FIG. 6 is a schematic diagram of a structure of a wafer according to an embodiment of the present disclosure when performing a second layer lithography;
FIG. 7 is a schematic diagram illustrating a structure of a wafer according to an embodiment of the present disclosure when performing third layer lithography;
fig. 8 is a schematic cross-sectional structure of a third alignment mark provided in an embodiment of the present application on a wafer;
FIG. 9 is a schematic diagram of another first lithographic apparatus according to an embodiment of the present disclosure;
FIG. 10 is a schematic diagram of another second mask according to an embodiment of the present disclosure;
fig. 11 is a schematic structural diagram of another third lithographic plate according to an embodiment of the present application.
Reference numerals illustrate:
1. a first photolithography plate; 11. a first pattern; 12. a second pattern;
2. a second photolithography plate; 21. a third pattern; 22. a fourth pattern;
3. a third photolithography plate; 31. a fifth pattern; 32. a sixth pattern;
4. a wafer; 41. a first alignment mark; 42. a second alignment mark; 43. a third alignment mark; 44. fourth alignment marks.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present application based on the embodiments herein.
As shown in fig. 1 and 8, an embodiment of the present application provides a method for manufacturing a registration mark of a lithography machine, including:
s1, providing a first photoetching plate 1, forming a first pattern 11 and a second pattern 12 on the first photoetching plate 1, and forming a first alignment mark 41 and a second alignment mark 42 on an exposure area of a wafer 4 through the first pattern 11 and the second pattern 12 respectively;
s2, providing a second photoetching plate 2, forming a third pattern 21 and a fourth pattern 22 on the second photoetching plate 2, forming a fourth alignment mark 44 for overlapping the second alignment mark 42 through the fourth pattern 22, and covering the first alignment mark 41 through the third pattern 21;
s3, providing a third photoetching plate 3, forming a fifth pattern 31 on the third photoetching plate 3, and forming a third alignment mark 43 for overlapping the first alignment mark 41 through the fifth pattern 31.
In this embodiment, the first alignment mark 41 and the second alignment mark 42 are respectively manufactured on the wafer 4 through the first pattern 11 and the second pattern 12 on the first photolithography plate 1, the second alignment mark 42 is aligned with the fourth pattern 22 on the second photolithography plate 2 and the fourth alignment mark 44 is formed on the wafer 4, the third photolithography plate 3 covers the first alignment mark 41 to protect the first alignment mark 41, the fifth pattern 31 on the third photolithography plate 3 is aligned with the first alignment mark 41, and the third alignment mark 43 is formed on the wafer 4, so that the first alignment mark 41 is prevented from being damaged by the medicament in the device manufacturing process to affect the appearance of the alignment mark, thereby realizing ensuring the alignment precision and improving the yield.
Specifically, the wafer 4 is sliced monocrystalline silicon, an oxide layer (silicon dioxide) is formed on the surface of the wafer, and when photolithography is performed, the oxide layer on the surface of the wafer is removed by transferring the pattern on the photolithography mask onto the wafer 4 and etching, the oxide layer on the exposed part of the wafer is removed in etching, and the oxide layer covered by the photoresist is protected and maintained.
As shown in fig. 2, in the embodiment of the present application, the shape of the first pattern 11 is a cross-shaped hole, the length of the cross-shaped hole is 200 μm, the width is 200 μm, and the slit width is 4 μm. The second pattern 12 is in the shape of a cross-shaped aperture having a length of 200 μm, a width of 200 μm and a slit width of 4 μm.
In the present application, the first pattern 11 and the second pattern 12 on the first photolithography plate 1 form the first alignment mark 41 and the second alignment mark 42 on the wafer 4, respectively, and the first alignment mark 41 and the second alignment mark 42 formed are cross-shaped marks with 200 μm by 200 μm and a line width of 4 μm.
In other embodiments, the first pattern 11 and the second pattern 12 may also have other shapes with other dimensions, so as to form the first alignment marks 41 and the second alignment marks 42 with other dimensions and shapes on the wafer 4, which may be specifically set according to practical requirements.
Specifically, in the present application, two first alignment marks 41 and two second alignment marks 42 are respectively disposed, the two first alignment marks 41 are respectively disposed at the upper left corner and the upper right corner of the wafer 4, and the two second alignment marks 42 are respectively disposed at the upper left corner and the upper right corner of the wafer 4.
As shown in fig. 3, in the embodiment of the present application, the third pattern 21 has a rectangular shape, and the rectangular shape has a length of 200 μm and a width of 200 μm; the fourth pattern 22 is in the shape of a cross-shaped aperture having a length of 200 μm, a width of 200 μm, and a slit width of 6 μm.
In this application, the third pattern 21 on the second photolithography plate 2 adopts a 200 μm rectangular structure, so that the first alignment mark 41 on the wafer 4 can be completely covered, corrosion to the first alignment mark 41 during the second layer photolithography is avoided, the fourth pattern 22 adopts a 200 μm cross structure with a pitch width of 6 μm, 4 square blocks arranged in a matrix are formed on the wafer 4, and the four square blocks are just located in the four quadrants of the second alignment mark 42, thereby completing the alignment of the second alignment mark 42 and forming the fourth alignment mark 44 during the second layer photolithography.
Specifically, two third patterns 21 and two fourth patterns 22 are respectively disposed, the two third patterns 21 respectively cover the two first alignment marks 41, the two fourth patterns 22 respectively overlay the two second alignment marks 42, and two fourth alignment marks 44 are respectively formed on the wafer 4, and during the second layer photolithography operation, fine alignment of the wafer and the second photolithography plate 2 is completed through the two fourth alignment marks 44.
In other embodiments, the third pattern 21 and the fourth pattern may take other shapes with other sizes, so as to form fourth alignment marks 44 with other sizes and shapes on the wafer 4, which may be specifically set according to practical requirements.
As shown in fig. 4, in the embodiment of the present application, the fifth pattern 31 has a cross-shaped hole with a length of 200 μm, a width of 200 μm, and a slit width of 6 μm. The sixth pattern 32 has the shape of a cross-shaped aperture with a length of 200 μm, a width of 200 μm and a slit width of 6 μm.
In this application, the fifth pattern 31 adopts a cross structure with 200 μm by 200 μm and a pitch width of 6 μm, and forms 4 square blocks arranged in a matrix on the wafer 4, where the four square blocks are just located in four quadrants of the first alignment mark 41, so as to complete the alignment of the first alignment mark 41 and form a third alignment mark 43 during the third layer lithography.
In other embodiments, the fifth pattern 31 and the sixth pattern 32 may also have other shapes with other dimensions, so as to form the third alignment marks 43 with other dimensions and shapes on the wafer 4, which may be specifically set according to practical requirements.
In this embodiment, the first patterns 11 on the first photolithography plate 1 are provided with a plurality of different sizes, the plurality of first alignment marks 41 with different sizes are formed in the exposure area of the wafer 4 by the plurality of first patterns 11, the second patterns 12 on the first photolithography plate 1 are provided with a plurality of different sizes, and the plurality of second alignment marks 42 with different sizes are formed in the exposure area of the wafer 4 by the plurality of second patterns 12.
The third patterns 21 on the second reticle 2 are provided in a plurality of different sizes, the plurality of first alignment marks 41 are covered by the plurality of third patterns 21, the plurality of fourth patterns 22 on the second reticle 2 are provided in a plurality of different sizes, and a plurality of fourth alignment marks 44 are formed in the exposed area of the wafer 4 by the plurality of fourth patterns 22, the plurality of second alignment marks 42 being respectively aligned.
The fifth patterns 31 on the third photolithography plate 3 are provided in a plurality of different sizes, and a plurality of third alignment marks 43 for respectively aligning the plurality of first alignment marks 41 are formed in the exposure region of the wafer 4 by the plurality of fifth patterns 31.
As shown in fig. 9, specifically, there are two first patterns 11, wherein one first pattern 11 has a cross-shaped structure with 200 μm by 200 μm and a line width of 4 μm, and the other first pattern 11 has a cross-shaped structure with 150 μm by 150 μm and a line width of 3 μm.
The second patterns 12 have two, one of the second patterns 12 has a cross-shaped structure with 200 μm by 200 μm and a line width of 4 μm, and the other second pattern 12 has a cross-shaped structure with 150 μm by 150 μm and a line width of 3 μm.
As shown in fig. 10, two third patterns 21 are provided, the two third patterns 21 are respectively 200 μm square by 200 μm square and 150 μm square by 150 μm square, and the two third patterns 21 cover the two first alignment marks 41, respectively.
The fourth patterns 22 are provided with two cross-shaped structures with 200 μm by 200 μm and a pitch width of 6 μm, wherein one of the fourth patterns 22 is used for overlaying the second alignment marks 42 with 200 μm by 200 μm and a line width of 4 μm, and the other of the fourth patterns 22 is used for overlaying the second alignment marks 42 with 150 μm by 150 μm and a pitch width of 4 μm and a line width of 3 μm.
As shown in fig. 11, the fifth patterns 31 are provided with two cross-shaped structures with 200 μm by 200 μm and a pitch width of 6 μm, for the alignment of the first alignment marks 41 with 200 μm by 200 μm and a line width of 4 μm, and the other fifth patterns 31 are provided with a cross-shaped structure with 150 μm by 150 μm and a pitch width of 4 μm, for the alignment of the first alignment marks 41 with 150 μm by 150 μm and a line width of 3 μm.
The alignment marks with different sizes are preferably used for alignment, so that the precision is ensured, and if the alignment marks with smaller sizes are damaged in etching, the alignment marks with larger sizes can be used for alignment, so that the smooth operation of the alignment marks is ensured.
In this embodiment, before forming the fourth alignment mark 44 for overlaying the second alignment mark 42 on the wafer 4 by using the fourth pattern 22, the method further includes:
the signal intensity of the plurality of second alignment marks 42 on the wafer 4 is scanned for the first time, and the second alignment marks 42 with the signal intensity meeting the first threshold are selected to finish the alignment.
Specifically, the second alignment marks 42 with the strongest signals are screened out and input into the machine for storage by scanning the plurality of second alignment marks 42, and the fourth pattern 22 matched with the second alignment mark 42 with the strongest signals is selected for overlay. The signal is strongest for the second alignment marks 42 whose signal strength meets the first threshold.
In this embodiment, before forming the third alignment mark 43 for overlaying the first alignment mark 41 on the wafer 4 by using the fifth pattern 31, the method further includes:
the signal intensity of the plurality of first alignment marks 41 on the wafer 4 is scanned for the second time, and the first alignment marks 41 with the signal intensity meeting the second threshold are selected to finish the alignment.
Specifically, the first alignment marks 41 with the strongest signals are selected and input into the machine for storage by scanning the plurality of first alignment marks 41, and the fifth pattern 31 matched with the first alignment mark 41 with the strongest signals is selected for alignment. The signal is strongest for the first alignment mark 41 whose signal strength meets the second threshold.
In one embodiment of the present application, one or more of the first alignment mark 41, the second alignment mark 42, the third alignment mark 43, and the fourth alignment mark 44 are located within the streets of the wafer 4.
In this application, by setting the first alignment mark 41, the second alignment mark 42, the third alignment mark 43, and the fourth alignment mark 44 in the runner, the area of the product is not occupied, and the die is utilized to the maximum.
In another embodiment of the present application, the first alignment mark 41, the second alignment mark 42, the third alignment mark 43 and the fourth alignment mark 44 are located in the pattern area of the wafer 4.
In the present application, the first alignment mark 41, the second alignment mark 42, the third alignment mark 43 and the fourth alignment mark 44 are disposed in the sliding-blade track, so that occupation of a product area is reduced, and die yield is improved.
In this embodiment, before forming the first alignment mark 41 and the second alignment mark 42 on the wafer 4, the method further includes:
a reference reticle is provided, a reference pattern is formed on the reference reticle, a reference mark is formed in an alignment region of the wafer 4, and the alignment region is located in a region other than an exposure region of the wafer 4.
In this application, the reference marks are used for rough alignment of the alignment system of the lithography machine, and the size of the reference marks is larger than the sizes of the first alignment mark 41, the second alignment mark 42, the third alignment mark 43, and the fourth alignment mark 44.
Further, the fiducial marks are in a 4mm x 4mm cross-shaped structure.
In other embodiments, the reference mark can also adopt other patterns with other sizes, and the reference mark can be specifically set according to actual requirements.
In this embodiment, a sixth pattern 32 is further formed on the third lithographic plate 3, and the sixth pattern 32 may be aligned with the second alignment mark 42.
In this application, before performing photolithography, it is necessary to detect the precision of the first photolithography plate 1, the second photolithography plate 2, and the third photolithography plate 3, where the precision of the photolithography plate can be detected by whether the fifth pattern 31 on the third photolithography plate 3 can be aligned with the first alignment mark 41 or whether the sixth pattern 32 can be aligned with the second alignment mark 42.
In this application, there are cleaning, drying and photoresist coating operations of the wafer 4 before S1, and a first layer of photoresist is coated on the wafer 4, and before the first layer of photoresist is coated, a tackifier may be coated first to ensure the adhesion effect of the first layer of photoresist.
Specifically, the photoresist used in the present application is positive photoresist, i.e. the exposed area is chemically reacted, and the pattern of the non-exposed area remains, so that the first layer of lithography leaves the raised first alignment mark 41 and second alignment mark 42 on the wafer.
And S1, carrying out wet etching or dry etching on the wafer 4, wherein an oxide layer which is not covered by the first photoresist is etched, the oxide layer which is protected by the first photoresist is reserved to form a first photoresist pattern, and then cleaning the first photoresist, wherein the cleaning photoresist can be cleaned by adopting an organic solvent.
Before S2, after the first layer of photoresist is cleaned, the oxide layers at the first alignment mark 41 and the second alignment mark 42 remain, so after the second layer of photoresist is coated, protrusions are formed at the first alignment mark 41 and the second alignment mark 42 of the second layer of photoresist, alignment is performed according to the protrusions, and alignment of the fourth pattern 22 to the second alignment mark 42 and coverage of the third pattern 21 to the first alignment mark 41 are completed.
Fine alignment is performed according to the formation of the fourth alignment mark 44 on the second layer of photoresist, then wet etching or dry etching is performed to obtain a second layer of photoresist pattern, and then the second layer of photoresist is cleaned.
Since the third pattern 21 covers the first alignment mark 41, the first alignment mark 41 can be well preserved, and the first alignment mark 41 is prevented from being distorted in the etching process.
Before S3, a metal layer is first deposited on the wafer 4, and the bump of the first alignment mark 41 is left on the metal layer, and the fifth pattern 31 on the third photolithography plate 3 is aligned on the first alignment mark 41, so as to form a third alignment mark 43 on the metal layer, which is used as a fine alignment mark for the third layer photolithography.
The embodiment of the application provides a lithography machine, which comprises: a first reticle 1, a second reticle 2, a third reticle 3, an alignment correction system and an exposure system.
The first photolithography plate 1 is formed with a first pattern 11 and a second pattern 12, and the first pattern 11 and the second pattern 12 are used to form a first alignment mark 41 and a second alignment mark 42 on the wafer 4, respectively.
The second photolithography plate 2 is formed with a third pattern 21 for covering the first alignment mark 41 and a fourth pattern 22 for overlaying the second alignment mark 42.
The third photolithography plate 3 is formed with a fifth pattern 31 for registering the first alignment mark 41 and a sixth pattern 32 for registering the second alignment mark 42.
An alignment correction system performs alignment correction according to the first, second, or third photolithography plates 1, 2, or 3.
The exposure system performs exposure using the first, second, or third photolithography plates 1, 2, or 3.
In the present application, the alignment correction system is used for correcting the first reticle 1, the second reticle 2 or the third reticle 3, and the exposure system is used for exposing the wafer 4 through the first reticle 1, the second reticle 2 or the third reticle 3.
In performing the first layer lithography, the first lithographic plate 1 is mounted on a lithographic machine, and the first pattern 11 and the second pattern 12 on the first lithographic plate 1 are used to form a first alignment mark 41 and a second alignment mark 42 on the wafer 4, respectively. Wherein, the first alignment marks 41 are respectively positioned at the left upper corner and the right upper corner of the wafer 4, and the second alignment marks 42 are respectively positioned at the left upper corner and the right upper corner of the wafer 4.
In the second layer lithography, the second mask 2 is mounted on a lithography machine, the first alignment mark 41 is covered by the third pattern 21 on the second mask 2, the fourth pattern 22 is aligned with the second alignment mark 42, the fourth alignment mark 44 is formed on the wafer 4, and the fourth alignment mark 44 is used as a fine alignment mark in the second layer lithography. Two fourth alignment marks 44 are provided, and the two fourth alignment marks 44 are respectively located at the upper left corner and the upper right corner of the wafer 4.
In the third layer lithography, the third mask 3 is mounted on a lithography machine, the first alignment mark 41 is aligned by the fifth pattern 31 on the third mask 3, the third alignment mark 43 is formed on the wafer 4, and the third alignment mark 43 is used as a fine alignment mark in the third layer lithography.
In this embodiment, the apparatus further includes a reference photolithography plate on which a reference pattern is formed.
In the present application, the reference plate is used as a rough alignment, and before performing the first layer lithography, the reference plate is first processed and mounted on a lithography machine, and a reference mark is formed on the wafer 4 by a reference pattern on the lithography machine as a rough mark.
The embodiment of the application provides a wafer which is manufactured by aligning and performing pattern processing by adopting a manufacturing method of an alignment mark of a photoetching machine.
As shown in fig. 5, in the present application, two first alignment marks 41 and two second alignment marks 42 are first etched on a wafer by the first photolithography plate 1, and the two first alignment marks 41 are respectively located at the upper left and upper right of the wafer 4.
As shown in fig. 6, after the wafer etching and cleaning operation, a second layer of photoresist is coated, two fourth alignment marks 44 are etched on the wafer semiconductor product by the second photolithography plate 2, the two fourth alignment marks 44 are respectively located at the upper left corner and the upper right corner of the wafer 4, the two fourth alignment marks 44 are symmetrically arranged on the left and right sides, and the two fourth alignment marks 44 are used as fine alignment marks in the second layer of photolithography.
As shown in fig. 7, after etching and cleaning the wafer, a metal layer is deposited, two third alignment marks 43 are etched on the semiconductor product of the wafer by the third photolithography plate 3, the two third alignment marks 43 are respectively located at the upper left corner and the upper right corner of the wafer 4, and are symmetrically arranged left and right, and the two third alignment marks 43 are used as fine alignment marks in the third layer photolithography.
In the embodiment of the present application, the first patterning process is performed according to the fourth alignment mark 44, and the second patterning process is performed according to the third alignment mark 43.
The second alignment mark 42 on the wafer 4 serves as an alignment base for the fourth pattern 22 to complete the alignment mark in the second layer of lithography, and the first alignment mark 41 on the wafer 4 serves as an alignment base for the fifth pattern 31 to complete the alignment mark in the third layer of lithography.
According to the manufacturing method of the alignment mark of the photoetching machine, the first alignment mark 41 and the second alignment mark 42 are manufactured on the wafer 4 through the first pattern 11 and the second pattern 12 on the first photoetching plate 1, the second alignment mark 42 is overlapped and formed on the wafer 4 through the fourth pattern 22 on the second photoetching plate 2, the first alignment mark 41 is covered by the third photoetching plate 3 to protect the first alignment mark 41, the first alignment mark 41 is overlapped and engraved through the fifth pattern 31 on the third photoetching plate 3, and the third alignment mark 43 is formed on the wafer 4, so that the first alignment mark 41 is prevented from being damaged by a medicament in the device manufacturing process to influence the shape of the alignment mark, the alignment precision is guaranteed, and the yield is improved.
It should be noted that references in the specification to "one embodiment," "an example embodiment," "some embodiments," etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Furthermore, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
It should be readily understood that the terms "on … …", "above … …" and "above … …" in this disclosure should be interpreted in the broadest sense such that "on … …" means not only "directly on something", but also includes "on something" with intermediate features or layers therebetween, and "above … …" or "above … …" includes not only the meaning "on something" or "above" but also the meaning "above something" or "above" without intermediate features or layers therebetween (i.e., directly on something).
Further, spatially relative terms, such as "below," "beneath," "above," "over," and the like, may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may have other orientations (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein interpreted accordingly.
It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.
Claims (8)
1. The manufacturing method of the alignment mark of the photoetching machine is characterized by comprising the following steps of:
providing a first photoetching plate, wherein a first pattern and a second pattern are formed on the first photoetching plate, and a first alignment mark and a second alignment mark are respectively formed in an exposure area of a wafer through the first pattern and the second pattern;
providing a second photoetching plate, wherein a third pattern and a fourth pattern are formed on the second photoetching plate, a fourth alignment mark is formed by the fourth pattern in an overlapping manner, and the first alignment mark is covered by the third pattern;
providing a third photoetching plate, wherein a fifth pattern is formed on the third photoetching plate, and a third alignment mark for overlaying the first alignment mark is formed through the fifth pattern;
the first patterns on the first photoetching plate are provided with a plurality of different sizes, a plurality of first alignment marks with different sizes are formed in an exposure area of a wafer through the plurality of first patterns, the second patterns on the first photoetching plate are provided with a plurality of different sizes, and a plurality of second alignment marks with different sizes are formed in the exposure area of the wafer through the plurality of second patterns;
the third patterns on the second photoetching plate are provided with a plurality of different sizes, the plurality of first alignment marks are respectively covered by the plurality of third patterns, the fourth patterns on the second photoetching plate are provided with a plurality of different sizes, and a plurality of fourth alignment marks respectively sleeved with the plurality of second alignment marks are formed in an exposure area of the wafer by the plurality of fourth patterns;
the fifth patterns on the third photoetching plate are provided with a plurality of different sizes, and a plurality of third alignment marks respectively overlapping a plurality of first alignment marks are formed in an exposure area of the wafer through the fifth patterns;
and a sixth pattern is further formed on the third photoetching plate, and the sixth pattern is used for overlaying the second alignment mark.
2. The method of claim 1, further comprising, before forming a fourth alignment mark on the wafer by the fourth pattern, the fourth alignment mark for overlaying the second alignment mark:
and scanning the signal intensity of a plurality of second alignment marks on the wafer for the first time, and selecting the second alignment marks with the signal intensity meeting the first threshold value to complete the engraving.
3. The method of claim 1, further comprising, before forming a third alignment mark on the wafer that overlaps the first alignment mark by the fifth pattern:
and scanning the signal intensity of the first alignment marks on the wafer for the second time, and selecting the first alignment marks with the signal intensity meeting the second threshold value to finish the engraving.
4. The method of claim 1, wherein one or more of the first, second, third, and fourth alignment marks are located within a runner of a wafer.
5. The method of claim 1, wherein the first, second, third, and fourth alignment marks are located in a patterned area of the wafer.
6. The method for manufacturing alignment marks of a lithography machine according to claim 1, wherein before forming the first alignment mark and the second alignment mark on the wafer, respectively, the method further comprises:
a reference reticle is provided, a reference pattern is formed on the reference reticle, and a reference mark is formed in an alignment region of a wafer, the alignment region being located in a region other than the exposure region of the wafer.
7. A wafer, characterized in that the wafer is manufactured by performing alignment and patterning processes by using the method for manufacturing alignment marks of a lithography machine according to any one of claims 1 to 6.
8. The wafer of claim 7, wherein a first alignment mark and a second alignment mark are formed on an exposure area of the wafer, and the number of the first alignment mark and the second alignment mark is two, and the two sets of the first alignment mark and the two sets of the second alignment mark are symmetrically arranged relative to a center line of the exposure area.
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