CN114108080A - Graphite substrate, and method for manufacturing graphite substrate and light emitting diode epitaxial wafer - Google Patents

Graphite substrate, and method for manufacturing graphite substrate and light emitting diode epitaxial wafer Download PDF

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CN114108080A
CN114108080A CN202111159047.9A CN202111159047A CN114108080A CN 114108080 A CN114108080 A CN 114108080A CN 202111159047 A CN202111159047 A CN 202111159047A CN 114108080 A CN114108080 A CN 114108080A
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layer
graphite
epitaxial wafer
isolation layer
graphite substrate
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葛永晖
丁涛
郭炳磊
肖云飞
陆香花
李鹏
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HC Semitek Zhejiang Co Ltd
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HC Semitek Zhejiang Co Ltd
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Abstract

The disclosure provides a graphite substrate, and manufacturing methods of the graphite substrate and a light-emitting diode epitaxial wafer, and belongs to the technical field of semiconductors. The graphite basal plate includes graphite dish and a plurality of cyclic annular isolation layer, the graphite dish is the disc, the surface of graphite dish has a plurality of recesses that are used for holding the epitaxial wafer, every all have in the recess and be used for supporting the epitaxial wafer cyclic annular isolation layer, cyclic annular isolation layer is two-dimensional atomic crystal material layer. The graphite substrate is adopted to grow the light-emitting diode epitaxial wafer, the condition of uneven heating can be reduced, the wavelength uniformity of the epitaxial wafer is improved, and the generation of cracks of the epitaxial wafer is effectively reduced.

Description

Graphite substrate, and method for manufacturing graphite substrate and light emitting diode epitaxial wafer
Technical Field
The disclosure relates to the technical field of semiconductors, and in particular relates to a graphite substrate, and manufacturing methods of the graphite substrate and a light emitting diode epitaxial wafer.
Background
The graphite substrate is a very important part of a Metal-organic Chemical Vapor Deposition (MOCVD) apparatus, and plays a role in growing an epitaxial wafer.
The graphite substrate is made of high-purity graphite, and a tray coated with a SiC coating is used for placing an epitaxial wafer to enter a reaction cavity for growth. The substrate of the epitaxial wafer is placed on the tray, and the heat energy provided by the heating wire is conducted to the substrate of the epitaxial wafer through the tray.
In the growth process, the substrate is directly contacted with the graphite substrate, so that the substrate is heated greatly, and each part is easy to be heated unevenly, so that not only is the epitaxial wafer easy to crack, but also the wavelength of each part is easy to be uneven.
Disclosure of Invention
The embodiment of the disclosure provides a graphite substrate, a graphite substrate and a manufacturing method of a light emitting diode epitaxial wafer, which can reduce the condition of uneven heating, improve the wavelength uniformity of the epitaxial wafer and effectively reduce the generation of cracks of the epitaxial wafer. The technical scheme is as follows:
in a first aspect, a graphite substrate is provided, the graphite substrate comprises a graphite disc and a plurality of annular isolation layers, the graphite disc is a circular disc, a plurality of grooves for accommodating epitaxial wafers are arranged on the surface of the graphite disc, each groove is internally provided with the annular isolation layer for supporting the epitaxial wafers, and the annular isolation layer is a two-dimensional atomic crystal material layer.
Optionally, the annular isolation layer is a graphene layer, a silylene layer, a germanium-alkene layer, or a hexagonal boron nitride layer.
Optionally, the width of the annular isolation layer is 0.1-2 mm.
Optionally, the thickness of the annular isolation layer is 1-100 um.
Optionally, the annular isolation layer is located on a trench bottom surface of the groove.
Optionally, an outer diameter of the annular isolation layer matches an inner diameter of the groove.
In a second aspect, there is provided a method of manufacturing a graphite substrate, the method including:
providing a graphite disc, wherein the graphite disc is a circular disc, and the surface of the graphite disc is provided with a plurality of grooves for accommodating epitaxial wafers;
depositing an isolation layer in each groove, wherein the isolation layer is a two-dimensional atomic crystal material layer;
and removing part of the isolation layer to enable the isolation layer in each groove to be annular so as to form an annular isolation layer.
Optionally, the depositing an isolation layer in each of the grooves includes:
and depositing a graphene layer, a silylene layer, a germanium-alkene layer or a hexagonal boron nitride layer in the groove of the graphite disc by adopting a chemical vapor deposition mode.
Optionally, a laser lift-off method is adopted to lift off and remove part of the isolation layer.
In a third aspect, a method for manufacturing an epitaxial wafer of a light emitting diode is provided, the method comprising:
manufacturing a graphite substrate by the manufacturing method according to the first aspect;
and growing a light-emitting diode epitaxial wafer on the annular isolating layer in the graphite substrate.
The technical scheme provided by the embodiment of the disclosure has the following beneficial effects:
the annular isolating layers are arranged in the grooves of the graphite plate respectively and can be used for supporting the epitaxial wafer. In the process of epitaxial growth by adopting the graphite substrate, the edge area of the epitaxial wafer is in contact with the annular isolation layer, and the central area is suspended, so that the epitaxial wafer can be prevented from being in direct contact with the graphite substrate, the heating of each part of the epitaxial wafer is reduced, the condition of uneven heating is reduced, and the wavelength uniformity of the epitaxial wafer is improved. Meanwhile, the annular isolation layer is a two-dimensional atomic crystal material layer, the two-dimensional atomic crystal material is high-temperature resistant, the heat conductivity coefficient is slightly lower than that of the graphite plate, the heat conductivity is poorer, and the heat transferred to the edge area of the epitaxial wafer can be reduced. Therefore, the growth temperature of the central area of the epitaxial wafer is slightly higher than that of the edge area, so that the release of the internal stress of the epitaxial wafer to the edge area is facilitated, the generation of cracks of the epitaxial wafer is reduced, the crystal quality is improved, and the device performance is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a graphite substrate according to an embodiment of the present disclosure;
FIG. 2 is a schematic structural diagram of a groove provided in an embodiment of the present disclosure;
FIG. 3 is a view from the direction A of FIG. 2;
fig. 4 is a flowchart of a method for manufacturing a graphite substrate according to an embodiment of the disclosure;
fig. 5 is a flowchart of a method for manufacturing a graphite substrate according to an embodiment of the disclosure;
fig. 6 is a schematic structural diagram of an ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present disclosure;
fig. 7 is a flowchart of a method for manufacturing an ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present disclosure.
Detailed Description
To make the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a graphite substrate provided in an embodiment of the present disclosure, and as shown in fig. 1, the graphite substrate 100 includes a graphite disk 10 and a plurality of annular isolation layers 20. The graphite plate 10 is a circular disk, and the surface of the graphite plate 10 has a plurality of grooves 10a for receiving epitaxial wafers.
Fig. 2 is a schematic structural diagram of a groove provided in an embodiment of the present disclosure, each groove 10a has a ring-shaped isolation layer 20 therein for supporting an epitaxial wafer 200, and the ring-shaped isolation layer 20 is a two-dimensional atomic crystal material layer.
According to the embodiment of the disclosure, the annular isolating layers are respectively arranged in the grooves of the graphite plate, and the annular isolating layers can be used for supporting the epitaxial wafer. In the process of epitaxial growth by adopting the graphite substrate, the edge area of the epitaxial wafer is in contact with the annular isolation layer, and the central area is suspended, so that the epitaxial wafer can be prevented from being in direct contact with the graphite substrate, the heating of each part of the epitaxial wafer is reduced, the condition of uneven heating is reduced, and the wavelength uniformity of the epitaxial wafer is improved. Meanwhile, the annular isolation layer is a two-dimensional atomic crystal material layer, the two-dimensional atomic crystal material is high-temperature resistant, the heat conductivity coefficient is slightly lower than that of the graphite plate, the heat conductivity is poorer, and the heat transferred to the edge area of the epitaxial wafer can be reduced. Therefore, the growth temperature of the central area of the epitaxial wafer is slightly higher than that of the edge area, so that the release of the internal stress of the epitaxial wafer to the edge area is facilitated, the generation of cracks of the epitaxial wafer is reduced, the crystal quality is improved, and the device performance is improved.
In the disclosed embodiment, the centers of the plurality of grooves 10a may be uniformly distributed on at least one circle centered on the center of the graphite disk.
For example, in fig. 1, the centers of 4 grooves 10a are connected to form an inner circular ring with the center of the graphite disk 10 as the center, and the centers of 8 grooves 10a are connected to form an outer circular ring with the center of the graphite disk 10 as the center. It should be noted that, in fig. 1, only two rings, i.e., an inner ring and an outer ring, are taken as examples, and in practical application, one ring, three rings, four rings, etc. may also be used.
In practical applications, the size of the opening of the groove 10a can be set according to the size of the substrate, and the number of the grooves 10a can be selected by combining the size of the opening of the groove 10a and the size of the graphite disk 10.
Optionally, the annular isolation layer 20 is a graphene layer, a silylene layer, a germanylene layer, or a hexagonal boron nitride layer.
In the disclosed embodiments, graphene, silylene, germanene, and hexagonal boron nitride are all two-dimensional atomic crystal materials. The thermal conductivity coefficients of the graphene, the silylene, the germanium alkene and the hexagonal boron nitride are different, and materials with proper thermal conductivity coefficients can be selected as the annular isolation layer as required in actual use.
Optionally, as shown in FIG. 2, the thickness H of the annular isolation layer 20 is 1-100 um.
In the embodiment of the present disclosure, the thickness H of the annular isolation layer 20 is a thickness in the axial direction of the graphite substrate 100.
If the thickness of the annular isolation layer 20 is too thin, the effect of reducing the occurrence of cracks in the epitaxial wafer cannot be obtained. If the thickness of the annular isolation layer 20 is too thick, the cost is increased, and waste is caused.
Alternatively, the annular isolation layer 20 is located on the groove bottom surface of the groove 10 a. The bottom surface of the groove 10a can be used as a support surface to support the annular isolation layer 20, so as to ensure the stability of the annular isolation layer 20.
FIG. 3 is a view taken along the direction A of FIG. 2. As shown in FIG. 3, the width d of the annular spacer 20 is 0.1 to 2 mm.
In the embodiment of the present disclosure, the width D of the annular isolation layer 20 is half of the difference between the outer diameter D1 and the inner diameter D2 of the annular isolation layer 20, i.e., D is (D1-D2)/2.
If the width d of the annular isolation layer 20 is too wide, the growth temperature of the central region of the epitaxial wafer cannot be slightly higher than that of the edge region, so that a better stress release effect is achieved. If the width d of the annular isolation layer 20 is too narrow, the effect of reducing the occurrence of cracks in the epitaxial wafer cannot be achieved.
Optionally, the outer diameter of the annular isolation layer 20 matches the inner diameter of the groove 10 a.
That is, in the embodiment of the present disclosure, the outer diameter of the annular isolation layer 20 is equal to the inner diameter of the groove 10 a. As shown in fig. 3, when the distance L from the outer wall of the annular separation layer 20 to the groove 10a is 0, the annular separation layer 20 is prevented from wobbling in the groove 10a during the high-speed rotation of the graphite substrate.
Alternatively, the graphite disk 10 is made of a graphite substrate and the surface of the graphite disk 10 is coated with a silicon carbide coating. Wherein each face of the plurality of grooves 10a on the graphite disk 10 is also coated with a silicon carbide coating.
The disclosed embodiments also provide a method for manufacturing a graphite substrate, which is used for manufacturing the graphite substrate as shown in fig. 1 to 3.
Fig. 4 is a flowchart of a method for manufacturing a graphite substrate according to an embodiment of the disclosure, and as shown in fig. 4, the method includes:
step 401, providing a graphite plate.
The graphite plate is a circular disc, and a plurality of grooves for accommodating epitaxial wafers are formed in the surface of the graphite plate.
And 402, depositing an isolation layer in each groove, wherein the isolation layer is a two-dimensional atomic crystal material layer.
Optionally, step 402 may include:
and depositing a graphene layer, a silylene layer, a germanium-alkene layer or a hexagonal boron nitride layer in the groove of the graphite disc by adopting a chemical vapor deposition mode.
In the disclosed embodiments, graphene, silylene, germanene, and hexagonal boron nitride are all two-dimensional atomic crystal materials. The thermal conductivity coefficients of the graphene, the silylene, the germanium alkene and the hexagonal boron nitride are different, and materials with proper thermal conductivity coefficients can be selected as the annular isolation layer as required in actual use.
And 403, removing part of the isolation layer to make the isolation layer in each groove annular so as to form an annular isolation layer.
Alternatively, a laser lift-off process may be used to lift-off and remove portions of the isolation layer.
Optionally, the thickness of the annular isolation layer is 1-100 um.
If the thickness of the annular isolation layer is too thin, the effect of reducing the generation of cracks in the epitaxial wafer cannot be achieved well. If the thickness of the annular isolation layer is too thick, the cost is increased, and waste is caused.
Optionally, an annular isolation layer is located on the trench bottom surface of the recess. The groove bottom surface of the groove can be used as a supporting surface to support the annular isolation layer so as to ensure the stability of the annular isolation layer.
Optionally, the width of the annular isolation layer is 0.1-2 mm.
If the width of the annular isolation layer is too wide, the growth temperature of the central area of the epitaxial wafer cannot be slightly higher than that of the edge area, so that a better stress release effect is achieved. If the width of the annular isolation layer is too narrow, the effect of reducing the generation of cracks on the epitaxial wafer cannot be achieved.
Optionally, the outer diameter of the annular isolation layer matches the inner diameter of the groove.
That is, in the embodiment of the present disclosure, the outer diameter of the annular isolation layer is equal to the inner diameter of the groove, so that the annular isolation layer is prevented from shaking in the groove during the high-speed rotation of the graphite substrate.
According to the embodiment of the disclosure, the annular isolating layers are respectively arranged in the grooves of the graphite plate, and the annular isolating layers can be used for supporting the epitaxial wafer. In the process of epitaxial growth by adopting the graphite substrate, the edge area of the epitaxial wafer is in contact with the annular isolation layer, and the central area is suspended, so that the epitaxial wafer can be prevented from being in direct contact with the graphite substrate, the heating of each part of the epitaxial wafer is reduced, the condition of uneven heating is reduced, and the wavelength uniformity of the epitaxial wafer is improved. Meanwhile, the annular isolation layer is a two-dimensional atomic crystal material layer, the two-dimensional atomic crystal material is high-temperature resistant, the heat conductivity coefficient is slightly lower than that of the graphite plate, the heat conductivity is poorer, and the heat transferred to the edge area of the epitaxial wafer can be reduced. Therefore, the growth temperature of the central area of the epitaxial wafer is slightly higher than that of the edge area, so that the release of the internal stress of the epitaxial wafer to the edge area is facilitated, the generation of cracks of the epitaxial wafer is reduced, the crystal quality is improved, and the device performance is improved.
The embodiment of the present disclosure also provides a method for manufacturing an epitaxial wafer of a light emitting diode, which manufactures the epitaxial wafer of the light emitting diode on the graphite substrate manufactured by the manufacturing method as shown in fig. 4.
Fig. 5 is a flowchart of a method for manufacturing a graphite substrate according to an embodiment of the disclosure, and as shown in fig. 5, the method includes:
step 501, a graphite substrate is provided.
Alternatively, the method for manufacturing the graphite substrate in step 501 may be the same as the method for manufacturing the graphite substrate described in fig. 4, and will not be described in detail here.
Step 502, growing an epitaxial wafer of the light emitting diode on the annular isolation layer in the graphite substrate.
According to the embodiment of the disclosure, the annular isolating layers are respectively arranged in the grooves of the graphite plate, and the annular isolating layers can be used for supporting the epitaxial wafer. In the process of epitaxial growth by adopting the graphite substrate, the edge area of the epitaxial wafer is in contact with the annular isolation layer, and the central area is suspended, so that the epitaxial wafer can be prevented from being in direct contact with the graphite substrate, the heating of each part of the epitaxial wafer is reduced, the condition of uneven heating is reduced, and the wavelength uniformity of the epitaxial wafer is improved. Meanwhile, the annular isolation layer is a two-dimensional atomic crystal material layer, the two-dimensional atomic crystal material is high-temperature resistant, the heat conductivity coefficient is slightly lower than that of the graphite plate, the heat conductivity is poorer, and the heat transferred to the edge area of the epitaxial wafer can be reduced. Therefore, the growth temperature of the central area of the epitaxial wafer is slightly higher than that of the edge area, so that the release of the internal stress of the epitaxial wafer to the edge area is facilitated, the generation of cracks of the epitaxial wafer is reduced, the crystal quality is improved, and the device performance is improved.
For better understanding of the present disclosure, an ultraviolet light emitting diode epitaxial wafer and a method for manufacturing the ultraviolet light emitting diode epitaxial wafer grown according to the embodiments of the present disclosure are briefly described below.
Fig. 6 is a schematic structural diagram of an ultraviolet light emitting diode epitaxial wafer provided by an embodiment of the present disclosure, and as shown in fig. 6, the ultraviolet light emitting diode epitaxial wafer includes a substrate 61, an AlN module 62, an N-type layer 63, an active layer 64, an electron blocking layer 65, a P-type layer 66, and a P-type contact layer 67.
The substrate 61 may be a flat substrate, among others. Such as a sapphire substrate, a silicon wafer, or a silicon carbide substrate.
Alternatively, the AlN module 62 includes a first AlN sub-layer 621 and a second AlN sub-layer 622, which are sequentially stacked. The first AlN sub-layer 621 is deposited by Physical Vapor Deposition (PVD) in a low-temperature and low-pressure environment. The second AlN sub-layer 622 is grown by a Metal Organic Chemical Vapor Deposition (MOCVD) method in a high-temperature, high-pressure environment.
Illustratively, the thickness of the first AlN sub-layer 621 is 10-100 nm, and the thickness of the second AlN sub-layer 622 is 2-3 um.
Because the existing ultraviolet light emitting diode epitaxial growth technology is not mature enough, the material for growing the high-performance ultraviolet light emitting diode is difficult to prepare, the P layer doping difficulty is high, the luminous efficiency of a luminous region is low, and the like, so that the luminous efficiency of an ultraviolet light emitting diode chip is low, the preparation cost is high, the difficulty is high, and the yield is low. In order to improve the light emitting efficiency of the AlGaN-based deep ultraviolet light emitting diode, how to improve the crystal quality of the AlGaN material is one of important researches. Because of the shortage of the homogeneous substrate, the group III nitride material is usually heteroepitaxially grown on the sapphire substrate, and in order to reduce the dislocation density of the AlGaN material and improve the crystal quality of the AlGaN material, a layer of binary AlN material needs to be grown on the substrate before the AlGaN material is grown. The binary AlN material does not have the problem of component segregation in the ternary AlGaN material, and the AlN material grown at high temperature has better crystal quality. Therefore, the crystal quality of the AlGaN material can be effectively improved by forming the AlN module on the substrate, so that the luminous efficiency of the ultraviolet light-emitting diode is ensured.
Optionally, the N-type layer 63 is an AlGaN layer doped with silane, and the thickness of the N-type layer 63 is 700 nm.
Optionally, the active layer 64 includes 5 quantum well layers and quantum barrier layers alternately grown in 5 periods, wherein the quantum well layers are AlxGa1-xN/AlyGa1-yN(x<y) layer, quantum barrier layer is AlyGa1-yAnd N layers.
Illustratively, the quantum well layer is 3nm thick and the quantum barrier layer is 11nm thick.
Optionally, the electron blocking layer 65 is a p-type AlGaN layer doped with Mg and having a thickness of 10 nm.
Optionally, the P-type layer 66 is a P-type AlGaN layer doped with Mg and having a thickness of 25 nm.
Optionally, the P-type contact layer 67 is Mg doped P-type AlGaN with a thickness of 50 nm.
Fig. 7 is a flowchart of a manufacturing method of an ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present disclosure, and as shown in fig. 7, the manufacturing method includes:
step 701, providing a substrate.
Alternatively, the substrate may be a flat sheet substrate, such as a sapphire substrate, a silicon wafer, or a silicon carbide substrate.
Step 702 forms an AlN module on a substrate.
The AlN module comprises a first AlN sub-layer and a second AlN sub-layer which are sequentially stacked. The first AlN sublayer is deposited by adopting a PVD method in a low-temperature and low-pressure environment. The second AlN sub-layer is grown by adopting an MOCVD method under the environment of high temperature and high pressure.
Optionally, the thickness of the first AlN sub-layer is 10-100 nm, and the thickness of the second AlN sub-layer is 2-3 um.
Illustratively, step 702 may include:
the first step is to place the substrate in a PVD apparatus to grow a first AlN sublayer. The chamber temperature of the PVD equipment was 600 ℃. The pressure is 7mTorr, the sputtering power is 4000W, the flow rates of the introduced nitrogen and argon are 150sccm and 80sccm respectively, and the growth time is 50 s.
And secondly, placing the first AlN sub-layer into MOCVD equipment, and growing a second AlN sub-layer on the first AlN sub-layer. The reaction chamber temperature of the MOCVD apparatus was 1300 ℃ and the pressure was 50 mbar. Ammonia gas and trimethylaluminum are introduced as reactants, the molar ratio of V/III is 350, and the growth time is 5000 s.
In this embodiment, Veeco K465i o may be adoptedr C4 or RB MOCVD equipment realizes the manufacturing method of the epitaxial wafer. By using high-purity H2(Hydrogen) or high purity N2(Nitrogen) or high purity H2And high purity N2The mixed gas of (2) is used as a carrier gas, high-purity NH3As the nitrogen source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) as gallium sources, trimethyl indium (TMIn) as indium source, silane (SiH4) as N-type dopant, i.e., Si source, trimethyl aluminum (TMAl) as aluminum source, and magnesium diclocide (CP)2Mg) as a P-type dopant, i.e., a Mg source. Controlling temperature and pressure refers to controlling temperature and pressure in a reaction chamber for growing epitaxial wafers,
illustratively, the temperature of the reaction chamber is controlled to be 950-1100 ℃, the pressure is controlled to be 100-300 torr (preferably 200torr), and the buffer layer is grown on the substrate.
And 703, growing an N-type layer on the AlN module.
The N-type layer is an AlGaN layer doped with silane, and the thickness of the N-type layer is 700 nm.
Illustratively, step 703 may include:
and controlling the temperature of the reaction chamber to 1060 ℃ and the pressure to be 100mbar, and growing a silane-doped n-type AlGaN layer with the thickness of 700 nm.
Step 704, an active layer is grown on the N-type layer.
Optionally, the active layer includes 5 quantum well layers and quantum barrier layers alternately grown in cycles, where the quantum well layer is AlxGa1-xN/AlyGa1-yN(x<y) layer, quantum barrier layer is AlyGa1-yAnd N layers.
Illustratively, the quantum well layer is 3nm thick and the quantum barrier layer is 11nm thick.
Optionally, step 704 may include:
the temperature of the reaction chamber is controlled at 1040 ℃, the pressure is controlled at 150mbar, and the active layer is grown on the N-type layer.
Step 705, an electron blocking layer is grown on the active layer.
The electron blocking layer is a p-type AlGaN layer doped with Mg, and the thickness of the electron blocking layer is 10 nm.
Illustratively, step 605 may include:
controlling the temperature of the reaction chamber to be 980 ℃ and the pressure to be 150mbar, and growing an electron blocking layer with the thickness of 10nm on the active layer.
Step 706, a P-type layer is grown on the electron blocking layer.
Wherein, the P type layer is a P type AlGaN layer doped with Mg, and the thickness is 25 nm.
Illustratively, step 606 may include:
controlling the temperature of the reaction chamber at 900 ℃ and the pressure at 200mbar, and growing a P-type layer with the thickness of 25nm on the electron blocking layer.
Step 707, grow a P-type contact layer on the P-type layer.
Wherein the P-type contact layer is Mg-doped P-type AlGaN and has a thickness of 50 nm.
Illustratively, step 707 may include:
controlling the temperature of the reaction chamber at 850 ℃ and the pressure at 300mbar, and growing a P-type contact layer with the thickness of 50nm on the P-type layer.
After the completion of the epitaxial growth, the temperature is first lowered to 650 to 850 ℃, the epitaxial wafer is annealed in a nitrogen atmosphere for 30 minutes, and then the temperature of the epitaxial wafer is lowered to room temperature.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," "third," and similar terms in the description and claims does not indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprise" or "comprises", and the like, means that the element or item listed before "comprises" or "comprising" covers the element or item listed after "comprising" or "comprises" and its equivalents, and does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", "top", "bottom", and the like are used merely to indicate relative positional relationships, which may also change accordingly when the absolute position of the object being described changes.
Although the present disclosure has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure.

Claims (10)

1. The utility model provides a graphite substrate, its characterized in that, graphite substrate includes graphite dish and a plurality of cyclic annular isolation layer, the graphite dish is the disc, the surface of graphite dish has a plurality of recesses that are used for holding the epitaxial wafer, every all have in the recess and be used for supporting the epitaxial wafer cyclic annular isolation layer, cyclic annular isolation layer is two-dimensional atomic crystal material layer.
2. The graphite substrate according to claim 1, wherein the annular spacer layer is a graphene layer, a silylene layer, a germanylene layer, or a hexagonal boron nitride layer.
3. The graphite substrate according to claim 1, wherein the width of the annular spacer layer is 0.1 to 2 mm.
4. The graphite substrate according to claim 1, wherein the thickness of the annular isolation layer is 1-100 um.
5. The graphite substrate according to claim 1, wherein the annular isolation layer is located on a groove bottom surface of the groove.
6. The graphite substrate according to claim 5, wherein an outer diameter of the annular isolation layer matches an inner diameter of the groove.
7. A method for manufacturing a graphite substrate, comprising:
providing a graphite disc, wherein the graphite disc is a circular disc, and the surface of the graphite disc is provided with a plurality of grooves for accommodating epitaxial wafers;
depositing an isolation layer in each groove, wherein the isolation layer is a two-dimensional atomic crystal material layer;
and removing part of the isolation layer to enable the isolation layer in each groove to be annular so as to form an annular isolation layer.
8. The method of manufacturing of claim 7, wherein depositing an isolation layer in each of the recesses comprises:
and depositing a graphene layer, a silylene layer, a germanium-alkene layer or a hexagonal boron nitride layer in the groove of the graphite disc by adopting a chemical vapor deposition mode.
9. The method of manufacturing according to claim 7, wherein a laser lift-off process is used to lift off and remove a portion of the isolation layer.
10. A manufacturing method of a light emitting diode epitaxial wafer is characterized by comprising the following steps:
manufacturing a graphite substrate by the manufacturing method according to any one of claims 7 to 9;
and growing a light-emitting diode epitaxial wafer on the annular isolating layer in the graphite substrate.
CN202111159047.9A 2021-09-30 2021-09-30 Graphite substrate, and method for manufacturing graphite substrate and light emitting diode epitaxial wafer Pending CN114108080A (en)

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CN208038589U (en) * 2018-01-22 2018-11-02 淮安澳洋顺昌光电技术有限公司 A kind of graphite plate promoting epitaxial wafer outer ring brightness
CN108987328A (en) * 2018-05-31 2018-12-11 华灿光电（浙江）有限公司 The graphite base of epitaxial growth and the method for monitoring epitaxial growth using graphite base
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CN203367345U (en) * 2013-06-21 2013-12-25 上海东洋炭素有限公司 Graphite base
CN208038589U (en) * 2018-01-22 2018-11-02 淮安澳洋顺昌光电技术有限公司 A kind of graphite plate promoting epitaxial wafer outer ring brightness
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CN117089926B (en) * 2023-10-20 2024-01-16 杭州海乾半导体有限公司 Carrier for improving uniformity of silicon carbide epitaxial wafer and use method thereof

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