CN113964182A - Heterogeneous PN low-turn-on voltage gallium oxide power diode and preparation method thereof - Google Patents
Heterogeneous PN low-turn-on voltage gallium oxide power diode and preparation method thereof Download PDFInfo
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- CN113964182A CN113964182A CN202111070356.9A CN202111070356A CN113964182A CN 113964182 A CN113964182 A CN 113964182A CN 202111070356 A CN202111070356 A CN 202111070356A CN 113964182 A CN113964182 A CN 113964182A
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- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 title claims abstract description 39
- 229910001195 gallium oxide Inorganic materials 0.000 title claims abstract description 38
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 42
- 229910052751 metal Inorganic materials 0.000 claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 39
- QZQVBEXLDFYHSR-UHFFFAOYSA-N gallium(III) oxide Inorganic materials O=[Ga]O[Ga]=O QZQVBEXLDFYHSR-UHFFFAOYSA-N 0.000 claims abstract description 20
- 239000000463 material Substances 0.000 claims abstract description 14
- 229910052718 tin Inorganic materials 0.000 claims abstract description 8
- 238000005530 etching Methods 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 13
- 238000004151 rapid thermal annealing Methods 0.000 claims description 10
- 238000000151 deposition Methods 0.000 claims description 7
- 238000003475 lamination Methods 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 description 24
- 238000000137 annealing Methods 0.000 description 11
- 238000004544 sputter deposition Methods 0.000 description 9
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 description 5
- 229910007271 Si2O3 Inorganic materials 0.000 description 3
- 238000005275 alloying Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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Abstract
The invention relates to a heterogeneous PN low-starting voltage gallium oxide power diode and a preparation method thereof, wherein the heterogeneous PN low-starting voltage gallium oxide power diode comprises the following components: the cathode, the substrate layer, the drift layer and the anode are sequentially stacked from bottom to top, wherein a plurality of grooves are formed in the upper surface of the drift layer at intervals, dielectric layers are filled in the grooves, and the dielectric layers and the drift layer form a heterogeneous PN junction structure; ohmic contact is formed between the anode and the drift layer; the substrate layer and the drift layer are both Si or Sn doped beta-Ga2O3Material, and the drift layer has a lower doping concentration than the linerThe doping concentration of the bottom layer. The heterogeneous PN low-turn-on voltage gallium oxide power diode of the invention passes through the P-type NiO medium layer and the Ga2O3The drift layer forms a heterogeneous PN junction structure to control the turn-off of the device, and Ti/Au metal and Ga are adopted2O3And ohmic contact is formed above the drift layer to reduce the turn-on voltage of the device during conduction so as to realize the power diode with low turn-on voltage.
Description
Technical Field
The invention belongs to the technical field of semiconductor devices, and particularly relates to a heterogeneous PN low-turn-on-voltage gallium oxide power diode and a preparation method thereof.
Background
Due to beta-Ga2O3The crystal material has ultra-wide forbidden band width and higher breakdown field strength, so that the beta-Ga2O3The method has the potential of manufacturing high-voltage-resistance, high-power and low-loss power devices, and can be applied to the field of high voltage and high power. In recent years, numerous scholars have begun to work on β -Ga2O3However, the turn-on voltage of the existing gallium oxide power diode is still kept above 0.8V, and the turn-on voltage is high, which causes the device to generate high power loss.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a heterogeneous PN low-turn-on voltage gallium oxide power diode and a preparation method thereof. The technical problem to be solved by the invention is realized by the following technical scheme:
the invention provides a heterogeneous PN low-starting voltage gallium oxide power diode, which comprises: a cathode, a substrate layer, a drift layer and an anode which are sequentially stacked from bottom to top, wherein,
a plurality of grooves are formed in the upper surface of the drift layer at intervals, medium layers are filled in the grooves, and the medium layers and the drift layer form a heterogeneous PN junction structure;
ohmic contact is formed between the anode and the drift layer;
the substrate layer and the drift layer are both Si or Sn doped beta-Ga2O3And the doping concentration of the drift layer is lower than that of the substrate layer.
In one embodiment of the invention, the doping concentration of the drift layer is 1 × 1015cm-3-1×1017cm-3。
In one embodiment of the invention, the drift layer has a thickness of 2-14 μm.
In one embodiment of the invention, the depth of the groove is 50-1500 nm.
In one embodiment of the invention, the distance between adjacent grooves is 50-500 nm.
In an embodiment of the invention, the material of the dielectric layer is a P-type NiO material.
In one embodiment of the invention, the anode is a Ti/Au metal stack, wherein Ti forms an ohmic contact with the gallium oxide.
The invention provides a preparation method of a heterogeneous PN low-starting voltage gallium oxide power diode, which comprises the following steps:
s1: selecting a substrate layer, and preparing a drift layer on the upper surface of the substrate layer;
s2: preparing a cathode on the lower surface of the substrate layer;
s3: etching to form a plurality of grooves arranged at intervals on the drift layer;
s4: depositing P-type NiO in the groove to form a dielectric layer;
s5: preparing a Ti/Au metal lamination layer on the upper surfaces of the drift layer and the dielectric layer;
s6: placing the device at N2Carrying out rapid thermal annealing in the atmosphere to form an anode;
wherein the substrate layer and the drift layer are both Si or Sn doped beta-Ga2O3Material, and doping concentration of the drift layerThe doping concentration of the substrate layer is lower than that of the substrate layer, the dielectric layer and the drift layer form a heterogeneous PN junction structure, and ohmic contact is formed between the anode and the drift layer.
In one embodiment of the invention, the thickness of the drift layer is 2-14 μm, and the doping concentration is 1 × 1015cm-3-1×1017cm-3。
In one embodiment of the invention, the depth of the grooves is 50-1500nm, and the distance between adjacent grooves is 50-500 nm.
Compared with the prior art, the invention has the beneficial effects that:
1. the heterogeneous PN low-turn-on voltage gallium oxide power diode of the invention passes through the P-type NiO medium layer and the Ga2O3The drift layer forms a heterogeneous PN junction structure to control the turn-off of the device, and Ti/Au metal and Ga are adopted2O3Ohmic contact is formed above the drift layer to reduce the turn-on voltage when the device is conducted so as to realize a power diode with low turn-on voltage;
2. the preparation method of the heterogeneous PN low-starting-voltage gallium oxide power diode has simple and easily realized manufacturing process and can effectively control the manufacturing cost.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented in accordance with the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more clearly understood, the following preferred embodiments are described in detail with reference to the accompanying drawings.
Drawings
Fig. 1 is a schematic structural diagram of a heterogeneous PN low-turn-on voltage gallium oxide power diode according to an embodiment of the present invention;
fig. 2 is a flowchart of a method for manufacturing a heterogeneous PN low-turn-on voltage gallium oxide power diode according to an embodiment of the present invention;
fig. 3 a-3 e are flow charts of processes for fabricating a heterogeneous PN low turn-on voltage gallium oxide power diode according to embodiments of the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention for achieving the predetermined objects, the following detailed description will be made on a heterogeneous PN low-turn-on voltage gallium oxide power diode and a method for manufacturing the same according to the present invention with reference to the accompanying drawings and the detailed description.
The foregoing and other technical matters, features and effects of the present invention will be apparent from the following detailed description of the embodiments, which is to be read in connection with the accompanying drawings. The technical means and effects of the present invention adopted to achieve the predetermined purpose can be more deeply and specifically understood through the description of the specific embodiments, however, the attached drawings are provided for reference and description only and are not used for limiting the technical scheme of the present invention.
Example one
Referring to fig. 1, fig. 1 is a schematic structural diagram of a heterogeneous PN low-turn-on-voltage gallium oxide power diode according to an embodiment of the present invention, and as shown in the figure, the heterogeneous PN low-turn-on-voltage gallium oxide power diode according to the embodiment of the present invention includes a cathode 1, a substrate layer 2, a drift layer 3, and an anode 4, which are sequentially stacked from bottom to top, wherein a plurality of grooves 301 are formed at intervals on an upper surface of the drift layer 3, a dielectric layer 5 is filled in the grooves 301, and the dielectric layer 5 and the drift layer 3 form a heterogeneous PN junction structure; ohmic contact is formed between the anode 4 and the drift layer 3; the substrate layer 2 and the drift layer 3 are both Si or Sn doped beta-Ga2O3Material and the doping concentration of the drift layer 3 is lower than the doping concentration of the substrate layer 2.
In this embodiment, the doping concentration of the drift layer 3 is 1 × 1015cm-3-1×1017cm-3The thickness is 2-14 μm.
In this embodiment, the depth of the grooves 301 is 50-1500nm, and the distance between adjacent grooves 301 is 50-500nm, so that the depletion region of the PN junction pinches off the channel.
In the present embodiment, the material of the dielectric layer 5 is a P-type NiO material, specifically, the P-type NiO dielectric and its lower and side doped β -Ga2O3The material forms a heterogeneous PN junction structure to control the turn-off of the device.
In this embodiment, the cathode 1 is a Ti/Au metal stack.
In this embodiment, the anode 4 is a Ti/Au metal lamination, where Ti and gallium oxide form an ohmic contact, and when a forward voltage is applied, the ohmic contact can be quickly turned on, so as to effectively reduce the turn-on voltage of the device during turn-on, thereby implementing a low-turn-on voltage gallium oxide power diode.
The heterogeneous PN low-turn-on voltage gallium oxide power diode of the embodiment passes through the P-type NiO medium layer and the Ga2O3The drift layer forms a heterogeneous PN junction structure to control the turn-off of the device, and Ti/Au metal and Ga are adopted2O3Ohmic contact is formed above the drift layer, and the starting voltage of the device during conduction is reduced, so that the power diode with low starting voltage is realized.
Example two
The present embodiment provides a method for manufacturing a heterogeneous PN low-turn-on voltage gallium oxide power diode, please refer to fig. 2, where fig. 2 is a flowchart of a method for manufacturing a heterogeneous PN low-turn-on voltage gallium oxide power diode according to an embodiment of the present invention, and as shown in the figure, the method includes:
s1: selecting a substrate layer, and preparing a drift layer on the upper surface of the substrate layer;
in the present embodiment, heavily doped β -Ga of Si or Sn is optionally selected2O3As a substrate layer, heavily doped beta-Ga in Si or Sn by HVPE (Hydride Vapor Phase Epitaxy) process2O3Growing a layer of Si or Sn lightly doped beta-Ga on the substrate2O3As a drift layer, the doping concentration of the drift layer is lower than that of the substrate layer.
Optionally, the drift layer has a thickness of 2-14 μm and a doping concentration of 1 × 1015cm-3-1×1017cm-3。
Optionally, the substrate layer has a doping concentration of 5 × 1018cm-3-5×1019cm-3。
S2: preparing a cathode on the lower surface of the substrate layer;
in particular, under the substrate layerDepositing Ti/Au metal lamination on the surface, and then depositing N2And rapidly annealing in the atmosphere to form the cathode, wherein the annealing temperature is 400-600 ℃.
S3: etching to form a plurality of grooves arranged at intervals on the drift layer;
in this embodiment, an ICP plasma etcher is used to etch and form a plurality of grooves arranged at intervals on the drift layer.
Optionally, the etching depth of the grooves is 50-1500nm, and the distance between adjacent grooves is 50-500 nm.
S4: depositing P-type NiO in the groove to form a dielectric layer;
in this example, the P-type NiO dielectric layer and its underlying and lateral doped beta-Ga are2O3The material forms a heterogeneous PN junction structure to control the turn-off of the device.
S5: preparing a Ti/Au metal lamination layer on the upper surfaces of the drift layer and the dielectric layer;
in this embodiment, the thickness of the Ti/Au metal stacks is optionally 20/200nm, respectively.
S6: placing the device at N2Carrying out rapid thermal annealing in the atmosphere to form an anode;
specifically, the device is placed in an annealing furnace at N2And performing rapid thermal annealing in the atmosphere to finish the manufacture of the anode electrode, wherein the annealing temperature is 400-600 ℃, and the annealing time is 30 s.
Metal Ti and Ga2O3The drift layer forms ohmic contact, and when forward voltage is applied, the ohmic contact can be quickly conducted, so that the starting voltage of the device during conduction can be effectively reduced.
The preparation method of the heterogeneous PN low-starting-voltage gallium oxide power diode has the advantages of simple manufacturing process and easy realization, and can effectively control the manufacturing cost.
EXAMPLE III
Referring to fig. 3 a-3 e, which are flow charts of a manufacturing process of a heterogeneous PN low-turn-on voltage gallium oxide power diode according to an embodiment of the present invention, the embodiment specifically describes a manufacturing method of a heterogeneous PN low-turn-on voltage gallium oxide power diode according to a second embodiment.
1. Preparing gallium oxide power diode with drift layer thickness of 2 mu m
Selecting Si heavily doped beta-Ga2O3As a substrate layer, the doping concentration is 5 × 1018cm-3Heavily doped beta-Ga in Si2O3Epitaxially growing a layer of Si lightly doped beta-Ga by HVPE process2O3The layer is used as a drift layer, wherein the thickness of the drift layer is 2 μm, and the doping concentration of the drift layer is 1 × 1015cm-3As shown in fig. 3 a.
And 2, manufacturing a cathode electrode.
2.1) sputtering cathode metal by a Sputter device under the substrate layer, wherein the metal is Ti/Au in sequence and the thickness of the metal is 20/200 nm;
2.2) N at 400 ℃ with annealing furnace2And (5) performing rapid thermal annealing for 30 seconds in the atmosphere, and alloying the cathode metal to finish the manufacture of the cathode electrode, as shown in fig. 3 b.
And 3, etching the groove structure to form a P-type NiO medium layer in the groove structure.
3.1) etching the drift layer by using an ICP plasma etcher to form a plurality of spaced groove structures, wherein the etching depth of the grooves is 50nm, and the distance between every two adjacent groove structures is 50nm, as shown in figure 3 c;
and 3.2) sputtering and depositing P-type NiO with the thickness of 50nm in the groove structure by utilizing a sprayer device to form a dielectric layer, as shown in FIG. 3 d.
And 4, manufacturing an anode electrode.
4.1) sputtering anode metal on the upper surfaces of the drift layer and the metal layer by using a Sputter device, wherein the metal is sequentially Ti/Au, and the thicknesses of the metal are 20/200nm respectively;
4.2) N at 400 ℃ with annealing furnace2Performing rapid thermal annealing for 30s in the atmosphere to complete the manufacture of the anode electrode, wherein the metals Ti and Ga2O3The drift layer forms an ohmic contact as shown in figure 3 e.
2. Gallium oxide power diode with drift layer thickness of 8 mu m is prepared
Selecting Si heavily doped beta-Ga2O3As a substrate layer, heavily doped beta-Ga in Si2O3Epitaxially growing a layer of Si lightly doped beta-Ga by HVPE process2O3The layer is used as a drift layer, wherein the thickness of the drift layer is 8 μm, and the doping concentration of the drift layer is 1 × 1016cm-3As shown in fig. 3 a.
And 2, manufacturing a cathode electrode.
2.1) sputtering cathode metal by a Sputter device under the substrate layer, wherein the metal is Ti/Au in sequence and the thickness of the metal is 20/200 nm;
2.2) N at 500 ℃ with an annealing furnace2And (5) performing rapid thermal annealing for 30 seconds in the atmosphere, and alloying the cathode metal to finish the manufacture of the cathode electrode, as shown in fig. 3 b.
And 3, etching the groove structure to form a P-type NiO medium layer in the groove structure.
3.1) etching the drift layer by using an ICP plasma etcher to form a plurality of spaced groove structures, wherein the etching depth of the grooves is 1000nm, and the distance between every two adjacent groove structures is 200nm, as shown in figure 3 c;
and 3.2) sputtering and depositing P-type NiO with the thickness of 1000nm in the groove structure by utilizing a sprayer device to form a dielectric layer, as shown in FIG. 3 d.
And 4, manufacturing an anode electrode.
4.1) sputtering anode metal on the upper surfaces of the drift layer and the metal layer by using a Sputter device, wherein the metal is sequentially Ti/Au, and the thicknesses of the metal are 20/200nm respectively;
4.2) N at 400 ℃ with annealing furnace2Performing rapid thermal annealing for 30s in the atmosphere to complete the manufacture of the anode electrode, wherein the metals Ti and Ga2O3The drift layer forms an ohmic contact as shown in figure 3 e.
3. Preparing gallium oxide power diode with drift layer thickness of 14 μm
Selecting Si heavily doped beta-Ga2O3As a substrate layer, heavily doped beta-Ga in Si2O3Epitaxially growing a layer of Si lightly doped beta-Ga by HVPE process2O3The layer is used as a drift layer, wherein the thickness of the drift layer is 14 μm, and the doping concentration of the drift layer is 1 × 1017cm-3As shown in fig. 3 a.
And 2, manufacturing a cathode electrode.
2.1) sputtering cathode metal by a Sputter device under the substrate layer, wherein the metal is Ti/Au in sequence and the thickness of the metal is 20/200 nm;
2.2) N at 600 ℃ with an annealing furnace2And (5) performing rapid thermal annealing for 30 seconds in the atmosphere, and alloying the cathode metal to finish the manufacture of the cathode electrode, as shown in fig. 3 b.
And 3, etching the groove structure to form a P-type NiO medium layer in the groove structure.
3.1) etching the drift layer by using an ICP plasma etcher to form a plurality of spaced groove structures, wherein the etching depth of the grooves is 1500nm, and the distance between every two adjacent groove structures is 500nm, as shown in figure 3 c;
and 3.2) sputtering and depositing P-type NiO with the thickness of 1500nm in the groove structure by utilizing a sprayer device to form a dielectric layer, as shown in FIG. 3 d.
And 4, manufacturing an anode electrode.
4.1) sputtering anode metal on the upper surfaces of the drift layer and the metal layer by using a Sputter device, wherein the metal is sequentially Ti/Au, and the thicknesses of the metal are 20/200nm respectively;
4.2) N at 400 ℃ with annealing furnace2Performing rapid thermal annealing for 30s in the atmosphere to complete the manufacture of the anode electrode, wherein the metals Ti and Ga2O3The drift layer forms an ohmic contact as shown in figure 3 e.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of additional like elements in the article or device comprising the element. The directional or positional relationships indicated by "upper", "lower", "left", "right", etc., are based on the directional or positional relationships shown in the drawings, and are only for convenience of describing the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
1. A heterogeneous PN low turn-on voltage gallium oxide power diode, comprising: a cathode (1), a substrate layer (2), a drift layer (3) and an anode (4) which are sequentially stacked from bottom to top, wherein,
a plurality of grooves (301) are formed in the upper surface of the drift layer (3) at intervals, dielectric layers (5) are filled in the grooves (301), and the dielectric layers (5) and the drift layer (3) form a heterogeneous PN junction structure;
ohmic contact is formed between the anode (4) and the drift layer (3);
the substrate layer (2) and the drift layer (3) are both Si-or Sn-doped beta-Ga2O3A material, and the doping concentration of the drift layer (3) is lower than the doping concentration of the substrate layer (2).
2. A hetero-PN low-turn-on-voltage gallium oxide power diode according to claim 1, characterized in that the doping concentration of the drift layer (3) is 1 x 1015cm-3-1×1017cm-3。
3. A hetero-PN low-turn-on voltage gallium oxide power diode according to claim 1, characterized in that the thickness of the drift layer (3) is 2-14 μ ι η.
4. The hetero-PN low-turn-on voltage gallium oxide power diode of claim 1, wherein the depth of the recess (301) is 50-1500 nm.
5. A heterogeneous PN low turn-on voltage gallium oxide power diode according to claim 1, wherein the spacing between adjacent said grooves (301) is 50-500 nm.
6. The heterogeneous PN low turn-on voltage gallium oxide power diode of claim 1, wherein the material of the dielectric layer (5) is a P-type NiO material.
7. The hetero-PN low turn-on voltage gallium oxide power diode of claim 1, wherein the anode (4) is a Ti/Au metal stack, wherein Ti forms an ohmic contact with gallium oxide.
8. A preparation method of a heterogeneous PN low-starting voltage gallium oxide power diode is characterized by comprising the following steps:
s1: selecting a substrate layer, and preparing a drift layer on the upper surface of the substrate layer;
s2: preparing a cathode on the lower surface of the substrate layer;
s3: etching to form a plurality of grooves arranged at intervals on the drift layer;
s4: depositing P-type NiO in the groove to form a dielectric layer;
s5: preparing a Ti/Au metal lamination layer on the upper surfaces of the drift layer and the dielectric layer;
s6: placing the device at N2Carrying out rapid thermal annealing in the atmosphere to form an anode;
wherein the substrate layer and the drift layer are both Si or Sn doped beta-Ga2O3The material, and the doping concentration of drift layer is less than the doping concentration of substrate layer, the dielectric layer with the drift layer forms heterogeneous PN junction structure, form ohmic contact between positive pole and the drift layer.
9. The method of claim 8, wherein the drift layer has a thickness of 2-14 μm and a doping concentration of 1 x 1015cm-3-1×1017cm-3。
10. The method of claim 8, wherein the depth of the grooves is 50-1500nm, and the distance between adjacent grooves is 50-500 nm.
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| CN116230743A (en) * | 2022-04-09 | 2023-06-06 | 重庆理工大学 | Gallium oxide pn heterojunction diode |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116230743A (en) * | 2022-04-09 | 2023-06-06 | 重庆理工大学 | Gallium oxide pn heterojunction diode |
| CN116230743B (en) * | 2022-04-09 | 2024-02-23 | 重庆理工大学 | Gallium oxide pn heterojunction diode |
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