CN103928532A - Silicon carbide groove MOS junction barrier Schottky diode and manufacturing method thereof - Google Patents
Silicon carbide groove MOS junction barrier Schottky diode and manufacturing method thereof Download PDFInfo
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- CN103928532A CN103928532A CN201410166376.XA CN201410166376A CN103928532A CN 103928532 A CN103928532 A CN 103928532A CN 201410166376 A CN201410166376 A CN 201410166376A CN 103928532 A CN103928532 A CN 103928532A
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- schottky diode
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- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 58
- 230000004888 barrier function Effects 0.000 title claims abstract description 32
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 13
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- 238000002347 injection Methods 0.000 claims description 24
- 239000007924 injection Substances 0.000 claims description 24
- 239000000758 substrate Substances 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims description 9
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 7
- 238000001259 photo etching Methods 0.000 claims description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 6
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 claims description 6
- -1 nitrogen ion Chemical class 0.000 claims description 6
- 238000002513 implantation Methods 0.000 claims description 5
- 239000007789 gas Substances 0.000 claims description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 4
- 238000004151 rapid thermal annealing Methods 0.000 claims description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 3
- 238000000137 annealing Methods 0.000 claims description 3
- 229910052786 argon Inorganic materials 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 239000012159 carrier gas Substances 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 3
- 238000001312 dry etching Methods 0.000 claims description 3
- 238000000407 epitaxy Methods 0.000 claims description 3
- 230000008020 evaporation Effects 0.000 claims description 3
- 238000001704 evaporation Methods 0.000 claims description 3
- 239000001257 hydrogen Substances 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims description 3
- 239000012535 impurity Substances 0.000 claims description 3
- 238000005468 ion implantation Methods 0.000 claims description 3
- 238000010884 ion-beam technique Methods 0.000 claims description 3
- 150000002500 ions Chemical class 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 238000002161 passivation Methods 0.000 claims description 3
- 239000001294 propane Substances 0.000 claims description 3
- 229910000077 silane Inorganic materials 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 230000005684 electric field Effects 0.000 abstract description 5
- 230000015556 catabolic process Effects 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 4
- 239000000463 material Substances 0.000 description 12
- 238000002360 preparation method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000005855 radiation Effects 0.000 description 4
- 229910002601 GaN Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 230000004308 accommodation Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000035800 maturation Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
Abstract
The invention discloses a silicon carbide groove MOS junction barrier Schottky diode and a manufacturing method of the silicon carbide groove MOS junction barrier Schottky diode. The problems of too low breakdown voltages, too low reliability and the like caused by the serious electric field concentration effect on the edge of a device and too high leakage currents are mainly solved. The silicon carbide groove MOS junction barrier Schottky diode and the manufacturing method are characterized in that a groove MOS structure is introduced on the basis of a traditional JBS device structure, and therefore the functions of relieving electric field concentration on a P-junction edge and lowering the leakage currents are achieved.
Description
Technical field
The invention belongs to microelectronics technology, relate to semiconductor device, particularly a kind of carborundum groove MOS junction barrier schottky diode and preparation method thereof.
Background technology
Semiconductor material with wide forbidden band is the third generation semi-conducting material that the materials such as first generation silicon, germanium and second generation GaAs, indium phosphide grow up later that continues.In third generation semi-conducting material, carborundum (SiC) and gallium nitride (GaN) are outstanding persons wherein.Carbofrax material technology is ripe, existing high-quality 4 inches of wafers.And gallium nitride material does not have gallium nitride substrate, extension can only rely on other materials, and its thermal conductivity only has 1/4th of carborundum, and cannot realize p-type doping.This makes gallium nitride material be restricted in high pressure, application aspect high-power, and comparatively speaking carbofrax material is particularly remarkable in the advantage of power electronics application.
The energy gap of SiC material is approximately 3 times of silicon, and breakdown electric field is 8 times of silicon materials, and thermal conductivity is 3 times of silicon, has greatly improved withstand voltage capacity and the current density of SiC device.Because the two properties of materials difference causes the breakdown electric field of SiC material, be about 10 times of Si material, cause it under identical puncture voltage, conducting resistance only has 1/100～1/200 of Si device, has greatly reduced the conduction loss of SiC device.Higher focus rate makes at high temperature steady operation of SiC device simultaneously, reduces cooling heat radiation system, greatly improves the integrated level of circuit.Because area, the conducting resistance of device are little, and electric capacity and storage electric charge few, SiC power device can be realized high switching speed and little switching loss, so it can be operated under higher frequency.SiC material also has the ability that high anti-electromagnetic wave impacts and high radiation preventing destroys, and can be operated under extreme radiation environment.Therefore, SiC device can make power, temperature, frequency and the capability of resistance to radiation multiplication of power electronic system, the performance of efficiency, reliability, volume and weight aspect also can significantly be improved, not only in direct current, ac transmission, uninterrupted power supply, Switching Power Supply, the traditional industry fields such as Industry Control have extensive use, and also will have broad application prospects in the new forms of energy such as solar energy, wind energy.
Due to the maturation of SiC crystal growth and technique, SiC Schottky barrier diode has taken the lead in opening up markets, and has realized industrialization in recent years.But the excessive reverse leakage current of Schottky diode is still its principal element in the application of high pressure field of restriction.In order to reduce conventional schottky excessive reverse leakage current oppositely time, junction barrier schottky diode (JBS) has obtained research widely.Although have good performance at aspects such as withstand voltage and reduction reverse leakage currents, also do not reach desirable expection.And trench MOS structure has reached application in traditional Schottky barrier diode, from emulation and experiment aspect, all illustrate that it can effectively reduce the reverse leakage current of schottky junction.So the present invention combines the two, designed a kind of carborundum (SiC) groove MOS junction barrier schottky diode and manufacture method thereof, press down and further reducing the reverse leakage current of schottky junction, increase the reliability of Schottky diode.
Summary of the invention
The object of the invention is to overcome the shortcoming of above-mentioned prior art, invention has designed a kind of carborundum groove MOS junction barrier schottky diode and manufacture method thereof, mainly solve the serious and excessive puncture voltage causing of leakage current of device fringe field concentration effect too low with the problem such as reliability, be characterized in introducing trench MOS structure on traditional JBS device architecture basis, thereby reach alleviation P knot fringe field, concentrate, reduce the effect of leakage current.
For achieving the above object, the technical scheme that the present invention takes is:
A carborundum groove MOS junction barrier schottky diode, comprises Schottky contact region, P+ injection region, SiO from top to down successively
2spacer medium, trench area, N
-epitaxial loayer, N
+substrate zone and ohmic contact regions, described N
-on epitaxial loayer, be interval with P+ injection region and trench area, the spacing between described P+ injection region and trench area is 3 μ m, and described trench area inwall is deposited with SiO
2spacer medium layer, described ohmic contact regions is provided with N
+substrate zone, N
+substrate zone is provided with N
-epitaxial loayer.
Wherein, the described trench area degree of depth is 2 μ m, by dry etching, is formed.
Wherein, described trench area plan view shape is square, circle or hexagon.
Wherein, described N
-the thickness of epitaxial loayer is 10 μ m, and its nitrogen ion doping concentration is 1 * 10
15～1 * 10
16cm
-3.
Wherein, described Schottky contact region metal covers whole anode.
A manufacture method for carborundum groove MOS junction barrier schottky diode, comprises the following steps:
S1, to N
+type silicon carbide substrates sheet carries out after RCA standard cleaning, at positive epitaxial growth thickness, is that 10～30 μ m, nitrogen ion doping concentration are 1 * 10
15～1 * 10
16cm
-3n
-epitaxial loayer;
S2, at N
-epitaxial loayer forms after figure with photoetching, and the metal Ni with ion beam evaporation 200nm, by peeling off formation etching window, passes through CF
4+ O
2etching forms groove structure;
The SiO of S3, deposit 2 μ m
2as the barrier layer as P+ injection region Al Implantation, and form P+ injection region injection window by photoetching and etching; At the temperature of 400 ℃, carry out Al ion implantation three times, the dosage of injection is respectively 1.33 * 10
14cm
-2, 8.29 * 10
13cm
-2, 4.05 * 10
13cm
-2, corresponding energy is respectively 350keV, 150keV and 50keV; Adopt RCA clean standard to silicon carbide clean successively, oven dry and the protection of C film, and in 1600 ℃ of argon atmospheres, do the ion-activated annealing of 45min;
S4, epi-layer surface is carried out to dry-oxygen oxidation, 1150 ℃, 2 hours, carry out afterwards PECVD deposit 1 μ mSiO
2, form ground floor passivation layer;
S5, on substrate, after splash-proofing sputtering metal Ti/Ni10nm/200nm, by 1000 ℃ of rapid thermal annealings, 3min, Ar atmosphere, enclose, form ohmic contact regions;
S6, frontside oxide layer is windowed after, on surface, N-epitaxial region, utilize mode sputter one deck 200nmTi metal level of sputter, as Schottky contact region.
Epitaxy technique condition in described S1 is: temperature is 1580 ℃, pressure 100mbar, and reacting gas is silane and propane, and carrier gas is pure hydrogen, and impurity source is liquid nitrogen.
A kind of carborundum provided by the invention (SiC) groove MOS junction barrier schottky diode adds trench MOS structure in traditional Si C JBS device, makes it to effectively reduce reverse leakage current and increases device reliability.
Accompanying drawing explanation
Fig. 1 is the structural representation of a kind of carborundum of the present invention (SiC) groove MOS junction barrier schottky diode;
Fig. 2 is the schematic diagram of preparation method's the 1st step of a kind of carborundum of the present invention (SiC) groove MOS junction barrier schottky diode;
Fig. 3 is the schematic diagram of preparation method's the 2nd step of a kind of carborundum of the present invention (SiC) groove MOS junction barrier schottky diode;
Fig. 4 is the schematic diagram of preparation method's the 3rd step for a kind of carborundum of the present invention (SiC) groove MOS junction barrier schottky diode;
Fig. 5 is the schematic diagram of preparation method's the 4th step for a kind of carborundum of the present invention (SiC) groove MOS junction barrier schottky diode;
Fig. 6 is the schematic diagram of preparation method's the 5th step for a kind of carborundum of the present invention (SiC) groove MOS junction barrier schottky diode.
Embodiment
In order to make objects and advantages of the present invention clearer, below in conjunction with embodiment, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
As shown in Figure 1, a kind of carborundum (SiC) groove MOS junction barrier schottky diode that the invention provides of the present invention, comprises from top to down Schottky contact region 1, P+ injection region 2, SiO that layering successively arranges
2spacer medium 3, trench area 4, N
-epitaxial region 5, N
+substrate zone 6 and ohmic contact regions 7.Described groove MOS is positioned at N
-top, epitaxial region, between P+ injection region.Wherein, N
+substrate 11 is highly doped N-type silicon carbide substrates sheet, N
+substrate zone 6 above for thickness is that 10～30 μ m, nitrogen ion doping concentration are 1 * 10
15～1 * 10
16cm
-3n
-epitaxial region 5, N
-epitaxial region 5 is trench area 4 and P+ injection region 2 above, and wherein gash depth is 2 μ m, and width is 3 μ m, and shape can be square, circle or hexagon; And the degree of depth of P+ injection region 2 is 0.5 μ m, implantation concentration is 1 * 10
19cm
-3, 400 ℃ of implantation temperatures, and alternately occur with trench area 4.SiO
2spacer medium 3 is positioned at trench area 4, and it only covers groove inside, its be by, 1150 ℃, the dry-oxygen oxidation of 2 hours and PECVD deposit 1 μ mSiO
2form; Ohmic contact regions 7 metals consist of Ti/Ni10nm/200nm, and enclose through 1000 ℃ of rapid thermal annealings, 3min, Ar atmosphere, form ohmic contact; The whole device anode that covers of metal of Schottky contact region 1, is metal Ti, thickness 200nm.
Schottky contact region 1, SiO
2spacer medium 3 and trench area 4 form MOS structure, for the protection of main knot edge, reduce reverse leakage current.
P+ injection region 2, N
-epitaxial region 5 and N
+substrate zone forms PiN structure, presses down reducing main knot peak surface electric field, reduces reverse leakage current
N
-the doping of epitaxial loayer 5 and thickness have a significant effect to the puncture voltage of device, and before device breakdown, space charge region has expanded to electrode and has been connected, and this device loses blocking ability by the generation prior to puncturing, and title device is punch, otherwise is non-punch.The common puncture voltage of non-punch device is higher.Space charge plot structure and N
-doping and the thickness of epitaxial loayer 4 have close relationship.
In specific implementation process, can as the case may be, in the situation that basic structure is constant, carry out certain accommodation design.For example:
One, in the situation that meeting basic device structure, by SiO
2medium is adjusted, and can replace with some high K mediums.
Two, in the situation that meeting basic device structure, groove shape can be changed into triangle or trapezoidal, further changes schottky junction fringe field distribute with this.
Three,, in the situation that meeting basic device structure, groove and P+ knot position can be adjusted, for example the spacing between the two and arrangement mode.
A kind of carborundum (SiC) groove MOS junction barrier schottky diode providing of the present invention, in the situation that guaranteeing device performance, further modulates main knot fringe field, reduces reverse leakage current.Along with the development of semiconductor technology, adopt the present invention can also make more novel high-power device.
Embodiment 1
The 1st step, at N
+epitaxial growth N on silicon carbide substrates sheet
-drift layer, as Fig. 2.
First to N
+type silicon carbide substrates sheet 6 carries out RCA standard cleaning; On its front, with low pressure hot wall CVD (Chemical Vapor Deposition) method epitaxial growth thickness, be that 10 μ m, nitrogen ion doping concentration are 1 * 10 again
15cm
-3n
-epitaxial region 5, its epitaxy technique condition is: temperature is 1580 ℃, pressure 100mbar, reacting gas is silane and propane, and carrier gas is pure hydrogen, and impurity source is liquid nitrogen.
The 2nd step, at N
-on epitaxial loayer, etching forms groove, as Fig. 3.
At N
-epitaxial region 5 first forms figure with photoetching, the upper metal Ni that evaporates 200nm by the mode of ion beam evaporation, by peeling off formation etching window.By dry etching, form groove structure, wherein etching gas is CF
4+ O
2.
The 3rd step forms P+ injection region, as Fig. 3 on N-epitaxial loayer.
(3.1) SiO of deposit 2 μ m
2as the barrier layer as P+ injection region Al Implantation, and form P+ injection region 2 injection windows by photoetching and etching;
(3.2) at the temperature of 400 ℃, carry out Al ion implantation three times, the dosage of injection is respectively 1.33 * 10
14cm
-2, 8.29 * 10
13cm
-2, 4.05 * 10
13cm
-2, corresponding energy is respectively 350keV, 150keV and 50keV;
(3.3) adopt RCA clean standard to silicon carbide clean successively, oven dry and the protection of C film, and in 1600 ℃ of argon atmospheres, do the ion-activated annealing of 45min.
The 4th step, forms SiO
2passivation layer, as Fig. 5.
At N
-epitaxial region 5 passes through the SiO of mode deposit one deck 1 μ m of PECVD deposit above
2spacer medium 3, and make SiO by the means of photoetching corrosion
2only cover groove inside.
The 5th step, forms substrate ohmic contact, as Fig. 6.
On substrate, utilize the mode splash-proofing sputtering metal Ti/Ni10nm/200nm of sputter, than enclosing by 1000 ℃ of rapid thermal annealings, 3min, Ar atmosphere, form ohmic contact regions 7.
The 6th step, forms Schottky contacts, as Fig. 1.
On 5 surfaces, N-epitaxial region, utilize mode sputter one deck 200nmTi metal level of sputter, as Schottky contact region 1.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (7)
1. a carborundum groove MOS junction barrier schottky diode, is characterized in that, comprises successively from top to down Schottky contact region, P+ injection region, SiO
2spacer medium, trench area, N
-epitaxial loayer, N
+substrate zone and ohmic contact regions, described N
-on epitaxial loayer, be interval with P+ injection region and trench area, the spacing between described P+ injection region and trench area is 3 μ m, and described trench area inwall is deposited with SiO
2spacer medium layer, described ohmic contact regions is provided with N
+substrate zone, N
+substrate zone is provided with N
-epitaxial loayer.
2. a kind of carborundum groove MOS junction barrier schottky diode according to claim 1, is characterized in that, the described trench area degree of depth is 2 μ m, by dry etching, is formed.
3. a kind of carborundum groove MOS junction barrier schottky diode according to claim 1, is characterized in that, described trench area plan view shape is square, circle or hexagon.
4. a kind of carborundum groove MOS junction barrier schottky diode according to claim 1, is characterized in that described N
-the thickness of epitaxial loayer is 10 μ m, and its nitrogen ion doping concentration is 1 * 10
15～1 * 10
16cm
-3.
5. a kind of carborundum groove MOS junction barrier schottky diode according to claim 1, is characterized in that, described Schottky contact region metal covers whole anode.
6. a manufacture method for carborundum groove MOS junction barrier schottky diode, is characterized in that, comprises the following steps:
S1, to N
+type silicon carbide substrates sheet carries out after RCA standard cleaning, at positive epitaxial growth thickness, is that 10～30 μ m, nitrogen ion doping concentration are 1 * 10
15～1 * 10
16cm
-3n
-epitaxial loayer;
S2, at N
-epitaxial loayer forms after figure with photoetching, and the metal Ni with ion beam evaporation 200nm, by peeling off formation etching window, passes through CF
4+ O
2etching forms groove structure;
The SiO of S3, deposit 2 μ m
2as the barrier layer as P+ injection region Al Implantation, and form P+ injection region injection window by photoetching and etching; At the temperature of 400 ℃, carry out Al ion implantation three times, the dosage of injection is respectively 1.33 * 10
14cm
-2, 8.29 * 10
13cm
-2, 4.05 * 10
13cm
-2, corresponding energy is respectively 350keV, 150keV and 50keV; Adopt RCA clean standard to silicon carbide clean successively, oven dry and the protection of C film, and in 1600 ℃ of argon atmospheres, do the ion-activated annealing of 45min;
S4, epi-layer surface is carried out to dry-oxygen oxidation, 1150 ℃, 2 hours, carry out afterwards PECVD deposit 1 μ mSiO
2, form ground floor passivation layer;
S5, on substrate, after splash-proofing sputtering metal Ti/Ni10nm/200nm, by 1000 ℃ of rapid thermal annealings, 3min, Ar atmosphere, enclose, form ohmic contact regions;
S6, frontside oxide layer is windowed after, on surface, N-epitaxial region, utilize mode sputter one deck 200nmTi metal level of sputter, as Schottky contact region.
7. the manufacture method of a kind of carborundum according to claim 6 (SiC) groove MOS junction barrier schottky diode, it is characterized in that, epitaxy technique condition in described S1 is: temperature is 1580 ℃, pressure 100mbar, reacting gas is silane and propane, carrier gas is pure hydrogen, and impurity source is liquid nitrogen.
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|---|---|---|---|
| CN201410166376.XA CN103928532B (en) | 2014-04-21 | 2014-04-21 | A kind of carborundum groove MOS junction barrier schottky diode and preparation method thereof |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104217929A (en) * | 2014-10-11 | 2014-12-17 | 王金 | Epitaxial wafer and processing method thereof |
| CN105720110A (en) * | 2016-04-01 | 2016-06-29 | 江苏捷捷微电子股份有限公司 | SiC annular floating-point type P+ structured junction barrier Schottky diode and preparation method thereof |
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| CN110896098A (en) * | 2019-11-15 | 2020-03-20 | 华中科技大学 | Reverse switch transistor based on silicon carbide base and preparation method thereof |
| WO2020151475A1 (en) * | 2019-01-21 | 2020-07-30 | 厦门市三安集成电路有限公司 | Sic trench schottky diode device and preparation method thereof |
| CN111799337A (en) * | 2020-07-27 | 2020-10-20 | 西安电子科技大学 | SiC JBS diode device and preparation method thereof |
| CN112242449A (en) * | 2020-10-19 | 2021-01-19 | 重庆邮电大学 | Based on SiC substrate slot type MPS diode cell structure |
| CN112666438A (en) * | 2019-09-30 | 2021-04-16 | 中国科学院半导体研究所 | Sample preparation and optimization method for researching silicon carbide MOS interface state by using DLTS |
| CN113658860A (en) * | 2021-06-30 | 2021-11-16 | 中山大学 | Manufacturing method of Schottky diode |
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| CN104217929A (en) * | 2014-10-11 | 2014-12-17 | 王金 | Epitaxial wafer and processing method thereof |
| CN105720110A (en) * | 2016-04-01 | 2016-06-29 | 江苏捷捷微电子股份有限公司 | SiC annular floating-point type P+ structured junction barrier Schottky diode and preparation method thereof |
| CN107785250B (en) * | 2016-08-31 | 2020-12-11 | 株洲中车时代半导体有限公司 | Silicon carbide-based Schottky contact manufacturing method and Schottky diode manufacturing method |
| CN107785250A (en) * | 2016-08-31 | 2018-03-09 | 株洲中车时代电气股份有限公司 | Silicon carbide-based Schottky contacts preparation method and Schottky diode manufacture method |
| CN107957299A (en) * | 2017-11-27 | 2018-04-24 | 电子科技大学 | A kind of carborundum linear temperature sensor and its temp measuring method and manufacture method |
| CN107957299B (en) * | 2017-11-27 | 2019-12-27 | 电子科技大学 | Silicon carbide linear temperature sensor and temperature measuring method and manufacturing method thereof |
| WO2020151475A1 (en) * | 2019-01-21 | 2020-07-30 | 厦门市三安集成电路有限公司 | Sic trench schottky diode device and preparation method thereof |
| CN110190129A (en) * | 2019-07-04 | 2019-08-30 | 深圳爱仕特科技有限公司 | A kind of field-effect tube and preparation method thereof |
| CN110190129B (en) * | 2019-07-04 | 2024-03-12 | 深圳爱仕特科技有限公司 | Field effect transistor and preparation method thereof |
| CN112666438A (en) * | 2019-09-30 | 2021-04-16 | 中国科学院半导体研究所 | Sample preparation and optimization method for researching silicon carbide MOS interface state by using DLTS |
| CN112666438B (en) * | 2019-09-30 | 2023-06-06 | 中国科学院半导体研究所 | Sample preparation and optimization method for researching silicon carbide MOS interface state by DLTS |
| CN110896098A (en) * | 2019-11-15 | 2020-03-20 | 华中科技大学 | Reverse switch transistor based on silicon carbide base and preparation method thereof |
| CN111799337A (en) * | 2020-07-27 | 2020-10-20 | 西安电子科技大学 | SiC JBS diode device and preparation method thereof |
| CN112242449A (en) * | 2020-10-19 | 2021-01-19 | 重庆邮电大学 | Based on SiC substrate slot type MPS diode cell structure |
| CN113658860A (en) * | 2021-06-30 | 2021-11-16 | 中山大学 | Manufacturing method of Schottky diode |
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