CN113794450A - Broadband high-linearity low-noise amplifier adopting linearity optimization technology - Google Patents
Broadband high-linearity low-noise amplifier adopting linearity optimization technology Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
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- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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Abstract
The invention belongs to the technical field of radio frequency microwave integrated circuits, and particularly relates to a broadband high-linearity low-noise amplifier adopting a linearity optimization technology. The low noise amplifier mainly includes: the amplifier comprises an input matching stage consisting of an amplifier and a feedback resistor, an intermediate amplification stage, a noise elimination stage and a linearity optimization stage consisting of a self-loading structure. The noise elimination stage enables the input useful signals to be superposed at the output end and the noise signals to be offset at the output end by amplifying the cross-coupled input signals, so that the overall noise coefficient is reduced. The invention adopts the self-loading technology as a linear optimization stage structure, has small influence on the gain, the input matching, the noise coefficient and the like of the low-noise amplifier, and has high linearity improvement; the linearity optimization effect of more than 10dB can be achieved within the working frequency range of 0.3-4 GHz.
Description
Technical Field
The invention belongs to the technical field of radio frequency microwave integrated circuits, and particularly relates to a broadband high-linearity low-noise amplifier applied to a radio frequency front end.
Background
The low noise amplifier, as the first stage active amplifier of the signal receiver, is crucial to the overall performance of the communication system. As a research focus in the academic and industrial fields at present, a low noise amplifier having both a low noise coefficient and a high linearity plays an important role in reducing interference of adjacent channels and generation of intermodulation components in a frequency spectrum. Due to the development of wireless communication technology, the spectrum resources are increasingly scarce, and the receiver front end receives strong interference signals in the out-band or in-band frequently when receiving in-band signals, which requires that the low noise amplifier of the receiver front end provides higher linearity in addition to a certain gain and lower noise figure.
The deterioration of the linearity of the active circuit generally comes from a nonlinear component of a transistor, and in order to improve the linearity of the low noise amplifier, domestic and foreign research institutes propose ways such as source degeneration resistance, multi-gate transconductance cancellation, bypass floating power supply and the like. However, these structures have the disadvantages of affecting the main path signal, too small linearization range, too high auxiliary path power consumption, etc. On the other hand, the linearity improvement of the lna often affects its gain and noise figure. Therefore, how to ensure a lower noise coefficient and improve linearity performance in the design of a broadband high-linearity low-noise amplifier is a main problem of current research.
Disclosure of Invention
The invention aims to provide a low-noise amplifier with wider frequency range, higher linearity and lower noise coefficient.
The broadband high-linearity low-noise amplifier provided by the invention is realized by a differential structure, and the structure of the amplifier is shown as the attached figure 1. The system specifically comprises an input matching stage, an intermediate amplification stage, a noise elimination stage and a linearity optimization stage consisting of a self-loading structure, wherein:
the input matching stage consists of an amplifier with an inverter structure and a feedback resistor and is used for receiving signals, so that a signal source and input impedance can be well matched within a required frequency band range, and the return loss of the input signals is reduced;
LC network matching is generally not considered for the implementation of broadband low noise amplifiers. Meanwhile, because the power consumption of the common-gate matching structure is overlarge, a feedback resistance matching mode can be selected to save the area and the power consumption of the circuit;
the intermediate amplification stage is connected between the input matching stage and the output end and is used for amplifying the received signal;
the noise elimination stage is connected between the input end RFIN and the output end RFOUT, enhances the received signal by amplifying the cross-coupled input signal, cancels the noise of the low noise amplifier, reduces the integral noise coefficient and improves the output signal-to-noise ratio of the low noise amplifier; as shown in fig. 2, the useful signal received at the output end is superposed with the inverted signal amplified in phase-in amplification and in phase-inverted by the noise cancellation stage to form an output signal; meanwhile, the noise signal of the input end is amplified in phase at the output end and amplified in phase reversal at the noise elimination path, and the noise signal are mutually offset at the output end, so that the useful signal of the output end is enhanced, the noise signal is weakened, and the output signal-to-noise ratio of the low-noise amplifier is greatly improved;
the linearity optimization stage is composed of a self-loading structure and used for offsetting the nonlinear component of the amplifier and improving the linearity of the low-noise amplifier on the premise of not greatly influencing the performance of the low-noise amplifier. By adopting the linearity optimization technology of the self-loading structure, the distortion component generated by the low-noise amplifier is partially eliminated by adjusting the value of the feedback resistor in the self-loading structure, so that the linearity of the low-noise amplifier is improved. Although the linear optimization stage will bring some loss to the gain of the low noise amplifier, the linear optimization stage has very little effect on the overall noise figure because the linearization path is only connected between the two differential outputs RFOUT + and RFOUT-.
The invention adopts the linearity optimization level of the self-loading structure, can greatly improve the linearity of the low-noise amplifier, and can achieve the linearity optimization effect of more than 10dB in the working frequency band of 0.3-4 GHz. And only bring the loss less than 1.5dB to the gain of the low noise amplifier, and because the linearization path is only connected at the output end, the influence on the whole noise coefficient is very small.
Drawings
Fig. 1 is a block diagram of a low noise amplifier according to the present invention.
Fig. 2 is a specific structure diagram of the low noise amplifier of the present invention.
FIG. 3 is a graph illustrating the effect of the adjustable resistance value of the self-loading structure on the overall linearity in an embodiment of the present invention.
FIG. 4 shows the comparison result of S parameter changes before and after the addition of the linearity optimization stage in the embodiment of the present invention.
FIG. 5 shows the comparison of noise figure changes before and after the linearity optimization stage is added in the embodiment of the present invention.
FIG. 6 shows the comparison of the linearity before and after the linearity optimization stage is added in the embodiment of the present invention.
Detailed Description
The invention is further described with reference to the following figures and detailed description.
As shown in fig. 2, the specific structure of the broadband high linearity low noise amplifier adopting the linearity optimization technique proposed by the present invention includes: an input matching stage, an intermediate amplification stage, a noise cancellation stage and a linearity optimization stage.
The input matching stage is composed of an MOS transistor M1~M4And a resistance RFM1、RFM2And (4) forming. Wherein the MOS transistor M1~M4An amplifier with inverter structure formed by complementary CMOS, a resistor RFM1、RFM2The input impedance of the input matching stage is controlled as a feedback resistance of the amplifier. The input signal is differentially input to an input matching stage of a low noise amplifier, and the impedance R of the input signal source is selected to match the input signalS=RFM/(1+AV) Wherein A isVIs M1~M4Gain of constituent amplifier, RSIs the impedance of the input signal source. When the input meets the matching requirement, S can be satisfied in the required frequency band11<10dB, the degree of input matching may be limited at high frequencies due to parasitic capacitance effects.
Further, the signal passing through the input matching stage circuit is amplified by the second stage amplifying circuitI.e. intermediate amplifier amplification. The intermediate amplifying circuit comprises an MOS transistor M5~M8The grid and drain electrodes of an NMOS tube and a PMOS tube are connected, and the source electrode is respectively connected with GND and VDDAn amplifier constituting an inverter structure. Compared with other structures, the amplifier with the inverter structure has the characteristics of simple structure, large transconductance current ratio, relatively low power consumption and noise and the like. In addition, the parasitic capacitance of the output node is small, and the working frequency band of the low-noise amplifier can be widened.
The noise elimination stage is composed of a MOS transistor M9~M16And (4) forming. As shown in FIG. 2, wherein M9、M12、M13、M16As a control tube of the noise elimination stage, M can be controlled9、M12、M13、M16The gate voltage of the transistor controls the switching and depth of noise cancellation. When the receiving signal and noise are simultaneously input into the differential input port of the low-noise amplifier, the useful receiving signal passes through the MOS transistor M in one path1~M4And a resistance RFM1、RFM2The input matching stage is amplified in reverse phase and passes through MOS transistor M5~M8The composed intermediate amplification stage is amplified in reverse phase again; the other path enters from the MOS tube M in reverse phase9~M16The formed noise elimination stage is amplified in an inverted phase, and two paths of useful signals amplified in the inverted phase twice are superposed at an output end to form an output signal. Because the in-phase noise generated by the input matching stage at the two input ends passes through the two paths and is mutually opposite-phase signals at the output end, the in-phase noise can be mutually offset, and the integral signal-to-noise ratio of the low-noise amplifier is improved.
The linearity optimization stage is composed of a MOS transistor M17~M20And a resistance RLE1、RLE2Is composed of MOS transistor M17~M20An amplifier and a resistor R constituting an inverter structureLE1、RLE2Is a variable resistor. The linearity optimization scheme can be defined as a self-loading structure, wherein the input end of the linearity optimization scheme is connected with the output end of the low-noise amplifier, and the output end of the linearity optimization scheme is floated. As shown in figure 1, according to kirchhoff's current law, at the output end of the low-noise amplifier, the amplifier outputs currentThe nonlinear component in the current is offset by the nonlinear component in the output current of the self-loading structure, so that the linearization effect is achieved. Since the "self-loading structure" does not require a large gain, M17~M20The size can be smaller, and the variable resistor R can be adjustedLE1、RLE2The linearity of the low noise amplifier is optimized as shown in fig. 3.
The S-parameter curve and the noise figure curve of the broadband low-power-consumption high-linearity low-noise amplifier in the above specific example are respectively shown in fig. 4 and fig. 5. From the results of fig. 4 and 5, the linear optimization technique proposed by the present invention ensures that the gain is less affected while the input of the lna is matched and the noise figure is low. Finally, the linearity performance of the low noise amplifier provided by the invention in a frequency band of 0.3-4GHz is tested under a dual-tone signal with an interval of 1MHz, and the result is shown in figure 5. As shown in the attached figure 5, the self-load linear optimization technology provided by the invention can realize the linearity optimization of more than 10dB in a frequency band of 0.3-4GHz, and the advancement and uniqueness of the self-load linear optimization technology are reflected.
Claims (5)
1. A broadband high linearity low noise amplifier using linearity optimization technique is realized by differential structure, which is characterized in that the amplifier comprises an input matching stage, an intermediate amplification stage, a noise elimination stage and a linearity optimization stage composed of self-loading structure, wherein:
the input matching stage consists of an amplifier with an inverter structure and a feedback resistor and is used for receiving signals, so that a signal source and input impedance can be well matched within a required frequency band range, and the return loss of the input signals is reduced;
the intermediate amplification stage is connected between the input matching stage and the output end and is used for amplifying the received signal;
the noise elimination stage is connected between the input end RFIN and the output end RFOUT, enhances the received signal by amplifying the cross-coupled input signal, cancels the noise of the low noise amplifier, reduces the integral noise coefficient and improves the output signal-to-noise ratio of the low noise amplifier;
the linearity optimization stage is connected between the two differential output ends RFOUT + and RFOUT-, and is used for offsetting the nonlinear component of the amplifier and improving the linearity of the low-noise amplifier on the premise of not generating great influence on the performance of the low-noise amplifier; by adopting the linearity optimization technology of the self-loading structure, the distortion component generated by the low-noise amplifier is partially eliminated by adjusting the value of the feedback resistor in the self-loading structure, so that the linearity of the low-noise amplifier is improved.
2. A wideband high linearity low noise amplifier according to claim 1, wherein the linearity optimization stage is implemented by MOS transistor M17~M20And a resistance RLE1、RLE2Composition is carried out; wherein, MOS tube M17~M20An amplifier and a resistor R constituting an inverter structureLE1、RLE2Is a variable resistor; the linearity optimization is defined as a self-loading structure, the input end of the linearity optimization is connected with the output end of the low-noise amplifier, and the output end of the linearity optimization is floated; can be adjusted by adjusting the variable resistor RLE1、RLE2So that the linearity of the low noise amplifier is optimized.
3. A wideband high linearity low noise amplifier according to claim 2, wherein the input matching stage is a MOS transistor M1~M4And a resistance RFM1、RFM2Composition is carried out; wherein, MOS tube M1~M4An amplifier with inverter structure formed by complementary CMOS, a resistor RFM1、RFM2As the feedback resistance of the amplifier, the input impedance of the input matching stage is controlled; the input signal is differentially input to an input matching stage of the low noise amplifier.
4. A wideband high linearity low noise amplifier according to claim 2, wherein the intermediate amplifier stage comprises MOS transistor M5~M8The grid and drain electrodes of an NMOS tube and a PMOS tube are connected, and the source electrode is respectively connected with GND and VDDAn amplifier constituting an inverter structure.
5. A wideband high linearity low noise amplifier according to claim 2, wherein the noise cancellation stage is a MOS transistor M9~M16Composition is carried out; wherein M is9、M12、M13、M16As control tubes for noise-canceling stages, by controlling M9、M12、M13、M16The gate voltage of the transistor to control the switching and depth of noise cancellation; when the receiving signal and noise are simultaneously input into the differential input port of the low-noise amplifier, the useful receiving signal passes through the MOS transistor M in one path1~M4And a resistance RFM1、RFM2The input matching stage is amplified in reverse phase and passes through MOS transistor M5~M8The composed intermediate amplification stage is amplified in reverse phase again; the other path enters from the MOS tube M in reverse phase9~M16The formed noise elimination stage is amplified in an inverted phase, and two paths of useful signals amplified in the inverted phase twice are superposed at an output end to form an output signal; because the in-phase noise generated by the input matching stage at the two input ends passes through the two paths and is mutually opposite-phase signals at the output end, the in-phase noise can be mutually offset, and the integral signal-to-noise ratio of the low-noise amplifier is improved.
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