CN111884605A - Differential operational amplifier - Google Patents
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- CN111884605A CN111884605A CN202010794492.1A CN202010794492A CN111884605A CN 111884605 A CN111884605 A CN 111884605A CN 202010794492 A CN202010794492 A CN 202010794492A CN 111884605 A CN111884605 A CN 111884605A
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- H—ELECTRICITY
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- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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- H—ELECTRICITY
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- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
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Abstract
The invention provides a differential operational amplifier, which is applied to a trans-impedance amplifier and comprises two groups of symmetrically arranged combined circuits; the combination circuit comprises a cascode amplification circuit, a source follower amplification circuit and a negative feedback circuit. The input end of the cascode amplifying circuit is the input end of the differential operational amplifier and is used for amplifying input voltage to form a primary amplifying signal, and the primary amplifying signal is transmitted to the input end of the source electrode following amplifying circuit. The source electrode following amplifying circuit is used for amplifying the first-stage amplifying signal, and the output end of the source electrode following amplifying circuit is the output end of the differential operational amplifier. The negative feedback circuit is connected with the source electrode following amplifying circuit and is used for partially offsetting the third-order component of the source electrode following amplifying circuit. According to the invention, the OIP3 of the trans-impedance amplifier is improved on the basis of not increasing the overall power consumption of the circuit by partially offsetting the third-order component of the source follower amplifier circuit without additionally increasing current and extra transistors.
Description
Technical Field
The invention belongs to the field of radio frequency communication circuit elements, and particularly relates to a differential operational amplifier.
Background
In the technical field of radio frequency communication circuits, OIP3 is an output 3-order interception point and is an index for measuring the linearity of a power amplifier, the difference between OIP3 and an input three-order interception point IIP3 is the gain of the power amplifier, and the higher the parameter value is, the better the linearity is.
Prior art 1: a circuit configuration for improving OIP3, a feed-forward linearizer, is known. The circuit includes two cancellation loops: a distortion signal extraction loop and a distortion signal cancellation loop. The function of the distortion signal extraction loop is to couple out a signal which comprises a carrier and an intermodulation component from the nonlinear main power amplifier output, and the signal and a signal which only comprises the carrier on the reference branch are mutually offset, so that the output signal only comprises the intermodulation component; the function of the distortion signal cancellation loop is to extract the intermodulation component output by the loop, and the intermodulation component is mutually cancelled with the intermodulation component on the main branch after being processed, thereby achieving the purposes of reducing intermodulation level and improving the linearity of the amplifier.
Prior art 2: a circuit structure that improves OIP3 is known, a PMOS IMD sinker structure. The technology improves the linearity by a third-order intermodulation distortion absorption unit consisting of a tuning inductor and a PMOS tube. By adjusting the bias voltage, the gate width and the tuning inductance of the PMOS transistor, the IMD3 absorption unit can absorb IMD3 signal current generated by a common source amplifier tube, so that the linearity of the operational amplifier is improved.
The above two circuit structures for improving OIP3 require additional current or additional transistors, thereby increasing the overall power consumption of the circuit.
Disclosure of Invention
The present invention is based on a transimpedance amplifier in which the output of a differential operational amplifier is boosted by adding negative feedback to OIP 3. Therefore, the OIP3 can be improved on the basis of not increasing the overall power consumption of the circuit without additionally increasing the current or adding additional transistors.
In order to achieve the technical purpose, the invention adopts the following specific technical scheme:
the invention provides a differential operational amplifier, which is applied to a trans-impedance amplifier and comprises two groups of symmetrically arranged combined circuits; the combined circuit comprises a cascode amplifying circuit, a source electrode following amplifying circuit and a negative feedback circuit;
the input end of the cascode amplifying circuit is the input end of the differential operational amplifier and is used for amplifying an input voltage to form a primary amplifying signal and transmitting the primary amplifying signal to the input end of the source electrode following amplifying circuit;
the source electrode following amplifying circuit is used for amplifying the primary amplifying signal, and the output end of the source electrode following amplifying circuit is the output end of the differential operational amplifier;
the negative feedback circuit is connected with the source electrode following amplifying circuit and is used for partially offsetting the third-order component of the source electrode following amplifying circuit.
Further, the cascode amplifying circuit comprises a first cascode field effect transistor and a second cascode field effect transistor; the grid electrode of the first cascode field effect transistor is connected with direct-current bias voltage, the source electrode of the first cascode field effect transistor is connected with the drain electrode of the second cascode field effect transistor, and the drain electrode of the first cascode field effect transistor is connected with the source electrode follower circuit; and the grid electrode of the second field effect transistor is connected with the input voltage, and the source electrode of the second field effect transistor is connected with the source electrode follower circuit and grounded.
Further, the differential operational amplifier further comprises a first current source, and the source of the first cascode field effect transistor is grounded through the first current source.
Further, the first current source is a PMOS transistor.
Further, the source follower circuit comprises a first source follower field effect transistor and a second source follower field effect transistor; the grid electrode of the first source electrode following field effect tube is simultaneously connected with the drain electrode of the first cascode field effect tube and the drain electrode of the first source electrode following field effect tube, the source electrode is connected with the drain electrode of the second source electrode following field effect tube, and the drain electrode is connected with the negative feedback circuit; the grid electrode of the second source electrode following field effect transistor is connected with the negative feedback circuit, the source electrode of the second source electrode following field effect transistor is connected with the source electrode of the second cascode field effect transistor, and the drain electrode of the second source electrode following field effect transistor is connected with the source electrode of the first source electrode following field effect transistor; and the drain electrode of the second source electrode following field effect transistor is the output end of the differential operational amplifier.
Further, the negative feedback circuit comprises a negative feedback resistor and a negative feedback capacitor; one end of the negative feedback resistor is simultaneously connected with the drain electrode of the first source electrode following field effect transistor and the other end of the negative feedback resistor, and the other end of the negative feedback resistor is also connected with the negative feedback capacitor; one end of the negative feedback capacitor is connected with the negative feedback resistor, and the other end of the negative feedback capacitor is connected with the grid electrode of the first source electrode following field effect transistor.
Furthermore, the two groups of combined circuits are connected with the grid electrode of the field effect tube through respective source electrodes.
Further, the differential operational amplifier further comprises a second current source and a third current source; one end of the negative feedback resistor is connected with the grid electrode of the first source electrode following field effect transistor through the second current source, and is connected with the drain electrode of the first source electrode following field effect transistor and the other end of the negative feedback resistor through the third current source.
Further, the second current source and the third current source are PMOS transistors.
By adopting the technical scheme, the invention can bring the following beneficial effects:
the circuit complexity is significantly reduced relative to known high OIP3 circuits, thereby enabling further reduction in chip area and power consumption of the transimpedance amplifier. The OIP3 can reach more than 42dBm under the voltage of 3.3V and the frequency of 2.5 GHz.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings needed to be used in the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present disclosure, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a conventional feed forward linearization cancellation circuit configuration;
FIG. 2 is a circuit diagram of an exemplary transimpedance amplifier in which the present invention is implemented;
fig. 3 shows a circuit diagram of a differential operational amplifier in an embodiment of the present invention.
Detailed Description
The embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.
The embodiments of the present disclosure are described below with specific examples, and other advantages and effects of the present disclosure will be readily apparent to those skilled in the art from the disclosure in the specification. It is to be understood that the described embodiments are merely illustrative of some, and not restrictive, of the embodiments of the disclosure. The disclosure may be embodied or carried out in various other specific embodiments, and various modifications and changes may be made in the details within the description without departing from the spirit of the disclosure. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.
It is noted that various aspects of the embodiments are described below within the scope of the appended claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the disclosure, one skilled in the art should appreciate that one aspect described herein may be implemented independently of any other aspects and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented and/or a method practiced using any number of the aspects set forth herein. Additionally, such an apparatus may be implemented and/or such a method may be practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present disclosure, and the drawings only show the components related to the present disclosure rather than the number, shape and size of the components in actual implementation, and the type, amount and ratio of the components in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
In addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects may be practiced without these specific details.
The disclosed embodiments provide a differential operational amplifier.
As shown in fig. 2, the transimpedance amplifier is a TIA structure. The transimpedance amplifier inputs voltage signals through a first differential input port 1 and a second differential input port 2, the voltage signals are converted into current signals through a first conversion resistor 5a and a second conversion resistor 6a, the current signals enter the differential operational amplifier, and the voltage signals are output by a circuit through a first total output port 3 and a second total output port 4. The output signal is fed back to the input of the amplifier via a first feedback resistor 5b and a second feedback resistor 6 b.
As shown in fig. 3, the differential operational amplifier of the present embodiment includes two symmetrically arranged combination circuits, each of which is composed of two stages, and includes a combination circuit including a cascode amplification circuit, a source follower amplification circuit, and a negative feedback circuit 27; compared with a single-ended structure, the combined circuit provided by the embodiment forms a differential structure, and the power supply noise suppression capability of the circuit can be improved.
The input end of the cascode amplifying circuit is the input end of the differential operational amplifier and is used for amplifying input voltage to form a primary amplifying signal, and the primary amplifying signal is transmitted to the input end of the source electrode following amplifying circuit. The cascode amplifying circuit comprises a first cascode field effect transistor 9 and a second cascode field effect transistor 7; the grid electrode of the first cascode field effect transistor 9 is connected with direct-current bias voltage to ensure that the cascode transistor works in a normal state, the source electrode is connected with the drain electrode of the second cascode field effect transistor 7, and the drain electrode is connected with the source electrode follower circuit; the grid electrode of the second field effect transistor is connected with the input voltage, and the source electrode of the second field effect transistor is connected with the source electrode follower circuit and grounded.
The differential operational amplifier of the present embodiment further includes a first current source 11, and the source of the first cascode field effect transistor 9 is grounded through the first current source 11. The first current source 11 is a PMOS transistor.
The source follower amplifying circuit of the present embodiment is used for amplifying a first-stage amplified signal, and an output terminal of the source follower amplifying circuit is an output terminal of a differential operational amplifier, and includes a first source follower field-effect transistor 14 and a second source follower field-effect transistor 24; the grid electrode of the first source electrode following field effect transistor 14 is simultaneously connected with the drain electrode of the first cascode field effect transistor 9 and the drain electrode of the first source electrode following field effect transistor 14, the source electrode is connected with the drain electrode of the second source electrode following field effect transistor 24, and the drain electrode is connected with the negative feedback circuit 27; the grid electrode of the second source electrode following field effect transistor 24 is connected with the negative feedback circuit 27, the source electrode is connected with the source electrode of the second cascode field effect transistor 7, and the drain electrode is connected with the source electrode of the first source electrode following field effect transistor 14; wherein, the drain of the second source follower field effect transistor 24 is the output terminal of the differential operational amplifier.
In this embodiment, the two sets of combination circuits are connected by the gates of the respective source follower fets.
When the negative feedback circuit 27 is not added, the TIA structure of this embodiment generates a non-linear component in the amplification process due to the non-linearity of the device of the operational amplifier itself and the limited gain of the operational amplifier itself, wherein the larger component is the third-order component.
The negative feedback circuit 27 proposed in the present embodiment is connected to the source follower amplifier circuit for partially canceling the third order component of the source follower amplifier circuit. The negative feedback circuit 27 includes a negative feedback resistor 18 and a negative feedback capacitor 20; one end of the negative feedback resistor 18 is simultaneously connected with the drain of the first source follower field effect transistor 14 and the other end of the negative feedback resistor 18, and the other end of the negative feedback resistor 18 is also connected with the negative feedback capacitor 20; one end of the degeneration capacitor 20 is connected to the degeneration resistor 18, and the other end is connected to the gate of the first source follower fet 14.
In this embodiment, the differential operational amplifier further includes a second current source 12 and a third current source 16. One end of the negative feedback resistor 18 is connected with the gate of the first source follower field effect transistor 14 through the second current source 12, and is connected with the drain of the first source follower field effect transistor 14 and the other end of the negative feedback resistor 18 through the third current source 16, and the second current source 12 and the third current source 16 are both PMOS transistors.
For the two-stage amplifying circuit in this embodiment, it is general
Wherein OIP31OIP3 for cascode circuit, gain for cascode circuit, OIP32OIP3 for the source follower amplifier circuit.
The output third order component of this embodiment is limited primarily by the second stage.
In the present embodiment, when the gate of the first source follower fet 14 receives the positive phase signal, the output signal is inverted. At this time, the drain inverted signal of the first source follower fet 14 reaches the upper plate of the negative feedback capacitor 20, and the negative feedback capacitor 20 outputs the inverted signal to the gate of the second source follower fet 24, so that the feedback signal output by the drain of the second source follower fet 24 is positive phase, thereby forming a negative feedback loop.
The output of the transimpedance amplifier is controlled by a negative feedback signal formed by the negative feedback loop and the output signal of the first source follower field effect transistor 14, and a part of the third-order nonlinear component is also cancelled. Therefore, the OIP3 for manufacturing the trans-impedance amplifier is improved on the premise of not additionally increasing the size of an integrated circuit and the power supply voltage.
The degeneration resistor 18 and the second current source 12 can adjust the drain voltage of the first source follower fet 14 according to different usage scenarios, and can also adjust the system power consumption.
The negative feedback network of the improving circuit OIP3 can reach OIP3 of 40dBm at 2.5GHz, and simultaneously, because only one capacitor and one resistor network are added under the structure, the structure does not consume extra chip current and does not occupy excessive chip area. The transimpedance amplifier can reach OIP3 of 40dBm at 2.5GHz, and simultaneously, because only one capacitor and resistor network is added under the framework of the prior art, the chip current is not additionally consumed, and excessive chip area is not occupied.
The above description is only for the specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present disclosure should be covered within the scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.
Claims (9)
1. A differential operational amplifier is applied to a transimpedance amplifier, and is characterized in that: comprises two groups of symmetrically arranged combined circuits; the combined circuit comprises a cascode amplifying circuit, a source electrode following amplifying circuit and a negative feedback circuit;
the input end of the cascode amplifying circuit is the input end of the differential operational amplifier and is used for amplifying an input voltage to form a primary amplifying signal and transmitting the primary amplifying signal to the input end of the source electrode following amplifying circuit;
the source electrode following amplifying circuit is used for amplifying the primary amplifying signal, and the output end of the source electrode following amplifying circuit is the output end of the differential operational amplifier;
the negative feedback circuit is connected with the source electrode following amplifying circuit and is used for partially offsetting the third-order component of the source electrode following amplifying circuit.
2. The differential operational amplifier of claim 1, wherein: the cascode amplifying circuit comprises a first cascode field effect transistor and a second cascode field effect transistor; the grid electrode of the first cascode field effect transistor is connected with direct-current bias voltage, the source electrode of the first cascode field effect transistor is connected with the drain electrode of the second cascode field effect transistor, and the drain electrode of the first cascode field effect transistor is connected with the source electrode follower circuit; and the grid electrode of the second field effect transistor is connected with the input voltage, and the source electrode of the second field effect transistor is connected with the source electrode follower circuit and grounded.
3. The differential operational amplifier of claim 2, wherein: the differential operational amplifier further comprises a first current source, and the source electrode of the first cascode field effect transistor is grounded through the first current source.
4. The differential operational amplifier of claim 3, wherein: the first current source is a PMOS tube.
5. The differential operational amplifier of claim 2, wherein: the source electrode following circuit comprises a first source electrode following field effect tube and a second source electrode following field effect tube; the grid electrode of the first source electrode following field effect tube is simultaneously connected with the drain electrode of the first cascode field effect tube and the drain electrode of the first source electrode following field effect tube, the source electrode is connected with the drain electrode of the second source electrode following field effect tube, and the drain electrode is connected with the negative feedback circuit; the grid electrode of the second source electrode following field effect transistor is connected with the negative feedback circuit, the source electrode of the second source electrode following field effect transistor is connected with the source electrode of the second cascode field effect transistor, and the drain electrode of the second source electrode following field effect transistor is connected with the source electrode of the first source electrode following field effect transistor; and the drain electrode of the second source electrode following field effect transistor is the output end of the differential operational amplifier.
6. The differential operational amplifier of claim 5, wherein: the negative feedback circuit comprises a negative feedback resistor and a negative feedback capacitor; one end of the negative feedback resistor is simultaneously connected with the drain electrode of the first source electrode following field effect transistor and the other end of the negative feedback resistor, and the other end of the negative feedback resistor is also connected with the negative feedback capacitor; one end of the negative feedback capacitor is connected with the negative feedback resistor, and the other end of the negative feedback capacitor is connected with the grid electrode of the first source electrode following field effect transistor.
7. The differential operational amplifier of claim 6, wherein: the two groups of combined circuits are connected with the grid of the field effect transistor through respective source electrodes.
8. The differential operational amplifier of claim 7, wherein: the differential operational amplifier further comprises a second current source and a third current source; one end of the negative feedback resistor is connected with the grid electrode of the first source electrode following field effect transistor through the second current source, and is connected with the drain electrode of the first source electrode following field effect transistor and the other end of the negative feedback resistor through the third current source.
9. The differential operational amplifier of claim 8, wherein: the second current source and the third current source are PMOS tubes.
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| CN202010794492.1A CN111884605B (en) | 2020-08-10 | 2020-08-10 | Differential operational amplifier |
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| CN202010794492.1A CN111884605B (en) | 2020-08-10 | 2020-08-10 | Differential operational amplifier |
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| CN112953419A (en) * | 2021-03-04 | 2021-06-11 | 电子科技大学 | Nonlinear cancellation power amplifier based on cascode structure |
| CN113489462A (en) * | 2021-07-29 | 2021-10-08 | 北京京东方传感技术有限公司 | Voltage amplification circuit, sensor and electronic equipment |
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