CN113782588A - 一种具有栅极高耐压低漏电的氮化镓功率器件 - Google Patents
一种具有栅极高耐压低漏电的氮化镓功率器件 Download PDFInfo
- Publication number
- CN113782588A CN113782588A CN202111010568.8A CN202111010568A CN113782588A CN 113782588 A CN113782588 A CN 113782588A CN 202111010568 A CN202111010568 A CN 202111010568A CN 113782588 A CN113782588 A CN 113782588A
- Authority
- CN
- China
- Prior art keywords
- layer
- gallium nitride
- type
- aluminum
- arranged above
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 158
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 110
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 57
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims abstract description 35
- 230000004888 barrier function Effects 0.000 claims abstract description 35
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 30
- 229910052751 metal Inorganic materials 0.000 claims abstract description 24
- 239000002184 metal Substances 0.000 claims abstract description 24
- 238000002161 passivation Methods 0.000 claims abstract description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 11
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 11
- 239000010703 silicon Substances 0.000 claims abstract description 11
- 150000004767 nitrides Chemical class 0.000 claims abstract description 10
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 239000002245 particle Substances 0.000 claims description 13
- 229910002704 AlGaN Inorganic materials 0.000 claims description 6
- 239000010410 layer Substances 0.000 description 115
- 239000004065 semiconductor Substances 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 8
- 238000000034 method Methods 0.000 description 8
- 230000005684 electric field Effects 0.000 description 7
- 230000005641 tunneling Effects 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 230000008569 process Effects 0.000 description 4
- 239000000370 acceptor Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 238000011084 recovery Methods 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 230000005533 two-dimensional electron gas Effects 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7781—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with inverted single heterostructure, i.e. with active layer formed on top of wide bandgap layer, e.g. IHEMT
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
一种栅极高耐压低漏电的氮化镓功率器件，包括：P型硅衬底，在P型硅衬底上方设有氮化铝缓冲层，氮化铝缓冲层上方设有铝镓氮缓冲层，铝镓氮缓冲层上方设有氮化镓缓冲层，氮化镓缓冲层上方设有铝镓氮势垒层和两端的源极及漏极，源极及漏极上方设有金属分别作为源极和漏极连接铝镓氮势垒层两端至外围的输入\输出，源极金属与铝镓氮势垒层左端形成欧姆接触，漏极和铝镓氮势垒层右端形成欧姆接触，铝镓氮势垒层上方叠加有三层不同掺杂浓度的P型氮化镓层，P型氮化镓层上方设有栅极金属连接P型氮化镓层至结构外围的输入\输出，栅极金属和P型氮化镓层形成肖特基接触，P型氮化镓层和栅极在源漏极之间相对距离源极较近，相对距离漏极较远，铝镓氮势垒层上方漏极和P型氮化镓之间设有氮化物钝化层，源极和P型氮化镓之间设有氮化物钝化层。
Description
技术领域
本发明主要涉及高压功率半导体器件技术领域，具体来说，是一种对栅极很好保护即维持栅极高耐压低漏电的氮化镓功率器件。
背景技术
随着电力电子、半导体照明、新一代移动通信、智能电网、高速轨道交通、新能源汽车、消费类电子等领域的火热，无线充电、无人驾驶汽车、固态光源、微波射频器件等应用的兴起，对功率器件的性能提出了新的需求。但传统的硅器件因受材料特性影响已达到物理极限，在性能方面已无法满足新兴的需求，所以在社会需求的驱动下寻求下一个替代者已刻不容缓。与第一代半导体材料硅(Si)和第二代半导体材料砷化镓(GaAs)相比，第三代半导体材料氮化镓(GaN)因具有禁带宽度大(3.39eV)、高强度的击穿电场、高漂移速度的饱和电子、热高导率、较小的介电常数、耐高频、耐高压、耐高温、高光效、高功率、较强的抗辐射能力以及稳定的化学性质等优越性能，因而能制备出在高温下运行稳定，在高电压、高频率下更为可靠的半导体器件，该器件能以较少的电能消耗，而获得更强的运行能力。
P型氮化镓栅高电子迁移率晶体管具有正向固定的阈值电压，低开态电阻和高击穿电压从而成为目前应用最广泛的氮化镓功率器件；但是P型氮化镓栅存在栅极漏电流，当栅压达到一定数值后栅极漏电增加，栅极漏电会增加开关损耗，影响开关转换速率，甚至导致器件的栅极发生击穿，栅叠层特性退化；此外氮化镓功率器件的正向阈值电压较低也是造成器件出现安全问题的原因之一。
传统方案中，氮化镓功率器件常常会利用一些方法来减缓栅极漏电，比如采用合适的钝化工艺，H等离子体工艺优化，增加铝镓氮的厚度和采用MIS介质层等方式；但这些技术都只能维持较低栅压下的表面漏电减少且带来的成本往往较高，而对于垂直隧穿漏电流来说，很难起到缓解所用。
本发明针对P型氮化镓栅高电子迁移率晶体管功率器件存在的大电压下的栅极漏电增加和器件正向阈值电压较低的问题提出一种新型氮化镓功率器件结构，此结构可以很好的解决氮化镓功率器件的栅极漏电和阈值电压的问题，从而提高器件的实用性和安全性。
发明内容
技术问题：本发明针对上述问题，提出了一种低栅极漏电高正向阈值电压的氮化镓功率器件，本发明结构能够很好的提高栅极耐压、降低栅漏电流同时提高正向阈值电压，提高整个器件结构的实用安全性能。
技术方案：本发明的一种具有栅极高耐压低漏电的氮化镓功率器件，该氮化镓功率器件包括：P型硅衬底，在P型硅衬底上方设有氮化铝缓冲层，氮化铝缓冲层上方设有铝镓氮缓冲层，铝镓氮缓冲层上方设有氮化镓缓冲层，氮化镓缓冲层上方的中部设有铝镓氮势垒层，两边设有源极及漏极，源极及漏极上方设有金属分别作为源极和漏极连接铝镓氮势垒层两端至外围的输入\输出，源极金属与铝镓氮势垒层左端形成欧姆接触，漏极和铝镓氮势垒层右端形成欧姆接触；铝镓氮势垒层上方设有第一P型氮化镓层，第一P型氮化镓层上方设有第二P型氮化镓层，第二P型氮化镓层上方设有第三P型氮化镓层，第三P型氮化镓层上方设有栅极金属连接第三P型氮化镓层至结构外围的输入\输出，栅极金属和第三P型氮化镓层形成肖特基接触；铝镓氮势垒层上方漏极与第一P型氮化镓层、第二P型氮化镓层、第三P型氮化镓层之间设有氮化物钝化层，源极与第一P型氮化镓层、第二P型氮化镓层、第三P型氮化镓层之间设有氮化物钝化层。
所述第一P型氮化镓层、第二P型氮化镓层、第三P型氮化镓层和栅极在源极及漏极之间相对距离源极较近，相对距离漏极较远。
所述铝镓氮势垒层与栅极之间设有P型氮化镓层、P型氮化镓层和P型氮化镓层。
所述P型氮化镓层、P型氮化镓层掺杂浓度为1.0×1016粒子数cm-3～1.0×1018粒子数cm-3，P型氮化镓层掺杂浓度为5.0×1018粒子数cm-3～5.0×1019粒子数cm-3。
本发明针对P型氮化镓栅高电子迁移率晶体管功率器件存在的大电压下的栅极漏电增加和器件正向阈值电压较低的问题提出一种新型氮化镓功率器件结构，此结构可以很好的解决氮化镓功率器件的栅极漏电和阈值电压的问题，从而提高器件的实用性和安全性。
有益效果：与现有技术相比，本发明具有如下优点：
本发明在传统结构基础上，提出了一种新的结构，将P-GaN分成三个不同掺杂浓度的层次，保持与铝镓氮势垒层接触和与肖特基金属层接触的两层P-GaN掺杂浓度较低，而这两层低浓度P-GaN之间的一层P-GaN保持较高的掺杂浓度。三层P-GaN的设置可以很好的提高器件的阈值电压同时极大的降低栅极漏电，而且对于器件导通后的工作状态没有影响。
首先顶层P-GaN与肖特基金属层接触，半导体层的掺杂浓度降低使得该肖特基接触的肖特基势垒增高，高势垒阻挡层带来了高阈值电压和低栅漏电流，界面耗尽区的电压降变化可以解释这一现象。其次为了促进平衡条件下(栅压为0V)二维电子气的消耗，必须使用较高浓度的P型GaN帽层受体，因为只有在高P掺杂浓度下才能使得P-GaN的导带移至费米能级以上，使得异质结构适合正常关闭操作，所以夹层P-GaN保持一个较高的掺杂浓度。最后对于底层P-GaN来说，P-GaN高电子迁移率晶体管的栅极包含一个金属/P-GaN形成的肖特基二极管与一个P-GaN/AlGaN/GaN形成的P-i-N二极管，对于P-i-N二极管来说一定程度下减少其P区掺杂可以使得减小正向电流实现反向快速恢复；在高电子迁移率晶体管的栅极承受电压的情况下可能存在多条漏电路径。在大电压下栅极边缘电场增高，容易发生击穿，减小底层P-GaN掺杂浓度可以很好的降低电场强度，使雪崩击穿在拐角处不易发生，增加栅极耐压。
附图说明
图1所示为本发明氮化镓功率器件的结构图。
图2所示为普通氮化镓功率器件和本发明低栅极漏电高阈值电压氮化镓功率器件转移特性曲线仿真对比图，其中带方块的实线为普通氮化镓功率器件波形，带三角的虚线为本发明的功率器件波形。
图3所示为普通氮化镓功率器件和本发明低栅极漏电高阈值电压氮化镓功率器件正向栅极电压下栅极漏电仿真对比图，其中带方块的实线为普通氮化镓功率器件波形，带三角的虚线为本发明的功率器件波形。
图4所示为普通氮化镓功率器件与本发明功率器件在AlGaN/GaN异质结附近的能带图对比图。
图5所示为普通氮化镓功率器件和本发明功率器件在同一栅极电压(该电压时原始结构将要发生击穿)下栅极附近碰撞电离率的对比图。
图6所示为普通氮化镓功率器件和本发明功率器件在同一栅极电压下栅极附近空穴电流分布的对比图，其中a为原始结构，b为本发明的结构。
图中有：P型硅衬底1，氮化铝缓冲层2，铝镓氮缓冲层3，氮化镓缓冲层4，铝镓氮势垒层5，源极6，漏极7，氮化物钝化层8，氮化物钝化层9，栅极10，第一P型氮化镓层11，第二P型氮化镓层12，第三P型氮化镓层13。
具体实施方式
下面结合附图对本发明做详细说明：
本发明所述的具有低栅极漏电高阈值电压的氮化镓功率器件，包括：P型硅衬底1，在P型硅衬底1上方设有氮化铝缓冲层2，氮化铝缓冲层2上方设有铝镓氮缓冲层3，铝镓氮缓冲层3上方设有氮化镓缓冲层4，氮化镓缓冲层4上方设有铝镓氮势垒层5和两端的源极6及漏极7，源极6及漏极7上方设有金属分别作为源极6和漏极7连接铝镓氮势垒层5两端至外围的输入\输出，源极6金属与铝镓氮势垒层5左端形成欧姆接触，漏极7和铝镓氮势垒层5右端形成欧姆接触，铝镓氮势垒层5上方设有第一P型氮化镓层11，第一P型氮化镓层11上方设有第二P型氮化镓层12，第二P型氮化镓层12上方设有第三P型氮化镓层13，第三P型氮化镓层13上方设有栅极10金属连接第三P型氮化镓层13至结构外围的输入\输出，栅极10金属和第三P型氮化镓层13形成肖特基接触，第一P型氮化镓层11，第二P型氮化镓层12，第三P型氮化镓层13和栅极10在源漏极之间相对距离源极6较近，相对距离漏极7较远，铝镓氮势垒层5上方漏极7和第一P型氮化镓层11，第二P型氮化镓层12，第三P型氮化镓层13之间设有氮化物钝化层9，源极6和第一P型氮化镓层11，第二P型氮化镓层12，第三P型氮化镓层13之间设有氮化物钝化层8。
所述的一种氮化镓功率器件，第一P型氮化镓层11、第三P型氮化镓层13掺杂浓度为1.0×1016粒子数cm-3～1.0×1018粒子数cm-3，第二P型氮化镓层12掺杂浓度为5.0×1018粒子数cm-3～5.0×1019粒子数cm-3。
下面结合附图对本发明进行进一步说明。
本发明的工作原理：
氮化镓功率器件尽管具有高电流密度、快开关速度和低导通电阻等优点，但相对于Si MOSFET的约18V的正向栅压摆幅，一般的P-GaN栅HEMT器件的正向栅压摆幅约为3-7V。传统方案中，氮化镓功率器件常常会利用一些方法来减缓栅极漏电，比如采用合适的钝化工艺，H等离子体工艺优化，增加铝镓氮的厚度和采用MIS介质层等方式；但这些技术都只能维持较低栅压下的表面漏电减少且带来的成本往往较高，而对于垂直隧穿漏电流来说，很难起到缓解所用。
本发明在传统结构基础上，提出了一种新的结构，将P-GaN分成三个不同掺杂浓度的层次，保持与铝镓氮势垒层接触和与肖特基金属层接触的两层P-GaN掺杂浓度较低，而这两层低浓度P-GaN之间的一层P-GaN保持较高的掺杂浓度。三层P-GaN的设置可以很好的提高器件的阈值电压同时极大的降低栅极漏电，而且因为仅仅改变了P-GaN掺杂浓度所以对于器件导通后的工作状态没有影响。
首先顶层P-GaN与肖特基金属层接触，在保持金属电极材料不变的情况下，因为半导体层的掺杂浓度降低使其费米能级升高，在电子亲和能不变的情况下使得该肖特基接触的肖特基势垒增高，高势垒阻挡层带来了高阈值电压和低栅漏电流，界面耗尽区的电压降变化可以解释这一现象；特别是金属/P-GaN界面产生的空穴耗尽区随着势垒高度的增加而增加，在高势垒高度下使得空穴更难通过势垒的隧穿，导致阈值电压的正偏移，减小栅极漏电。本发明的阈值电压的正偏移和栅极在大电压下的仿真图在图2和图3中表现出了很好的性能。
其次为了促进平衡条件下(栅压为0V)二维电子气的消耗，必须使用较高浓度的P型GaN帽层受体，因为只有在高P掺杂浓度下才能使得P-GaN的导带移至费米能级以上，使得异质结构适合正常关闭操作，同时高掺杂也可以使得阈值电压的增加；但是当P-GaN掺杂水平达到一定程度后，继续增加掺杂将会导致层的结晶质量恶化，进而导致电活性受体的下降，所以夹层P-GaN应保持一个较高的掺杂浓度。
最后对于底层P-GaN来说，在P-GaN高电子迁移率晶体管的栅极包含一个金属/P-GaN形成的肖特基二极管与一个P-GaN/AlGaN/GaN形成的P-i-N二极管，对于P-i-N二极管来说在维持P区掺杂浓度范围一定的情况下减少掺杂浓度可以减小正向导通电流，使得基区的存储电荷数量减少，在反向恢复过程中抽取的存储电荷数量减少可以使得反向恢复速度加快，实现快速关断。在高电子迁移率晶体管的栅极承受电压的情况下可能存在多条漏电路径：表面隧穿漏电、垂直隧穿漏电、缺陷辅助隧穿漏电等；隧穿漏电是栅极漏电的主要因素，大电压下栅极边缘电场增高，减小底层P-GaN掺杂浓度可以很好的减缓粒子间的碰撞电离从而降低电场强度，使雪崩击穿在拐角处不易发生，可以增加栅极耐压。
图4展示了本发明结构的导带能带图可以看到其导带变得更低从而维持阈值电压正偏移。图5展示在原始结构栅极将要发生击穿的电压下两种器件栅极附近的碰撞电离率大小，碰撞电离率大小表征电场强度大小，图中可以看到原始结构的碰撞电离率远大于本发明结构，在原始结构栅极击穿电压下本发明结构栅极附近的电场强度仍可以维持器件的正常工作。图6中展示了同一电压下的两种结构的空穴电流密度和路径对比图，此时原始结构栅极已经发生击穿，漏电极大的增加；而本发明结构的空穴电流密度和路径表明栅极仍维持在一个很小的漏电电流下。
Claims (4)
1.一种具有栅极高耐压低漏电的氮化镓功率器件，其特征在于，该氮化镓功率器件包括：P型硅衬底(1)，在P型硅衬底(1)上方设有氮化铝缓冲层(2)，氮化铝缓冲层(2)上方设有铝镓氮缓冲层(3)，铝镓氮缓冲层(3)上方设有氮化镓缓冲层(4)，氮化镓缓冲层(4)上方的中部设有铝镓氮势垒层(5)，两边设有源极(6)及漏极(7)，源极(6)及漏极(7)上方设有金属分别作为源极(6)和漏极(7)连接铝镓氮势垒层(5)两端至外围的输入\输出，源极(6)金属与铝镓氮势垒层(5)左端形成欧姆接触，漏极(7)和铝镓氮势垒层(5)右端形成欧姆接触；铝镓氮势垒层(5)上方设有第一P型氮化镓层(11)，第一P型氮化镓层(11)上方设有第二P型氮化镓层(12)，第二P型氮化镓层(12)上方设有第三P型氮化镓层(13)，第三P型氮化镓层(13)上方设有栅极(10)金属连接第三P型氮化镓层(13)至结构外围的输入\输出，栅极(10)金属和第三P型氮化镓层(13)形成肖特基接触；铝镓氮势垒层(5)上方漏极(7)与第一P型氮化镓层(11)、第二P型氮化镓层(12)、第三P型氮化镓层(13)之间设有氮化物钝化层(9)，源极(6)与第一P型氮化镓层(11)、第二P型氮化镓层(12)、第三P型氮化镓层(13)之间设有氮化物钝化层(8)。
2.根据权利要求1所述的具有栅极高耐压低漏电的氮化镓功率器件，其特征在于，所述第一P型氮化镓层(11)、第二P型氮化镓层(12)、第三P型氮化镓层(13)和栅极(10)在源极(6)及漏极(7)之间相对距离源极(6)较近，相对距离漏极(7)较远。
3.根据权利要求1所述的具有栅极高耐压低漏电的氮化镓功率器件，其特征在于，所述铝镓氮势垒层(5)与栅极(10)之间设有P型氮化镓层(11)、P型氮化镓层(12)和P型氮化镓层(13)。
4.根据权利要求1所述的具有栅极高耐压低漏电的氮化镓功率器件，其特征在于，所述P型氮化镓层(11)、P型氮化镓层(13)掺杂浓度为1.0×1016粒子数cm-3～1.0×1018粒子数cm-3，P型氮化镓层(12)掺杂浓度为5.0×1018粒子数cm-3～5.0×1019粒子数cm-3。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111010568.8A CN113782588A (zh) | 2021-08-31 | 2021-08-31 | 一种具有栅极高耐压低漏电的氮化镓功率器件 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111010568.8A CN113782588A (zh) | 2021-08-31 | 2021-08-31 | 一种具有栅极高耐压低漏电的氮化镓功率器件 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113782588A true CN113782588A (zh) | 2021-12-10 |
Family
ID=78840241
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111010568.8A Pending CN113782588A (zh) | 2021-08-31 | 2021-08-31 | 一种具有栅极高耐压低漏电的氮化镓功率器件 |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113782588A (zh) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024055294A1 (en) * | 2022-09-16 | 2024-03-21 | Innoscience (suzhou) Semiconductor Co., Ltd. | Semiconductor device and method of manufacturing the same |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140103459A1 (en) * | 2011-07-15 | 2014-04-17 | Panasonic Corporation | Semiconductor device and method for fabricating the same |
| CN103972284A (zh) * | 2013-01-30 | 2014-08-06 | 瑞萨电子株式会社 | 半导体器件 |
| CN112930602A (zh) * | 2020-04-20 | 2021-06-08 | 华为技术有限公司 | 一种氮化镓器件及其驱动电路 |
-
2021
- 2021-08-31 CN CN202111010568.8A patent/CN113782588A/zh active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140103459A1 (en) * | 2011-07-15 | 2014-04-17 | Panasonic Corporation | Semiconductor device and method for fabricating the same |
| CN103972284A (zh) * | 2013-01-30 | 2014-08-06 | 瑞萨电子株式会社 | 半导体器件 |
| CN112930602A (zh) * | 2020-04-20 | 2021-06-08 | 华为技术有限公司 | 一种氮化镓器件及其驱动电路 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024055294A1 (en) * | 2022-09-16 | 2024-03-21 | Innoscience (suzhou) Semiconductor Co., Ltd. | Semiconductor device and method of manufacturing the same |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110047910B (zh) | 一种高耐压能力的异质结半导体器件 | |
| CN104538440B (zh) | 一种缓冲层荷电resurf hemt器件 | |
| JPWO2010021099A1 (ja) | 電界効果トランジスタ | |
| CN113471290B (zh) | 隧穿辅助导通的硅/碳化硅异质结mosfet功率器件 | |
| CN111969047B (zh) | 一种具有复合背势垒层的氮化镓异质结场效应晶体管 | |
| US9263560B2 (en) | Power semiconductor device having reduced gate-collector capacitance | |
| CN108198857A (zh) | 一种集成凸块状肖特基二极管的碳化硅mosfet器件元胞结构 | |
| CN114447102A (zh) | 具有衬底上复合半导体层的氮化镓异质结场效应晶体管 | |
| CN113675270B (zh) | 一种具有逆向导通能力的GaN RC-HEMT | |
| CN117497601B (zh) | 平面型碳化硅晶体管的结构、制造方法及电子设备 | |
| CN111490101B (zh) | 一种GaN基HEMT器件 | |
| CN113782588A (zh) | 一种具有栅极高耐压低漏电的氮化镓功率器件 | |
| CN113178485A (zh) | 一种P型槽栅结合极化层结构的GaN HEMT器件 | |
| CN117476774A (zh) | 垂直型碳化硅晶体管的结构、制造方法及电子设备 | |
| CN110534567B (zh) | 一种碳化硅门极可关断晶闸管 | |
| CN107393954A (zh) | 一种GaN异质结纵向场效应管 | |
| CN115274846B (zh) | 高电子迁移率晶体管 | |
| CN116913951A (zh) | 一种具有P型埋层的双沟道增强型GaN HEMT器件 | |
| CN114551586B (zh) | 集成栅控二极管的碳化硅分离栅mosfet元胞及制备方法 | |
| CN113078204B (zh) | 一种氮化镓3d-resurf场效应晶体管及其制造方法 | |
| CN114843332A (zh) | 低功耗高可靠性半包沟槽栅mosfet器件及制备方法 | |
| CN113594244A (zh) | 具有高雪崩能力的氮化镓功率器件及其制备工艺 | |
| Wang et al. | Recessed-anode AlGaN/GaN diode with a high Baliga's FOM by combining a p-GaN cap layer and an anode-connected p-GaN buried layer | |
| CN111293176B (zh) | 一种GaN纵向逆导结场效应管 | |
| CN217214726U (zh) | 一种双P-GaN栅氮化镓增强型器件 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20211210 |